1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -aa-pipeline=basic-aa -passes=newgvn -S %s | FileCheck %s 3; Verify that we don't accidentally delete intrinsics that aren't SSA copies 4%DS_struct = type { [32 x ptr], i8, [32 x i16] } 5%MNR_struct = type { i64, i64, ptr } 6 7declare i64 @llvm.x86.bmi.bextr.64(i64, i64) #3 8 9define %MNR_struct @f000316011717_2(ptr %pDS, ptr %pCG) #2 { 10; CHECK-LABEL: @f000316011717_2( 11; CHECK-NEXT: Entry: 12; CHECK-NEXT: [[RESTART:%.*]] = alloca [[MNR_STRUCT:%.*]], align 8 13; CHECK-NEXT: [[PCARRY:%.*]] = getelementptr [[DS_STRUCT:%.*]], ptr [[PDS:%.*]], i32 0, i32 1 14; CHECK-NEXT: [[BASE:%.*]] = load ptr, ptr [[PDS]], align 8, !tbaa [[TBAA14:![0-9]+]] 15; CHECK-NEXT: [[ABSADDR:%.*]] = getelementptr i64, ptr [[BASE]], i64 9 16; CHECK-NEXT: [[EXTARGET:%.*]] = load i64, ptr [[ABSADDR]], align 8, !tbaa [[TBAA4:![0-9]+]] 17; CHECK-NEXT: [[TEMPLATE:%.*]] = icmp eq i64 [[EXTARGET]], 8593987412 18; CHECK-NEXT: br i1 [[TEMPLATE]], label %"BB3.000316011731#1", label [[BB2_000316011731_5:%.*]] 19; CHECK: "BB3.000316011731#1": 20; CHECK-NEXT: [[PBASE8:%.*]] = getelementptr [32 x ptr], ptr [[PDS]], i64 0, i64 29 21; CHECK-NEXT: [[BASE9:%.*]] = load ptr, ptr [[PBASE8]], align 8, !tbaa [[TBAA14]] 22; CHECK-NEXT: [[ABSADDR1:%.*]] = getelementptr i64, ptr [[BASE9]], i64 7 23; CHECK-NEXT: [[RMEM:%.*]] = load i64, ptr [[ABSADDR1]], align 8, !tbaa [[TBAA4]] 24; CHECK-NEXT: [[PWT:%.*]] = getelementptr [[DS_STRUCT]], ptr [[PDS]], i32 0, i32 2 25; CHECK-NEXT: [[PWTE:%.*]] = getelementptr [32 x i16], ptr [[PWT]], i64 0, i64 8593987412 26; CHECK-NEXT: [[SHIFTS:%.*]] = load i16, ptr [[PWTE]], align 2, !tbaa [[TBAA18:![0-9]+]], !invariant.load [[META20:![0-9]+]] 27; CHECK-NEXT: [[SLOWJ:%.*]] = icmp eq i16 [[SHIFTS]], 0 28; CHECK-NEXT: br i1 [[SLOWJ]], label [[BB2_000316011731_5]], label %"BB3.000316011731#1.1" 29; CHECK: BB2.000316011731.5: 30; CHECK-NEXT: [[EXTARGET1:%.*]] = and i64 [[EXTARGET]], 137438953471 31; CHECK-NEXT: switch i64 [[EXTARGET1]], label [[EXIT:%.*]] [ 32; CHECK-NEXT: ] 33; CHECK: "BB3.000316011731#1.1": 34; CHECK-NEXT: [[SHIFTS1:%.*]] = zext i16 [[SHIFTS]] to i64 35; CHECK-NEXT: [[VAL:%.*]] = call i64 @llvm.x86.bmi.bextr.64(i64 [[RMEM]], i64 [[SHIFTS1]]) 36; CHECK-NEXT: [[PREG:%.*]] = getelementptr [64 x i64], ptr [[PCG:%.*]], i64 0, i64 12 37; CHECK-NEXT: store i64 [[VAL]], ptr [[PREG]], align 32, !tbaa [[TBAA10:![0-9]+]] 38; CHECK-NEXT: [[PREG2:%.*]] = getelementptr [64 x i64], ptr [[PCG]], i64 0, i64 14 39; CHECK-NEXT: [[REG:%.*]] = load i64, ptr [[PREG2]], align 16, !tbaa [[TBAA12:![0-9]+]] 40; CHECK-NEXT: [[BASE2:%.*]] = load ptr, ptr [[PBASE8]], align 8, !tbaa [[TBAA14]] 41; CHECK-NEXT: [[ABSADDR2:%.*]] = getelementptr i64, ptr [[BASE2]], i64 [[REG]] 42; CHECK-NEXT: [[RMEM2:%.*]] = load i64, ptr [[ABSADDR2]], align 8, !tbaa [[TBAA1:![0-9]+]] 43; CHECK-NEXT: [[PREG7:%.*]] = getelementptr [64 x i64], ptr [[PCG]], i64 0, i64 9 44; CHECK-NEXT: store i64 [[RMEM2]], ptr [[PREG7]], align 8, !tbaa [[TBAA8:![0-9]+]] 45; CHECK-NEXT: [[ADD2C279:%.*]] = add i64 [[RMEM2]], [[VAL]] 46; CHECK-NEXT: [[CCHK:%.*]] = icmp sge i64 [[ADD2C279]], 0 47; CHECK-NEXT: [[CFL:%.*]] = zext i1 [[CCHK]] to i8 48; CHECK-NEXT: store i8 [[CFL]], ptr [[PCARRY]], align 1, !tbaa [[TBAA16:![0-9]+]] 49; CHECK-NEXT: br label [[EXIT]] 50; CHECK: Exit: 51; CHECK-NEXT: [[RESTART378:%.*]] = load [[MNR_STRUCT]], ptr [[RESTART]], align 8 52; CHECK-NEXT: ret [[MNR_STRUCT]] [[RESTART378]] 53; 54Entry: 55 %restart = alloca %MNR_struct 56 %pCarry = getelementptr %DS_struct, ptr %pDS, i32 0, i32 1 57 %base = load ptr, ptr %pDS, !tbaa !142 58 %absaddr = getelementptr i64, ptr %base, i64 9 59 %extarget = load i64, ptr %absaddr, align 8, !tbaa !4 60 %template = icmp eq i64 %extarget, 8593987412 61 br i1 %template, label %"BB3.000316011731#1", label %BB2.000316011731.5 62 63"BB3.000316011731#1": 64 %pbase8 = getelementptr [32 x ptr], ptr %pDS, i64 0, i64 29 65 %base9 = load ptr, ptr %pbase8, !tbaa !142 66 %absaddr1 = getelementptr i64, ptr %base9, i64 7 67 %rmem = load i64, ptr %absaddr1, align 8, !tbaa !4 68 %pwt = getelementptr %DS_struct, ptr %pDS, i32 0, i32 2 69 %pwte = getelementptr [32 x i16], ptr %pwt, i64 0, i64 %extarget 70 %shifts = load i16, ptr %pwte, align 2, !tbaa !175, !invariant.load !181 71 %slowj = icmp eq i16 %shifts, 0 72 br i1 %slowj, label %BB2.000316011731.5, label %"BB3.000316011731#1.1" 73 74BB2.000316011731.5: 75 %extarget1 = and i64 %extarget, 137438953471 76 switch i64 %extarget1, label %Exit [ 77 ] 78 79"BB3.000316011731#1.1": 80 %shifts1 = zext i16 %shifts to i64 81 %val = call i64 @llvm.x86.bmi.bextr.64(i64 %rmem, i64 %shifts1) 82 %preg = getelementptr [64 x i64], ptr %pCG, i64 0, i64 12 83 store i64 %val, ptr %preg, align 32, !tbaa !32 84 %preg2 = getelementptr [64 x i64], ptr %pCG, i64 0, i64 14 85 %reg = load i64, ptr %preg2, align 16, !tbaa !36 86 %pbase2 = getelementptr [32 x ptr], ptr %pDS, i64 0, i64 29 87 %base2 = load ptr, ptr %pbase2, !tbaa !142 88 %absaddr2 = getelementptr i64, ptr %base2, i64 %reg 89 %rmem2 = load i64, ptr %absaddr2, align 8, !tbaa !4 90 %preg7 = getelementptr [64 x i64], ptr %pCG, i64 0, i64 9 91 store i64 %rmem2, ptr %preg7, align 8, !tbaa !26 92 %reg7 = load i64, ptr %preg7, align 8, !tbaa !26 93 %preg3 = getelementptr [64 x i64], ptr %pCG, i64 0, i64 12 94 %reg4 = load i64, ptr %preg3, align 32, !tbaa !32 95 %add2c279 = add i64 %reg7, %reg4 96 %cchk = icmp sge i64 %add2c279, 0 97 %cfl = zext i1 %cchk to i8 98 store i8 %cfl, ptr %pCarry, align 1, !tbaa !156 99 br label %Exit 100 101Exit: 102 %restart378 = load %MNR_struct, ptr %restart 103 ret %MNR_struct %restart378 104} 105 106attributes #2 = { nounwind } 107attributes #3 = { nounwind readnone } 108 109!tbaa = !{!0, !1, !3, !4, !6, !26, !32, !36, !142, !156, !175} 110 111!0 = !{!"tbaa2200"} 112!1 = !{!2, !2, i64 0} 113!2 = !{!"data", !0} 114!3 = !{!"ctrl", !0} 115!4 = !{!5, !5, i64 0} 116!5 = !{!"mem", !2} 117!6 = !{!7, !7, i64 0} 118!7 = !{!"grs", !2} 119!26 = !{!27, !27, i64 0} 120!27 = !{!"X9", !7} 121!32 = !{!33, !33, i64 0} 122!33 = !{!"A0", !7} 123!36 = !{!37, !37, i64 0} 124!37 = !{!"A2", !7} 125!142 = !{!143, !143, i64 0} 126!143 = !{!"breg", !3} 127!156 = !{!157, !157, i64 0} 128!157 = !{!"carry", !3} 129!175 = !{!176, !176, i64 0, i32 1} 130!176 = !{!"const", !3} 131!181 = !{} 132