xref: /llvm-project/llvm/test/Transforms/NewGVN/compare-condition-changes.ll (revision 4f73528403944627c5d13f57ee7728c7f92b3c47)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes=newgvn -S %s | FileCheck %s
3
4; Test cases to make sure the blocks are properly marked as executable, if the
5; state of the branch condition changes.
6
7; Test case to make sure the case where a condition cannot be simplified is
8; handled properly.
9define i1 @test1() {
10; CHECK-LABEL: @test1(
11; CHECK-NEXT:  entry:
12; CHECK-NEXT:    [[CALL:%.*]] = tail call i1 @foo()
13; CHECK-NEXT:    br i1 [[CALL]], label [[THEN:%.*]], label [[ELSE:%.*]]
14; CHECK:       then:
15; CHECK-NEXT:    ret i1 true
16; CHECK:       else:
17; CHECK-NEXT:    ret i1 false
18;
19entry:
20  %call = tail call i1 @foo()
21  br i1 %call, label %then, label %else
22
23then:
24  ret i1 true
25
26else:
27  ret i1 false
28}
29
30declare i1 @foo()
31
32; Make sure state changes are propagated across freeze to branches.
33define void @test2(i1 %c) {
34; CHECK-LABEL: @test2(
35; CHECK-NEXT:  entry:
36; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]
37; CHECK:       loop.header:
38; CHECK-NEXT:    [[P_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[LOOP_LATCH:%.*]] ]
39; CHECK-NEXT:    [[P_1:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[P_2:%.*]], [[LOOP_LATCH]] ]
40; CHECK-NEXT:    br label [[LOOP_BB_1:%.*]]
41; CHECK:       loop.bb.1:
42; CHECK-NEXT:    [[INC]] = add nsw i32 [[P_0]], 1
43; CHECK-NEXT:    [[C_1:%.*]] = icmp slt i32 [[P_0]], 0
44; CHECK-NEXT:    [[C_1_FREEZE:%.*]] = freeze i1 [[C_1]]
45; CHECK-NEXT:    br i1 [[C_1_FREEZE]], label [[LOOP_BB_2:%.*]], label [[LOOP_LATCH]]
46; CHECK:       loop.bb.2:
47; CHECK-NEXT:    br label [[LOOP_LATCH]]
48; CHECK:       loop.latch:
49; CHECK-NEXT:    [[P_2]] = phi i32 [ 0, [[LOOP_BB_2]] ], [ [[P_1]], [[LOOP_BB_1]] ]
50; CHECK-NEXT:    [[C_2:%.*]] = icmp eq i32 [[P_2]], 123
51; CHECK-NEXT:    br i1 [[C_2]], label [[EXIT:%.*]], label [[LOOP_HEADER]]
52; CHECK:       exit:
53; CHECK-NEXT:    ret void
54;
55entry:
56  br label %loop.header
57
58loop.header:
59  %p.0 = phi i32 [ 0, %entry ], [ %p.3, %loop.latch ]
60  %p.1 = phi i32 [ 1, %entry ], [ %p.2, %loop.latch ]
61  br label %loop.bb.1
62
63loop.bb.1:
64  %inc = add nsw i32 %p.0, 1
65  %c.1 = icmp slt i32 %p.0, 0
66  %c.1.freeze = freeze i1 %c.1
67  br i1 %c.1.freeze, label %loop.bb.2, label %loop.latch
68
69loop.bb.2:
70  br label %loop.latch
71
72loop.latch:
73  %p.2 = phi i32 [ 0, %loop.bb.2 ], [ %p.1, %loop.bb.1 ]
74  %p.3 = phi i32 [ %inc, %loop.bb.2 ], [ %inc, %loop.bb.1 ]
75  %c.2 = icmp eq i32 %p.2, 123
76  br i1 %c.2, label %exit, label %loop.header
77
78exit:
79  ret void
80}
81