1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes='require<domtree>,mergeicmps,verify<domtree>' -mtriple=x86_64-unknown-unknown -S | FileCheck %s --check-prefix=X86 3; RUN: opt < %s -passes=mergeicmps -verify-dom-info -mtriple=x86_64-unknown-unknown -S -disable-simplify-libcalls | FileCheck %s --check-prefix=X86-NOBUILTIN 4 5%S = type { i32, i32 } 6 7define zeroext i1 @opeq1( 8; X86-LABEL: @opeq1( 9; X86-NEXT: "entry+land.rhs.i": 10; X86-NEXT: [[MEMCMP:%.*]] = call i32 @memcmp(ptr [[A:%.*]], ptr [[B:%.*]], i64 8) 11; X86-NEXT: [[TMP0:%.*]] = icmp eq i32 [[MEMCMP]], 0 12; X86-NEXT: br label [[OPEQ1_EXIT:%.*]] 13; X86: opeq1.exit: 14; X86-NEXT: ret i1 [[TMP0]] 15; 16; X86-NOBUILTIN-LABEL: @opeq1( 17; X86-NOBUILTIN-NEXT: entry: 18; X86-NOBUILTIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[A:%.*]], align 4 19; X86-NOBUILTIN-NEXT: [[TMP1:%.*]] = load i32, ptr [[B:%.*]], align 4 20; X86-NOBUILTIN-NEXT: [[CMP_I:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]] 21; X86-NOBUILTIN-NEXT: br i1 [[CMP_I]], label [[LAND_RHS_I:%.*]], label [[OPEQ1_EXIT:%.*]] 22; X86-NOBUILTIN: land.rhs.i: 23; X86-NOBUILTIN-NEXT: [[SECOND_I:%.*]] = getelementptr inbounds [[S:%.*]], ptr [[A]], i64 0, i32 1 24; X86-NOBUILTIN-NEXT: [[TMP2:%.*]] = load i32, ptr [[SECOND_I]], align 4 25; X86-NOBUILTIN-NEXT: [[SECOND2_I:%.*]] = getelementptr inbounds [[S]], ptr [[B]], i64 0, i32 1 26; X86-NOBUILTIN-NEXT: [[TMP3:%.*]] = load i32, ptr [[SECOND2_I]], align 4 27; X86-NOBUILTIN-NEXT: [[CMP3_I:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]] 28; X86-NOBUILTIN-NEXT: br label [[OPEQ1_EXIT]] 29; X86-NOBUILTIN: opeq1.exit: 30; X86-NOBUILTIN-NEXT: [[TMP4:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[CMP3_I]], [[LAND_RHS_I]] ] 31; X86-NOBUILTIN-NEXT: ret i1 [[TMP4]] 32; 33 ptr nocapture readonly dereferenceable(8) %a, 34 ptr nocapture readonly dereferenceable(8) %b) local_unnamed_addr nofree nosync { 35entry: 36 %0 = load i32, ptr %a, align 4 37 %1 = load i32, ptr %b, align 4 38 %cmp.i = icmp eq i32 %0, %1 39 br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit 40 41land.rhs.i: 42 %second.i = getelementptr inbounds %S, ptr %a, i64 0, i32 1 43 %2 = load i32, ptr %second.i, align 4 44 %second2.i = getelementptr inbounds %S, ptr %b, i64 0, i32 1 45 %3 = load i32, ptr %second2.i, align 4 46 %cmp3.i = icmp eq i32 %2, %3 47 br label %opeq1.exit 48 49opeq1.exit: 50 %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ] 51 ret i1 %4 52; The entry block with zero-offset GEPs is kept, loads are removed. 53; The two 4 byte loads and compares are replaced with a single 8-byte memcmp. 54; The branch is now a direct branch; the other block has been removed. 55; The phi is updated. 56} 57 58; Same as above, but the two blocks are in inverse order. 59define zeroext i1 @opeq1_inverse( 60; X86-LABEL: @opeq1_inverse( 61; X86-NEXT: "land.rhs.i+entry": 62; X86-NEXT: [[MEMCMP:%.*]] = call i32 @memcmp(ptr [[A:%.*]], ptr [[B:%.*]], i64 8) 63; X86-NEXT: [[TMP0:%.*]] = icmp eq i32 [[MEMCMP]], 0 64; X86-NEXT: br label [[OPEQ1_EXIT:%.*]] 65; X86: opeq1.exit: 66; X86-NEXT: ret i1 [[TMP0]] 67; 68; X86-NOBUILTIN-LABEL: @opeq1_inverse( 69; X86-NOBUILTIN-NEXT: entry: 70; X86-NOBUILTIN-NEXT: [[FIRST_I:%.*]] = getelementptr inbounds [[S:%.*]], ptr [[A:%.*]], i64 0, i32 1 71; X86-NOBUILTIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[FIRST_I]], align 4 72; X86-NOBUILTIN-NEXT: [[FIRST1_I:%.*]] = getelementptr inbounds [[S]], ptr [[B:%.*]], i64 0, i32 1 73; X86-NOBUILTIN-NEXT: [[TMP1:%.*]] = load i32, ptr [[FIRST1_I]], align 4 74; X86-NOBUILTIN-NEXT: [[CMP_I:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]] 75; X86-NOBUILTIN-NEXT: br i1 [[CMP_I]], label [[LAND_RHS_I:%.*]], label [[OPEQ1_EXIT:%.*]] 76; X86-NOBUILTIN: land.rhs.i: 77; X86-NOBUILTIN-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4 78; X86-NOBUILTIN-NEXT: [[TMP3:%.*]] = load i32, ptr [[B]], align 4 79; X86-NOBUILTIN-NEXT: [[CMP3_I:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]] 80; X86-NOBUILTIN-NEXT: br label [[OPEQ1_EXIT]] 81; X86-NOBUILTIN: opeq1.exit: 82; X86-NOBUILTIN-NEXT: [[TMP4:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[CMP3_I]], [[LAND_RHS_I]] ] 83; X86-NOBUILTIN-NEXT: ret i1 [[TMP4]] 84; 85 ptr nocapture readonly dereferenceable(8) %a, 86 ptr nocapture readonly dereferenceable(8) %b) local_unnamed_addr nofree nosync { 87entry: 88 %first.i = getelementptr inbounds %S, ptr %a, i64 0, i32 1 89 %0 = load i32, ptr %first.i, align 4 90 %first1.i = getelementptr inbounds %S, ptr %b, i64 0, i32 1 91 %1 = load i32, ptr %first1.i, align 4 92 %cmp.i = icmp eq i32 %0, %1 93 br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit 94 95land.rhs.i: 96 %2 = load i32, ptr %a, align 4 97 %3 = load i32, ptr %b, align 4 98 %cmp3.i = icmp eq i32 %2, %3 99 br label %opeq1.exit 100 101opeq1.exit: 102 %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ] 103 ret i1 %4 104; The second block with zero-offset GEPs is kept, loads are removed. 105; CHECK: land.rhs.i 106; The two 4 byte loads and compares are replaced with a single 8-byte memcmp. 107; The branch is now a direct branch; the other block has been removed. 108; The phi is updated. 109} 110