1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=mergeicmps -verify-dom-info -mtriple=x86_64-unknown-unknown -S | FileCheck %s 3 4%S = type { i32, i32 } 5 6; Check that the transformation is avoided when GEP has a use outside of the 7; parant block of the load instruction. 8 9define zeroext i32 @opeq1( 10; CHECK-LABEL: @opeq1( 11; CHECK-NEXT: entry: 12; CHECK-NEXT: [[FIRST_I:%.*]] = getelementptr inbounds [[S:%.*]], ptr [[A:%.*]], i64 0, i32 1 13; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[FIRST_I]], align 4 14; CHECK-NEXT: [[FIRST1_I:%.*]] = getelementptr inbounds [[S]], ptr [[B:%.*]], i64 0, i32 1 15; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[FIRST1_I]], align 4 16; CHECK-NEXT: [[CMP_I:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]] 17; CHECK-NEXT: br i1 [[CMP_I]], label [[LAND_RHS_I:%.*]], label [[OPEQ1_EXIT:%.*]] 18; CHECK: land.rhs.i: 19; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[A]], align 4 20; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[B]], align 4 21; CHECK-NEXT: [[CMP3_I:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]] 22; CHECK-NEXT: br label [[OPEQ1_EXIT]] 23; CHECK: opeq1.exit: 24; CHECK-NEXT: [[TMP4:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[CMP3_I]], [[LAND_RHS_I]] ] 25; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[FIRST_I]], align 4 26; CHECK-NEXT: [[TMP6:%.*]] = select i1 [[TMP4]], i32 [[TMP5]], i32 0 27; CHECK-NEXT: ret i32 [[TMP6]] 28; 29 30 ptr nocapture readonly dereferenceable(16) %a, 31 ptr nocapture readonly dereferenceable(16) %b) local_unnamed_addr #0 { 32entry: 33 %first.i = getelementptr inbounds %S, ptr %a, i64 0, i32 1 34 %0 = load i32, ptr %first.i, align 4 35 %first1.i = getelementptr inbounds %S, ptr %b, i64 0, i32 1 36 %1 = load i32, ptr %first1.i, align 4 37 %cmp.i = icmp eq i32 %0, %1 38 br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit 39 40land.rhs.i: 41 %2 = load i32, ptr %a, align 4 42 %3 = load i32, ptr %b, align 4 43 %cmp3.i = icmp eq i32 %2, %3 44 br label %opeq1.exit 45 46opeq1.exit: 47 %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i] 48 %5 = load i32, ptr %first.i, align 4 49 %6 = select i1 %4, i32 %5, i32 0 50 ret i32 %6 51} 52