xref: /llvm-project/llvm/test/Transforms/Mem2Reg/pr24179.ll (revision 9daaaad9cfaf05f411ed4faf6eaf77c1da4c074a)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes=mem2reg < %s -S | FileCheck %s
3
4declare i32 @def(i32)
5declare i1 @use(i32)
6
7; Special case of a single-BB alloca does not apply here since the load
8; is affected by the following store. Expect this case to be identified
9; and a PHI node to be created.
10define void @test1() {
11; CHECK-LABEL: @test1(
12; CHECK-NEXT:  entry:
13; CHECK-NEXT:    br label [[LOOP:%.*]]
14; CHECK:       loop:
15; CHECK-NEXT:    [[T_0:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[N:%.*]], [[LOOP]] ]
16; CHECK-NEXT:    [[C:%.*]] = call i1 @use(i32 [[T_0]])
17; CHECK-NEXT:    [[N]] = call i32 @def(i32 7)
18; CHECK-NEXT:    br i1 [[C]], label [[LOOP]], label [[EXIT:%.*]]
19; CHECK:       exit:
20; CHECK-NEXT:    ret void
21;
22  entry:
23  %t = alloca i32
24  br label %loop
25
26  loop:
27  %v = load i32, ptr %t
28  %c = call i1 @use(i32 %v)
29  %n = call i32 @def(i32 7)
30  store i32 %n, ptr %t
31  br i1 %c, label %loop, label %exit
32
33  exit:
34  ret void
35}
36
37; Same as above, except there is no following store. The alloca should just be
38; replaced with an undef
39define void @test2() {
40; CHECK-LABEL: @test2(
41; CHECK-NEXT:  entry:
42; CHECK-NEXT:    br label [[LOOP:%.*]]
43; CHECK:       loop:
44; CHECK-NEXT:    [[C:%.*]] = call i1 @use(i32 undef)
45; CHECK-NEXT:    br i1 [[C]], label [[LOOP]], label [[EXIT:%.*]]
46; CHECK:       exit:
47; CHECK-NEXT:    ret void
48;
49  entry:
50  %t = alloca i32
51  br label %loop
52
53  loop:
54  %v = load i32, ptr %t
55  %c = call i1 @use(i32 %v)
56  br i1 %c, label %loop, label %exit
57
58  exit:
59  ret void
60}
61