xref: /llvm-project/llvm/test/Transforms/Mem2Reg/2005-06-30-ReadBeforeWrite.ll (revision 9daaaad9cfaf05f411ed4faf6eaf77c1da4c074a)
1; RUN: opt < %s -passes='mem2reg,instcombine' -S | grep store
2; PR590
3
4
5define void @zero(ptr %p, i32 %n) {
6entry:
7	%p_addr = alloca ptr		; <ptr> [#uses=2]
8	%n_addr = alloca i32		; <ptr> [#uses=2]
9	%i = alloca i32		; <ptr> [#uses=6]
10	%out = alloca i32		; <ptr> [#uses=2]
11	%undef = alloca i32		; <ptr> [#uses=2]
12	store ptr %p, ptr %p_addr
13	store i32 %n, ptr %n_addr
14	store i32 0, ptr %i
15	br label %loopentry
16loopentry:		; preds = %endif, %entry
17	%tmp.0 = load i32, ptr %n_addr		; <i32> [#uses=1]
18	%tmp.1 = add i32 %tmp.0, 1		; <i32> [#uses=1]
19	%tmp.2 = load i32, ptr %i		; <i32> [#uses=1]
20	%tmp.3 = icmp sgt i32 %tmp.1, %tmp.2		; <i1> [#uses=2]
21	%tmp.4 = zext i1 %tmp.3 to i32		; <i32> [#uses=0]
22	br i1 %tmp.3, label %no_exit, label %return
23no_exit:		; preds = %loopentry
24	%tmp.5 = load i32, ptr %undef		; <i32> [#uses=1]
25	store i32 %tmp.5, ptr %out
26	store i32 0, ptr %undef
27	%tmp.6 = load i32, ptr %i		; <i32> [#uses=1]
28	%tmp.7 = icmp sgt i32 %tmp.6, 0		; <i1> [#uses=2]
29	%tmp.8 = zext i1 %tmp.7 to i32		; <i32> [#uses=0]
30	br i1 %tmp.7, label %then, label %endif
31then:		; preds = %no_exit
32	%tmp.9 = load ptr, ptr %p_addr		; <ptr> [#uses=1]
33	%tmp.10 = load i32, ptr %i		; <i32> [#uses=1]
34	%tmp.11 = sub i32 %tmp.10, 1		; <i32> [#uses=1]
35	%tmp.12 = getelementptr i8, ptr %tmp.9, i32 %tmp.11		; <ptr> [#uses=1]
36	%tmp.13 = load i32, ptr %out		; <i32> [#uses=1]
37	%tmp.14 = trunc i32 %tmp.13 to i8		; <i8> [#uses=1]
38	store i8 %tmp.14, ptr %tmp.12
39	br label %endif
40endif:		; preds = %then, %no_exit
41	%tmp.15 = load i32, ptr %i		; <i32> [#uses=1]
42	%inc = add i32 %tmp.15, 1		; <i32> [#uses=1]
43	store i32 %inc, ptr %i
44	br label %loopentry
45return:		; preds = %loopentry
46	ret void
47}
48