1; RUN: opt -S -passes=lowertypetests -mtriple=i686-unknown-linux-gnu %s | FileCheck --check-prefixes=X86,X86-LINUX,NATIVE %s 2; RUN: opt -S -passes=lowertypetests -mtriple=x86_64-unknown-linux-gnu %s | FileCheck --check-prefixes=X86,X86-LINUX,NATIVE %s 3; RUN: opt -S -passes=lowertypetests -mtriple=i686-pc-win32 %s | FileCheck --check-prefixes=X86,X86-WIN32,NATIVE %s 4; RUN: opt -S -passes=lowertypetests -mtriple=x86_64-pc-win32 %s | FileCheck --check-prefixes=X86,X86-WIN32,NATIVE %s 5; RUN: opt -S -passes=lowertypetests -mtriple=riscv32-unknown-linux-gnu %s | FileCheck --check-prefixes=RISCV,NATIVE %s 6; RUN: opt -S -passes=lowertypetests -mtriple=riscv64-unknown-linux-gnu %s | FileCheck --check-prefixes=RISCV,NATIVE %s 7; RUN: opt -S -passes=lowertypetests -mtriple=wasm32-unknown-unknown %s | FileCheck --check-prefix=WASM32 %s 8; RUN: opt -S -passes=lowertypetests -mtriple=loongarch64-unknown-linux-gnu %s | FileCheck --check-prefixes=LOONGARCH64,NATIVE %s 9 10; The right format for Arm jump tables depends on the selected 11; subtarget, so we can't get these tests right without the Arm target 12; compiled in. 13; RUN: %if arm-registered-target %{ opt -S -passes=lowertypetests -mtriple=arm-unknown-linux-gnu %s | FileCheck --check-prefixes=ARM,NATIVE %s %} 14; RUN: %if arm-registered-target %{ opt -S -passes=lowertypetests -mtriple=thumbv7m-unknown-linux-gnu %s | FileCheck --check-prefixes=THUMB,NATIVE %s %} 15; RUN: %if arm-registered-target %{ opt -S -passes=lowertypetests -mtriple=thumbv8m.base-unknown-linux-gnu %s | FileCheck --check-prefixes=THUMB,NATIVE %s %} 16; RUN: %if arm-registered-target %{ opt -S -passes=lowertypetests -mtriple=thumbv6m-unknown-linux-gnu %s | FileCheck --check-prefixes=THUMBV6M,NATIVE %s %} 17; RUN: %if arm-registered-target %{ opt -S -passes=lowertypetests -mtriple=thumbv5-unknown-linux-gnu %s | FileCheck --check-prefixes=ARM,NATIVE %s %} 18; RUN: %if arm-registered-target %{ opt -S -passes=lowertypetests -mtriple=aarch64-unknown-linux-gnu %s | FileCheck --check-prefixes=ARM,NATIVE %s %} 19 20; Tests that we correctly handle bitsets containing 2 or more functions. 21 22target datalayout = "e-p:64:64" 23 24 25; NATIVE: @0 = private unnamed_addr constant [2 x ptr] [ptr @f, ptr @g], align 16 26@0 = private unnamed_addr constant [2 x ptr] [ptr @f, ptr @g], align 16 27 28; NATIVE: private constant [0 x i8] zeroinitializer 29; WASM32: private constant [0 x i8] zeroinitializer 30 31; NATIVE: @f = alias void (), ptr @[[JT:.*]] 32 33; X86: @g = internal alias void (), getelementptr inbounds ([2 x [8 x i8]], ptr @[[JT]], i64 0, i64 1) 34; ARM: @g = internal alias void (), getelementptr inbounds ([2 x [4 x i8]], ptr @[[JT]], i64 0, i64 1) 35; THUMB: @g = internal alias void (), getelementptr inbounds ([2 x [4 x i8]], ptr @[[JT]], i64 0, i64 1) 36; THUMBV6M: @g = internal alias void (), getelementptr inbounds ([2 x [16 x i8]], ptr @[[JT]], i64 0, i64 1) 37; RISCV: @g = internal alias void (), getelementptr inbounds ([2 x [8 x i8]], ptr @[[JT]], i64 0, i64 1) 38; LOONGARCH64: @g = internal alias void (), getelementptr inbounds ([2 x [8 x i8]], ptr @[[JT]], i64 0, i64 1) 39 40; NATIVE: define hidden void @f.cfi() 41; WASM32: define void @f() !type !{{[0-9]+}} !wasm.index ![[I0:[0-9]+]] 42define void @f() !type !0 { 43 ret void 44} 45 46; NATIVE: define internal void @g.cfi() 47; WASM32: define internal void @g() !type !{{[0-9]+}} !wasm.index ![[I1:[0-9]+]] 48define internal void @g() !type !0 { 49 ret void 50} 51 52!0 = !{i32 0, !"typeid1"} 53 54declare i1 @llvm.type.test(ptr %ptr, metadata %bitset) noinline readnone 55 56define i1 @foo(ptr %p) { 57 ; NATIVE: sub i64 {{.*}}, ptrtoint (ptr @[[JT]] to i64) 58 ; WASM32: sub i64 {{.*}}, ptrtoint (ptr getelementptr (i8, ptr null, i64 1) to i64) 59 ; WASM32: icmp ule i64 {{.*}}, 1 60 %x = call i1 @llvm.type.test(ptr %p, metadata !"typeid1") 61 ret i1 %x 62} 63 64; X86-LINUX: define private void @[[JT]]() #[[ATTR:.*]] align 8 { 65; X86-WIN32: define private void @[[JT]]() #[[ATTR:.*]] align 8 { 66; ARM: define private void @[[JT]]() #[[ATTR:.*]] align 4 { 67; THUMB: define private void @[[JT]]() #[[ATTR:.*]] align 4 { 68; THUMBV6M: define private void @[[JT]]() #[[ATTR:.*]] align 16 { 69; RISCV: define private void @[[JT]]() #[[ATTR:.*]] align 8 { 70; LOONGARCH64: define private void @[[JT]]() #[[ATTR:.*]] align 8 { 71 72; X86: jmp ${0:c}@plt 73; X86-SAME: int3 74; X86-SAME: int3 75; X86-SAME: int3 76; X86-SAME: jmp ${1:c}@plt 77; X86-SAME: int3 78; X86-SAME: int3 79; X86-SAME: int3 80 81; ARM: b $0 82; ARM-SAME: b $1 83 84; THUMB: b.w $0 85; THUMB-SAME: b.w $1 86 87; THUMBV6M: push {r0,r1} 88; THUMBV6M-SAME: ldr r0, 1f 89; THUMBV6M-SAME: 0: add r0, r0, pc 90; THUMBV6M-SAME: str r0, [sp, #4] 91; THUMBV6M-SAME: pop {r0,pc} 92; THUMBV6M-SAME: .balign 4 93; THUMBV6M-SAME: 1: .word $0 - (0b + 4) 94; THUMBV6M-SAME: push {r0,r1} 95; THUMBV6M-SAME: ldr r0, 1f 96; THUMBV6M-SAME: 0: add r0, r0, pc 97; THUMBV6M-SAME: str r0, [sp, #4] 98; THUMBV6M-SAME: pop {r0,pc} 99; THUMBV6M-SAME: .balign 4 100; THUMBV6M-SAME: 1: .word $1 - (0b + 4) 101 102; RISCV: tail $0@plt 103; RISCV-SAME: tail $1@plt 104 105; LOONGARCH64: pcalau12i $$t0, %pc_hi20($0) 106; LOONGARCH64-SAME: jirl $$r0, $$t0, %pc_lo12($0) 107; LOONGARCH64-SAME: pcalau12i $$t0, %pc_hi20($1) 108; LOONGARCH64-SAME: jirl $$r0, $$t0, %pc_lo12($1) 109 110; NATIVE-SAME: "s,s"(ptr @f.cfi, ptr @g.cfi) 111 112; X86-LINUX: attributes #[[ATTR]] = { naked nocf_check noinline } 113; X86-WIN32: attributes #[[ATTR]] = { nocf_check noinline } 114; ARM: attributes #[[ATTR]] = { naked noinline 115; THUMB: attributes #[[ATTR]] = { naked noinline "target-cpu"="cortex-a8" "target-features"="+thumb-mode" } 116; THUMBV6M: attributes #[[ATTR]] = { naked noinline "target-features"="+thumb-mode" } 117; RISCV: attributes #[[ATTR]] = { naked noinline "target-features"="-c,-relax" } 118; LOONGARCH64: attributes #[[ATTR]] = { naked noinline } 119 120; WASM32: ![[I0]] = !{i64 1} 121; WASM32: ![[I1]] = !{i64 2} 122