1; REQUIRES: arm-registered-target 2 3; RUN: sed "s/ENABLE_BTI/1/" %s | opt -S -passes=lowertypetests -mtriple=thumbv8.1m.main-unknown-linux-gnu | FileCheck %s --check-prefixes=CHECK,BTI 4; RUN: sed "s/ENABLE_BTI/0/" %s | opt -S -passes=lowertypetests -mtriple=thumbv8.1m.main-unknown-linux-gnu | FileCheck %s --check-prefixes=CHECK,NOBTI 5 6target datalayout = "e-p:64:64" 7 8@0 = private unnamed_addr constant [2 x ptr] [ptr @f, ptr @g], align 16 9 10define void @f() !type !0 { 11 ret void 12} 13 14define internal void @g() !type !0 { 15 ret void 16} 17 18!0 = !{i32 0, !"typeid1"} 19 20declare i1 @llvm.type.test(ptr %ptr, metadata %bitset) nounwind readnone 21 22define i1 @foo(ptr %p) { 23 %x = call i1 @llvm.type.test(ptr %p, metadata !"typeid1") 24 ret i1 %x 25} 26 27!llvm.module.flags = !{!1} 28 29!1 = !{i32 4, !"branch-target-enforcement", i32 ENABLE_BTI} 30 31; For BTI, expect jump table offset check to involve a shift right by 32; 3 because table entries are 8 bytes long, consisting of a BTI and a 33; branch instruction, 4 bytes each. For non-BTI, we shift right by 2, 34; because it's just the branch. 35 36; BTI: lshr i64 {{.*}}, 3 37; NOBTI: lshr i64 {{.*}}, 2 38 39; CHECK: define private void @.cfi.jumptable() [[ATTRS:#[0-9]+]] 40 41; And check the actual jump table asm string: 42 43; BTI: call void asm sideeffect "bti\0Ab.w $0\0Abti\0Ab.w $1\0A", "s,s"(ptr @f.cfi, ptr @g.cfi) 44; NOBTI: call void asm sideeffect "b.w $0\0Ab.w $1\0A", "s,s"(ptr @f.cfi, ptr @g.cfi) 45 46; BTI: attributes [[ATTRS]] = { naked noinline "target-features"="+thumb-mode,+pacbti" } 47; NOBTI: attributes [[ATTRS]] = { naked noinline "target-cpu"="cortex-a8" "target-features"="+thumb-mode" } 48