xref: /llvm-project/llvm/test/Transforms/LowerSwitch/93152.ll (revision 67aec0cd62d607b4e5b7198769be061454ce67b3)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2; RUN: opt < %s -passes=lower-switch -S | FileCheck %s
3define void @i3_range_4(i3 %0) {
4; CHECK-LABEL: define void @i3_range_4(
5; CHECK-SAME: i3 [[TMP0:%.*]]) {
6; CHECK-NEXT:  [[BB_0:.*:]]
7; CHECK-NEXT:    br label %[[LEAFBLOCK:.*]]
8; CHECK:       [[LEAFBLOCK]]:
9; CHECK-NEXT:    [[DOTOFF:%.*]] = add i3 [[TMP0]], 2
10; CHECK-NEXT:    [[SWITCHLEAF:%.*]] = icmp ule i3 [[DOTOFF]], -4
11; CHECK-NEXT:    br i1 [[SWITCHLEAF]], label %[[BB_1:.*]], label %[[BB_2:.*]]
12; CHECK:       [[BB_1]]:
13; CHECK-NEXT:    [[TMP:%.*]] = phi i3 [ 0, %[[LEAFBLOCK]] ]
14; CHECK-NEXT:    br label %[[BB_2]]
15; CHECK:       [[BB_2]]:
16; CHECK-NEXT:    ret void
17;
18bb.0:
19  switch i3 %0, label %bb.2 [
20  i3 -1, label %bb.1
21  i3 -2, label %bb.1
22  i3 2, label %bb.1
23  i3 1, label %bb.1
24  i3 0, label %bb.1
25  ]
26
27bb.1:                                             ; preds = %bb.0, %bb.0, %bb.0, %bb.0, %bb.0
28  %tmp = phi i3 [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ]
29  br label %bb.2
30
31bb.2:                                             ; preds = %bb.1, %bb.0
32  ret void
33}
34
35define void @i3_range_6(i3 %0) {
36; CHECK-LABEL: define void @i3_range_6(
37; CHECK-SAME: i3 [[TMP0:%.*]]) {
38; CHECK-NEXT:  [[BB_0:.*:]]
39; CHECK-NEXT:    br label %[[LEAFBLOCK:.*]]
40; CHECK:       [[LEAFBLOCK]]:
41; CHECK-NEXT:    [[SWITCHLEAF:%.*]] = icmp sge i3 [[TMP0]], -3
42; CHECK-NEXT:    br i1 [[SWITCHLEAF]], label %[[BB_1:.*]], label %[[BB_2:.*]]
43; CHECK:       [[BB_1]]:
44; CHECK-NEXT:    [[TMP:%.*]] = phi i3 [ 0, %[[LEAFBLOCK]] ]
45; CHECK-NEXT:    br label %[[BB_2]]
46; CHECK:       [[BB_2]]:
47; CHECK-NEXT:    ret void
48;
49bb.0:
50  switch i3 %0, label %bb.2 [
51  i3 -1, label %bb.1
52  i3 -2, label %bb.1
53  i3 -3, label %bb.1
54  i3 3, label %bb.1
55  i3 2, label %bb.1
56  i3 1, label %bb.1
57  i3 0, label %bb.1
58  ]
59
60bb.1:                                             ; preds = %bb.0, %bb.0, %bb.0, %bb.0, %bb.0
61  %tmp = phi i3 [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ]
62  br label %bb.2
63
64bb.2:                                             ; preds = %bb.1, %bb.0
65  ret void
66}
67
68
69define void @i3_range_7(i3 %0) {
70; CHECK-LABEL: define void @i3_range_7(
71; CHECK-SAME: i3 [[TMP0:%.*]]) {
72; CHECK-NEXT:  [[BB_0:.*:]]
73; CHECK-NEXT:    br label %[[BB_1:.*]]
74; CHECK:       [[BB_1]]:
75; CHECK-NEXT:    br label %[[BB_2:.*]]
76; CHECK:       [[BB_2]]:
77; CHECK-NEXT:    ret void
78;
79bb.0:
80  switch i3 %0, label %bb.2 [
81  i3 -1, label %bb.1
82  i3 -2, label %bb.1
83  i3 -3, label %bb.1
84  i3 -4, label %bb.1
85  i3 3, label %bb.1
86  i3 2, label %bb.1
87  i3 1, label %bb.1
88  i3 0, label %bb.1
89  ]
90
91bb.1:                                             ; preds = %bb.0, %bb.0, %bb.0, %bb.0, %bb.0
92  %tmp = phi i3 [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ], [ 0, %bb.0 ]
93  br label %bb.2
94
95bb.2:                                             ; preds = %bb.1, %bb.0
96  ret void
97}
98