1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 2; RUN: opt -passes=loop-vectorize -force-vector-width=1 -force-vector-interleave=2 -S %s | FileCheck %s 3 4define void @test_variable_stride(ptr %dst, i32 %scale) { 5; CHECK-LABEL: define void @test_variable_stride 6; CHECK-SAME: (ptr [[DST:%.*]], i32 [[SCALE:%.*]]) { 7; CHECK-NEXT: entry: 8; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 9; CHECK: vector.ph: 10; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 11; CHECK: vector.body: 12; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 13; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 14; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[INDEX]], 1 15; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[TMP0]], [[SCALE]] 16; CHECK-NEXT: [[TMP3:%.*]] = mul i32 [[TMP1]], [[SCALE]] 17; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i16, ptr [[DST]], i32 [[TMP2]] 18; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i16, ptr [[DST]], i32 [[TMP3]] 19; CHECK-NEXT: store i32 [[TMP0]], ptr [[TMP4]], align 2 20; CHECK-NEXT: store i32 [[TMP1]], ptr [[TMP5]], align 2 21; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2 22; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1000 23; CHECK-NEXT: br i1 [[TMP6]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 24; CHECK: middle.block: 25; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] 26; CHECK: scalar.ph: 27; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 1000, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 28; CHECK-NEXT: br label [[LOOP:%.*]] 29; CHECK: loop: 30; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 31; CHECK-NEXT: [[IDX:%.*]] = mul i32 [[IV]], [[SCALE]] 32; CHECK-NEXT: [[GEP:%.*]] = getelementptr i16, ptr [[DST]], i32 [[IDX]] 33; CHECK-NEXT: store i32 [[IV]], ptr [[GEP]], align 2 34; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 35; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], 1000 36; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]] 37; CHECK: exit: 38; CHECK-NEXT: ret void 39; 40entry: 41 br label %loop 42 43loop: 44 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] 45 %idx = mul i32 %iv, %scale 46 %gep = getelementptr i16, ptr %dst, i32 %idx 47 store i32 %iv, ptr %gep, align 2 48 %iv.next = add i32 %iv, 1 49 %ec = icmp eq i32 %iv.next, 1000 50 br i1 %ec, label %exit, label %loop 51 52exit: 53 ret void 54} 55