1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -S -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 | FileCheck %s 3 4; Check that we can vectorize this loop without crashing. 5 6define i8 @widget(ptr %arr, i8 %t9) { 7; CHECK-LABEL: @widget( 8; CHECK-NEXT: bb: 9; CHECK-NEXT: [[ARR1:%.*]] = ptrtoint ptr [[ARR:%.*]] to i64 10; CHECK-NEXT: br label [[BB6:%.*]] 11; CHECK: bb6: 12; CHECK-NEXT: [[T1_0:%.*]] = phi ptr [ [[ARR]], [[BB:%.*]] ], [ null, [[BB6]] ] 13; CHECK-NEXT: [[C:%.*]] = call i1 @cond() 14; CHECK-NEXT: br i1 [[C]], label [[FOR_PREHEADER:%.*]], label [[BB6]] 15; CHECK: for.preheader: 16; CHECK-NEXT: [[T1_0_LCSSA:%.*]] = phi ptr [ [[T1_0]], [[BB6]] ] 17; CHECK-NEXT: [[T1_0_LCSSA4:%.*]] = phi ptr [ [[T1_0]], [[BB6]] ] 18; CHECK-NEXT: [[T1_0_LCSSA1:%.*]] = phi ptr [ [[T1_0]], [[BB6]] ] 19; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[ARR1]] to i32 20; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[TMP0]] 21; CHECK-NEXT: [[T1_0_LCSSA3:%.*]] = ptrtoint ptr [[T1_0_LCSSA]] to i64 22; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[T1_0_LCSSA3]] to i32 23; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP1]], [[TMP2]] 24; CHECK-NEXT: [[T1_0_LCSSA2:%.*]] = ptrtoint ptr [[T1_0_LCSSA4]] to i64 25; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP3]], 4 26; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]] 27; CHECK: vector.scevcheck: 28; CHECK-NEXT: [[TMP4:%.*]] = sub i64 -1, [[ARR1]] 29; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[TMP4]], [[T1_0_LCSSA2]] 30; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8 31; CHECK-NEXT: [[TMP7:%.*]] = add i8 1, [[TMP6]] 32; CHECK-NEXT: [[TMP8:%.*]] = icmp slt i8 [[TMP7]], 1 33; CHECK-NEXT: [[TMP9:%.*]] = icmp ugt i64 [[TMP5]], 255 34; CHECK-NEXT: [[TMP10:%.*]] = or i1 [[TMP8]], [[TMP9]] 35; CHECK-NEXT: br i1 [[TMP10]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 36; CHECK: vector.ph: 37; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP3]], 4 38; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP3]], [[N_MOD_VF]] 39; CHECK-NEXT: [[IND_END:%.*]] = trunc i32 [[N_VEC]] to i8 40; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i8> poison, i8 [[T9:%.*]], i64 0 41; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i8> [[BROADCAST_SPLATINSERT]], <4 x i8> poison, <4 x i32> zeroinitializer 42; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 43; CHECK: vector.body: 44; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 45; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i8> [ <i8 0, i8 1, i8 2, i8 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] 46; CHECK-NEXT: [[TMP11:%.*]] = add <4 x i8> [[VEC_IND]], splat (i8 1) 47; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i8> [[TMP11]], i32 0 48; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[ARR]], i8 [[TMP12]] 49; CHECK-NEXT: [[TMP14:%.*]] = icmp slt <4 x i8> [[TMP11]], [[BROADCAST_SPLAT]] 50; CHECK-NEXT: [[TMP15:%.*]] = zext <4 x i1> [[TMP14]] to <4 x i8> 51; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[TMP13]], i32 0 52; CHECK-NEXT: store <4 x i8> [[TMP15]], ptr [[TMP16]], align 1 53; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 54; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i8> [[VEC_IND]], splat (i8 4) 55; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 56; CHECK-NEXT: br i1 [[TMP17]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 57; CHECK: middle.block: 58; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP3]], [[N_VEC]] 59; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_EXIT:%.*]], label [[SCALAR_PH]] 60; CHECK: scalar.ph: 61; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i8 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[FOR_PREHEADER]] ] 62; CHECK-NEXT: br label [[FOR_BODY:%.*]] 63; CHECK: for.body: 64; CHECK-NEXT: [[IV:%.*]] = phi i8 [ [[IV_NEXT:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 65; CHECK-NEXT: [[IV_NEXT]] = add i8 [[IV]], 1 66; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i8, ptr [[ARR]], i8 [[IV_NEXT]] 67; CHECK-NEXT: [[T3_I:%.*]] = icmp slt i8 [[IV_NEXT]], [[T9]] 68; CHECK-NEXT: [[T3_I8:%.*]] = zext i1 [[T3_I]] to i8 69; CHECK-NEXT: store i8 [[T3_I8]], ptr [[PTR]], align 1 70; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[T1_0_LCSSA1]], [[PTR]] 71; CHECK-NEXT: br i1 [[EC]], label [[FOR_EXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] 72; CHECK: for.exit: 73; CHECK-NEXT: [[IV_NEXT_LCSSA:%.*]] = phi i8 [ [[IV_NEXT]], [[FOR_BODY]] ], [ [[IND_END]], [[MIDDLE_BLOCK]] ] 74; CHECK-NEXT: ret i8 [[IV_NEXT_LCSSA]] 75; 76bb: 77 br label %bb6 78 79bb6: 80 %t1.0 = phi ptr [ %arr, %bb ], [ null, %bb6 ] 81 %c = call i1 @cond() 82 br i1 %c, label %for.preheader, label %bb6 83 84for.preheader: 85 br label %for.body 86 87for.body: 88 %iv = phi i8 [ %iv.next, %for.body ], [ 0, %for.preheader ] 89 %iv.next = add i8 %iv, 1 90 %ptr = getelementptr inbounds i8, ptr %arr, i8 %iv.next 91 %t3.i = icmp slt i8 %iv.next, %t9 92 %t3.i8 = zext i1 %t3.i to i8 93 store i8 %t3.i8, ptr %ptr 94 %ec = icmp eq ptr %t1.0, %ptr 95 br i1 %ec, label %for.exit, label %for.body 96 97for.exit: 98 %iv.next.lcssa = phi i8 [ %iv.next, %for.body ] 99 ret i8 %iv.next.lcssa 100} 101 102declare i1 @cond() 103