1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2; RUN: opt -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -S < %s | FileCheck %s --check-prefix=CHECK 3; RUN: opt -passes=loop-vectorize -force-vector-interleave=4 -force-vector-width=4 -S < %s | FileCheck %s --check-prefix=CHECK 4; RUN: opt -passes=loop-vectorize -force-vector-interleave=4 -force-vector-width=1 -S < %s | FileCheck %s --check-prefix=CHECK 5 6define i64 @select_non_const_iv_start_signed_guard(ptr %a, i64 %rdx_start, i64 %iv_start ,i64 %n) { 7; CHECK-LABEL: define i64 @select_non_const_iv_start_signed_guard( 8; CHECK-SAME: ptr [[A:%.*]], i64 [[RDX_START:%.*]], i64 [[IV_START:%.*]], i64 [[N:%.*]]) { 9; CHECK-NEXT: [[ENTRY:.*]]: 10; CHECK-NEXT: [[GUARD:%.*]] = icmp slt i64 [[IV_START]], [[N]] 11; CHECK-NEXT: br i1 [[GUARD]], label %[[FOR_BODY_PREHEADER:.*]], label %[[EXIT:.*]] 12; CHECK: [[FOR_BODY_PREHEADER]]: 13; CHECK-NEXT: br label %[[FOR_BODY:.*]] 14; CHECK: [[FOR_BODY]]: 15; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[IV_START]], %[[FOR_BODY_PREHEADER]] ] 16; CHECK-NEXT: [[RDX_07:%.*]] = phi i64 [ [[COND:%.*]], %[[FOR_BODY]] ], [ [[RDX_START]], %[[FOR_BODY_PREHEADER]] ] 17; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]] 18; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[ARRAYIDX]], align 4 19; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i64 [[TMP0]], 3 20; CHECK-NEXT: [[COND]] = select i1 [[CMP1]], i64 [[IV]], i64 [[RDX_07]] 21; CHECK-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 1 22; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]] 23; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT_LOOPEXIT:.*]], label %[[FOR_BODY]] 24; CHECK: [[EXIT_LOOPEXIT]]: 25; CHECK-NEXT: [[COND_LCSSA:%.*]] = phi i64 [ [[COND]], %[[FOR_BODY]] ] 26; CHECK-NEXT: br label %[[EXIT]] 27; CHECK: [[EXIT]]: 28; CHECK-NEXT: [[IDX_0_LCSSA:%.*]] = phi i64 [ [[RDX_START]], %[[ENTRY]] ], [ [[COND_LCSSA]], %[[EXIT_LOOPEXIT]] ] 29; CHECK-NEXT: ret i64 [[IDX_0_LCSSA]] 30; 31entry: 32 %guard = icmp slt i64 %iv_start, %n 33 br i1 %guard, label %for.body, label %exit 34 35for.body: 36 %iv = phi i64 [ %iv_start, %entry ], [ %iv.next, %for.body ] 37 %rdx.07 = phi i64 [ %rdx_start, %entry ], [ %cond, %for.body ] 38 %arrayidx = getelementptr inbounds i64, ptr %a, i64 %iv 39 %1 = load i64, ptr %arrayidx, align 4 40 %cmp1 = icmp sgt i64 %1, 3 41 %cond = select i1 %cmp1, i64 %iv, i64 %rdx.07 42 %iv.next = add nsw i64 %iv, 1 43 %exitcond.not = icmp eq i64 %iv.next, %n 44 br i1 %exitcond.not, label %exit, label %for.body 45 46exit: 47 %idx.0.lcssa = phi i64 [ %rdx_start, %entry ], [ %cond, %for.body ] 48 ret i64 %idx.0.lcssa 49} 50 51define i32 @select_trunc_non_const_iv_start_signed_guard(ptr %a, i32 %rdx_start, i32 %iv_start ,i32 %n) { 52; CHECK-LABEL: define i32 @select_trunc_non_const_iv_start_signed_guard( 53; CHECK-SAME: ptr [[A:%.*]], i32 [[RDX_START:%.*]], i32 [[IV_START:%.*]], i32 [[N:%.*]]) { 54; CHECK-NEXT: [[ENTRY:.*]]: 55; CHECK-NEXT: [[GUARD:%.*]] = icmp slt i32 [[IV_START]], [[N]] 56; CHECK-NEXT: br i1 [[GUARD]], label %[[FOR_BODY_PREHEADER:.*]], label %[[EXIT:.*]] 57; CHECK: [[FOR_BODY_PREHEADER]]: 58; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[IV_START]] to i64 59; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = sext i32 [[N]] to i64 60; CHECK-NEXT: br label %[[FOR_BODY:.*]] 61; CHECK: [[FOR_BODY]]: 62; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[TMP0]], %[[FOR_BODY_PREHEADER]] ], [ [[IV_NEXT:%.*]], %[[FOR_BODY]] ] 63; CHECK-NEXT: [[RDX_07:%.*]] = phi i32 [ [[RDX_START]], %[[FOR_BODY_PREHEADER]] ], [ [[COND:%.*]], %[[FOR_BODY]] ] 64; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]] 65; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 66; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[TMP1]], 3 67; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[IV]] to i32 68; CHECK-NEXT: [[COND]] = select i1 [[CMP1]], i32 [[TMP2]], i32 [[RDX_07]] 69; CHECK-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 1 70; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[WIDE_TRIP_COUNT]] 71; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT_LOOPEXIT:.*]], label %[[FOR_BODY]] 72; CHECK: [[EXIT_LOOPEXIT]]: 73; CHECK-NEXT: [[COND_LCSSA:%.*]] = phi i32 [ [[COND]], %[[FOR_BODY]] ] 74; CHECK-NEXT: br label %[[EXIT]] 75; CHECK: [[EXIT]]: 76; CHECK-NEXT: [[IDX_0_LCSSA:%.*]] = phi i32 [ [[RDX_START]], %[[ENTRY]] ], [ [[COND_LCSSA]], %[[EXIT_LOOPEXIT]] ] 77; CHECK-NEXT: ret i32 [[IDX_0_LCSSA]] 78; 79entry: 80 %guard = icmp slt i32 %iv_start, %n 81 br i1 %guard, label %for.body.preheader, label %exit 82 83for.body.preheader: 84 %0 = sext i32 %iv_start to i64 85 %wide.trip.count = sext i32 %n to i64 86 br label %for.body 87 88for.body: 89 %iv = phi i64 [ %0, %for.body.preheader ], [ %iv.next, %for.body ] 90 %rdx.07 = phi i32 [ %rdx_start, %for.body.preheader ], [ %cond, %for.body ] 91 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %iv 92 %1 = load i32, ptr %arrayidx, align 4 93 %cmp1 = icmp sgt i32 %1, 3 94 %2 = trunc i64 %iv to i32 95 %cond = select i1 %cmp1, i32 %2, i32 %rdx.07 96 %iv.next = add nsw i64 %iv, 1 97 %exitcond.not = icmp eq i64 %iv.next, %wide.trip.count 98 br i1 %exitcond.not, label %exit, label %for.body 99 100exit: 101 %idx.0.lcssa = phi i32 [ %rdx_start, %entry ], [ %cond, %for.body ] 102 ret i32 %idx.0.lcssa 103} 104