xref: /llvm-project/llvm/test/Transforms/LoopVectorize/forked-pointers.ll (revision be51fa4580b3274d35cc77bedb238a9ad5fb04bc)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes=loop-vectorize,instcombine -force-vector-width=4 -S < %s 2>&1 | FileCheck %s
3
4target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5
6;;;; Derived from the following C code
7;; void forked_ptrs_different_base_same_offset(float *A, float *B, float *C, int *D) {
8;;   for (int i=0; i<100; i++) {
9;;     if (D[i] != 0) {
10;;       C[i] = A[i];
11;;     } else {
12;;       C[i] = B[i];
13;;     }
14;;   }
15;; }
16
17define dso_local void @forked_ptrs_different_base_same_offset(float* nocapture readonly %Base1, float* nocapture readonly %Base2, float* nocapture %Dest, i32* nocapture readonly %Preds) {
18; CHECK-LABEL: @forked_ptrs_different_base_same_offset(
19; CHECK-NEXT:  entry:
20; CHECK-NEXT:    [[BASE1_FR:%.*]] = freeze float* [[BASE1:%.*]]
21; CHECK-NEXT:    [[BASE2_FR:%.*]] = freeze float* [[BASE2:%.*]]
22; CHECK-NEXT:    [[DEST_FR:%.*]] = freeze float* [[DEST:%.*]]
23; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
24; CHECK:       vector.memcheck:
25; CHECK-NEXT:    [[DEST1:%.*]] = ptrtoint float* [[DEST_FR]] to i64
26; CHECK-NEXT:    [[PREDS2:%.*]] = ptrtoint i32* [[PREDS:%.*]] to i64
27; CHECK-NEXT:    [[BASE23:%.*]] = ptrtoint float* [[BASE2_FR]] to i64
28; CHECK-NEXT:    [[BASE15:%.*]] = ptrtoint float* [[BASE1_FR]] to i64
29; CHECK-NEXT:    [[TMP0:%.*]] = sub i64 [[DEST1]], [[PREDS2]]
30; CHECK-NEXT:    [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 16
31; CHECK-NEXT:    [[TMP1:%.*]] = sub i64 [[DEST1]], [[BASE23]]
32; CHECK-NEXT:    [[DIFF_CHECK4:%.*]] = icmp ult i64 [[TMP1]], 16
33; CHECK-NEXT:    [[CONFLICT_RDX:%.*]] = or i1 [[DIFF_CHECK]], [[DIFF_CHECK4]]
34; CHECK-NEXT:    [[TMP2:%.*]] = sub i64 [[DEST1]], [[BASE15]]
35; CHECK-NEXT:    [[DIFF_CHECK7:%.*]] = icmp ult i64 [[TMP2]], 16
36; CHECK-NEXT:    [[CONFLICT_RDX8:%.*]] = or i1 [[CONFLICT_RDX]], [[DIFF_CHECK7]]
37; CHECK-NEXT:    br i1 [[CONFLICT_RDX8]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
38; CHECK:       vector.ph:
39; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float*> poison, float* [[BASE2_FR]], i64 0
40; CHECK-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float*> [[BROADCAST_SPLATINSERT]], <4 x float*> poison, <4 x i32> zeroinitializer
41; CHECK-NEXT:    [[BROADCAST_SPLATINSERT9:%.*]] = insertelement <4 x float*> poison, float* [[BASE1_FR]], i64 0
42; CHECK-NEXT:    [[BROADCAST_SPLAT10:%.*]] = shufflevector <4 x float*> [[BROADCAST_SPLATINSERT9]], <4 x float*> poison, <4 x i32> zeroinitializer
43; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
44; CHECK:       vector.body:
45; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
46; CHECK-NEXT:    [[TMP3:%.*]] = or i64 [[INDEX]], 1
47; CHECK-NEXT:    [[TMP4:%.*]] = or i64 [[INDEX]], 2
48; CHECK-NEXT:    [[TMP5:%.*]] = or i64 [[INDEX]], 3
49; CHECK-NEXT:    [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[PREDS]], i64 [[INDEX]]
50; CHECK-NEXT:    [[TMP7:%.*]] = bitcast i32* [[TMP6]] to <4 x i32>*
51; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP7]], align 4
52; CHECK-NEXT:    [[TMP8:%.*]] = icmp eq <4 x i32> [[WIDE_LOAD]], zeroinitializer
53; CHECK-NEXT:    [[TMP9:%.*]] = select <4 x i1> [[TMP8]], <4 x float*> [[BROADCAST_SPLAT]], <4 x float*> [[BROADCAST_SPLAT10]]
54; CHECK-NEXT:    [[TMP10:%.*]] = extractelement <4 x float*> [[TMP9]], i64 0
55; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr inbounds float, float* [[TMP10]], i64 [[INDEX]]
56; CHECK-NEXT:    [[TMP12:%.*]] = extractelement <4 x float*> [[TMP9]], i64 1
57; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr inbounds float, float* [[TMP12]], i64 [[TMP3]]
58; CHECK-NEXT:    [[TMP14:%.*]] = extractelement <4 x float*> [[TMP9]], i64 2
59; CHECK-NEXT:    [[TMP15:%.*]] = getelementptr inbounds float, float* [[TMP14]], i64 [[TMP4]]
60; CHECK-NEXT:    [[TMP16:%.*]] = extractelement <4 x float*> [[TMP9]], i64 3
61; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds float, float* [[TMP16]], i64 [[TMP5]]
62; CHECK-NEXT:    [[TMP18:%.*]] = load float, float* [[TMP11]], align 4
63; CHECK-NEXT:    [[TMP19:%.*]] = load float, float* [[TMP13]], align 4
64; CHECK-NEXT:    [[TMP20:%.*]] = load float, float* [[TMP15]], align 4
65; CHECK-NEXT:    [[TMP21:%.*]] = load float, float* [[TMP17]], align 4
66; CHECK-NEXT:    [[TMP22:%.*]] = insertelement <4 x float> poison, float [[TMP18]], i64 0
67; CHECK-NEXT:    [[TMP23:%.*]] = insertelement <4 x float> [[TMP22]], float [[TMP19]], i64 1
68; CHECK-NEXT:    [[TMP24:%.*]] = insertelement <4 x float> [[TMP23]], float [[TMP20]], i64 2
69; CHECK-NEXT:    [[TMP25:%.*]] = insertelement <4 x float> [[TMP24]], float [[TMP21]], i64 3
70; CHECK-NEXT:    [[TMP26:%.*]] = getelementptr inbounds float, float* [[DEST_FR]], i64 [[INDEX]]
71; CHECK-NEXT:    [[TMP27:%.*]] = bitcast float* [[TMP26]] to <4 x float>*
72; CHECK-NEXT:    store <4 x float> [[TMP25]], <4 x float>* [[TMP27]], align 4
73; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
74; CHECK-NEXT:    [[TMP28:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100
75; CHECK-NEXT:    br i1 [[TMP28]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
76; CHECK:       middle.block:
77; CHECK-NEXT:    br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]]
78; CHECK:       scalar.ph:
79; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_MEMCHECK]] ]
80; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
81; CHECK:       for.cond.cleanup:
82; CHECK-NEXT:    ret void
83; CHECK:       for.body:
84; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
85; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[PREDS]], i64 [[INDVARS_IV]]
86; CHECK-NEXT:    [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
87; CHECK-NEXT:    [[CMP1_NOT:%.*]] = icmp eq i32 [[TMP29]], 0
88; CHECK-NEXT:    [[SPEC_SELECT:%.*]] = select i1 [[CMP1_NOT]], float* [[BASE2_FR]], float* [[BASE1_FR]]
89; CHECK-NEXT:    [[DOTSINK_IN:%.*]] = getelementptr inbounds float, float* [[SPEC_SELECT]], i64 [[INDVARS_IV]]
90; CHECK-NEXT:    [[DOTSINK:%.*]] = load float, float* [[DOTSINK_IN]], align 4
91; CHECK-NEXT:    [[TMP30:%.*]] = getelementptr inbounds float, float* [[DEST_FR]], i64 [[INDVARS_IV]]
92; CHECK-NEXT:    store float [[DOTSINK]], float* [[TMP30]], align 4
93; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
94; CHECK-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 100
95; CHECK-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
96;
97entry:
98  br label %for.body
99
100for.cond.cleanup:
101  ret void
102
103for.body:
104  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
105  %arrayidx = getelementptr inbounds i32, i32* %Preds, i64 %indvars.iv
106  %0 = load i32, i32* %arrayidx, align 4
107  %cmp1.not = icmp eq i32 %0, 0
108  %spec.select = select i1 %cmp1.not, float* %Base2, float* %Base1
109  %.sink.in = getelementptr inbounds float, float* %spec.select, i64 %indvars.iv
110  %.sink = load float, float* %.sink.in, align 4
111  %1 = getelementptr inbounds float, float* %Dest, i64 %indvars.iv
112  store float %.sink, float* %1, align 4
113  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
114  %exitcond.not = icmp eq i64 %indvars.iv.next, 100
115  br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
116}
117
118;;;; Derived from the following C code
119;; void forked_ptrs_same_base_different_offset(float *A, float *B, int *C) {
120;;   int offset;
121;;   for (int i = 0; i < 100; i++) {
122;;     if (C[i] != 0)
123;;       offset = i;
124;;     else
125;;       offset = i+1;
126;;     B[i] = A[offset];
127;;   }
128;; }
129
130define dso_local void @forked_ptrs_same_base_different_offset(float* nocapture readonly %Base, float* nocapture %Dest, i32* nocapture readonly %Preds) {
131; CHECK-LABEL: @forked_ptrs_same_base_different_offset(
132; CHECK-NEXT:  entry:
133; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
134; CHECK:       for.cond.cleanup:
135; CHECK-NEXT:    ret void
136; CHECK:       for.body:
137; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
138; CHECK-NEXT:    [[I_014:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]
139; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[PREDS:%.*]], i64 [[INDVARS_IV]]
140; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
141; CHECK-NEXT:    [[CMP1_NOT:%.*]] = icmp eq i32 [[TMP0]], 0
142; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
143; CHECK-NEXT:    [[ADD]] = add nuw nsw i32 [[I_014]], 1
144; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
145; CHECK-NEXT:    [[OFFSET_0:%.*]] = select i1 [[CMP1_NOT]], i32 [[ADD]], i32 [[TMP1]]
146; CHECK-NEXT:    [[IDXPROM213:%.*]] = zext i32 [[OFFSET_0]] to i64
147; CHECK-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[BASE:%.*]], i64 [[IDXPROM213]]
148; CHECK-NEXT:    [[TMP2:%.*]] = load float, float* [[ARRAYIDX3]], align 4
149; CHECK-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds float, float* [[DEST:%.*]], i64 [[INDVARS_IV]]
150; CHECK-NEXT:    store float [[TMP2]], float* [[ARRAYIDX5]], align 4
151; CHECK-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 100
152; CHECK-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
153;
154entry:
155  br label %for.body
156
157for.cond.cleanup:                                 ; preds = %for.body
158  ret void
159
160for.body:                                         ; preds = %entry, %for.body
161  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
162  %i.014 = phi i32 [ 0, %entry ], [ %add, %for.body ]
163  %arrayidx = getelementptr inbounds i32, i32* %Preds, i64 %indvars.iv
164  %0 = load i32, i32* %arrayidx, align 4
165  %cmp1.not = icmp eq i32 %0, 0
166  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
167  %add = add nuw nsw i32 %i.014, 1
168  %1 = trunc i64 %indvars.iv to i32
169  %offset.0 = select i1 %cmp1.not, i32 %add, i32 %1
170  %idxprom213 = zext i32 %offset.0 to i64
171  %arrayidx3 = getelementptr inbounds float, float* %Base, i64 %idxprom213
172  %2 = load float, float* %arrayidx3, align 4
173  %arrayidx5 = getelementptr inbounds float, float* %Dest, i64 %indvars.iv
174  store float %2, float* %arrayidx5, align 4
175  %exitcond.not = icmp eq i64 %indvars.iv.next, 100
176  br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
177}
178