1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=loop-vectorize,instcombine -force-vector-width=4 -S < %s 2>&1 | FileCheck %s 3 4target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" 5 6;;;; Derived from the following C code 7;; void forked_ptrs_different_base_same_offset(ptr A, ptr B, ptr C, int *D) { 8;; for (int i=0; i<100; i++) { 9;; if (D[i] != 0) { 10;; C[i] = A[i]; 11;; } else { 12;; C[i] = B[i]; 13;; } 14;; } 15;; } 16 17define dso_local void @forked_ptrs_different_base_same_offset(ptr nocapture readonly %Base1, ptr nocapture readonly %Base2, ptr nocapture %Dest, ptr nocapture readonly %Preds) { 18; CHECK-LABEL: @forked_ptrs_different_base_same_offset( 19; CHECK-NEXT: entry: 20; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] 21; CHECK: vector.memcheck: 22; CHECK-NEXT: [[DEST1:%.*]] = ptrtoint ptr [[DEST:%.*]] to i64 23; CHECK-NEXT: [[PREDS2:%.*]] = ptrtoint ptr [[PREDS:%.*]] to i64 24; CHECK-NEXT: [[BASE23:%.*]] = ptrtoint ptr [[BASE2:%.*]] to i64 25; CHECK-NEXT: [[BASE15:%.*]] = ptrtoint ptr [[BASE1:%.*]] to i64 26; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[DEST1]], [[PREDS2]] 27; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 16 28; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[DEST1]], [[BASE23]] 29; CHECK-NEXT: [[DOTFR:%.*]] = freeze i64 [[TMP1]] 30; CHECK-NEXT: [[DIFF_CHECK4:%.*]] = icmp ult i64 [[DOTFR]], 16 31; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[DIFF_CHECK]], [[DIFF_CHECK4]] 32; CHECK-NEXT: [[TMP2:%.*]] = sub i64 [[DEST1]], [[BASE15]] 33; CHECK-NEXT: [[DOTFR10:%.*]] = freeze i64 [[TMP2]] 34; CHECK-NEXT: [[DIFF_CHECK6:%.*]] = icmp ult i64 [[DOTFR10]], 16 35; CHECK-NEXT: [[CONFLICT_RDX7:%.*]] = or i1 [[CONFLICT_RDX]], [[DIFF_CHECK6]] 36; CHECK-NEXT: br i1 [[CONFLICT_RDX7]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 37; CHECK: vector.ph: 38; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x ptr> poison, ptr [[BASE2]], i64 0 39; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x ptr> [[BROADCAST_SPLATINSERT]], <4 x ptr> poison, <4 x i32> zeroinitializer 40; CHECK-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <4 x ptr> poison, ptr [[BASE1]], i64 0 41; CHECK-NEXT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <4 x ptr> [[BROADCAST_SPLATINSERT8]], <4 x ptr> poison, <4 x i32> zeroinitializer 42; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 43; CHECK: vector.body: 44; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 45; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i64 [[INDEX]], 1 46; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i64 [[INDEX]], 2 47; CHECK-NEXT: [[TMP5:%.*]] = or disjoint i64 [[INDEX]], 3 48; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[PREDS]], i64 [[INDEX]] 49; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP6]], align 4 50; CHECK-NEXT: [[TMP7:%.*]] = icmp eq <4 x i32> [[WIDE_LOAD]], zeroinitializer 51; CHECK-NEXT: [[TMP8:%.*]] = select <4 x i1> [[TMP7]], <4 x ptr> [[BROADCAST_SPLAT]], <4 x ptr> [[BROADCAST_SPLAT9]] 52; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x ptr> [[TMP8]], i64 0 53; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr [[TMP9]], i64 [[INDEX]] 54; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x ptr> [[TMP8]], i64 1 55; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds float, ptr [[TMP11]], i64 [[TMP3]] 56; CHECK-NEXT: [[TMP13:%.*]] = extractelement <4 x ptr> [[TMP8]], i64 2 57; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i64 [[TMP4]] 58; CHECK-NEXT: [[TMP15:%.*]] = extractelement <4 x ptr> [[TMP8]], i64 3 59; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i64 [[TMP5]] 60; CHECK-NEXT: [[TMP17:%.*]] = load float, ptr [[TMP10]], align 4 61; CHECK-NEXT: [[TMP18:%.*]] = load float, ptr [[TMP12]], align 4 62; CHECK-NEXT: [[TMP19:%.*]] = load float, ptr [[TMP14]], align 4 63; CHECK-NEXT: [[TMP20:%.*]] = load float, ptr [[TMP16]], align 4 64; CHECK-NEXT: [[TMP21:%.*]] = insertelement <4 x float> poison, float [[TMP17]], i64 0 65; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x float> [[TMP21]], float [[TMP18]], i64 1 66; CHECK-NEXT: [[TMP23:%.*]] = insertelement <4 x float> [[TMP22]], float [[TMP19]], i64 2 67; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x float> [[TMP23]], float [[TMP20]], i64 3 68; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds float, ptr [[DEST]], i64 [[INDEX]] 69; CHECK-NEXT: store <4 x float> [[TMP24]], ptr [[TMP25]], align 4 70; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 71; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 72; CHECK-NEXT: br i1 [[TMP26]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 73; CHECK: middle.block: 74; CHECK-NEXT: br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]] 75; CHECK: scalar.ph: 76; CHECK-NEXT: br label [[FOR_BODY:%.*]] 77; CHECK: for.cond.cleanup: 78; CHECK-NEXT: ret void 79; CHECK: for.body: 80; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 81; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr [[PREDS]], i64 [[INDVARS_IV]] 82; CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 83; CHECK-NEXT: [[CMP1_NOT:%.*]] = icmp eq i32 [[TMP27]], 0 84; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[CMP1_NOT]], ptr [[BASE2]], ptr [[BASE1]] 85; CHECK-NEXT: [[DOTSINK_IN:%.*]] = getelementptr inbounds nuw float, ptr [[SPEC_SELECT]], i64 [[INDVARS_IV]] 86; CHECK-NEXT: [[DOTSINK:%.*]] = load float, ptr [[DOTSINK_IN]], align 4 87; CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw float, ptr [[DEST]], i64 [[INDVARS_IV]] 88; CHECK-NEXT: store float [[DOTSINK]], ptr [[TMP28]], align 4 89; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 90; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 100 91; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] 92; 93entry: 94 br label %for.body 95 96for.cond.cleanup: 97 ret void 98 99for.body: 100 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 101 %arrayidx = getelementptr inbounds i32, ptr %Preds, i64 %indvars.iv 102 %0 = load i32, ptr %arrayidx, align 4 103 %cmp1.not = icmp eq i32 %0, 0 104 %spec.select = select i1 %cmp1.not, ptr %Base2, ptr %Base1 105 %.sink.in = getelementptr inbounds float, ptr %spec.select, i64 %indvars.iv 106 %.sink = load float, ptr %.sink.in, align 4 107 %1 = getelementptr inbounds float, ptr %Dest, i64 %indvars.iv 108 store float %.sink, ptr %1, align 4 109 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 110 %exitcond.not = icmp eq i64 %indvars.iv.next, 100 111 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body 112} 113 114;;;; Derived from the following C code 115;; void forked_ptrs_same_base_different_offset(ptr A, ptr B, int *C) { 116;; int offset; 117;; for (int i = 0; i < 100; i++) { 118;; if (C[i] != 0) 119;; offset = i; 120;; else 121;; offset = i+1; 122;; B[i] = A[offset]; 123;; } 124;; } 125 126define dso_local void @forked_ptrs_same_base_different_offset(ptr nocapture readonly %Base, ptr nocapture %Dest, ptr nocapture readonly %Preds) { 127; CHECK-LABEL: @forked_ptrs_same_base_different_offset( 128; CHECK-NEXT: entry: 129; CHECK-NEXT: br label [[FOR_BODY:%.*]] 130; CHECK: for.cond.cleanup: 131; CHECK-NEXT: ret void 132; CHECK: for.body: 133; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 134; CHECK-NEXT: [[I_014:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_BODY]] ] 135; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr [[PREDS:%.*]], i64 [[INDVARS_IV]] 136; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 137; CHECK-NEXT: [[CMP1_NOT:%.*]] = icmp eq i32 [[TMP0]], 0 138; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 139; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_014]], 1 140; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32 141; CHECK-NEXT: [[OFFSET_0:%.*]] = select i1 [[CMP1_NOT]], i32 [[ADD]], i32 [[TMP1]] 142; CHECK-NEXT: [[IDXPROM213:%.*]] = zext i32 [[OFFSET_0]] to i64 143; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[BASE:%.*]], i64 [[IDXPROM213]] 144; CHECK-NEXT: [[TMP2:%.*]] = load float, ptr [[ARRAYIDX3]], align 4 145; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw float, ptr [[DEST:%.*]], i64 [[INDVARS_IV]] 146; CHECK-NEXT: store float [[TMP2]], ptr [[ARRAYIDX5]], align 4 147; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 100 148; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]] 149; 150entry: 151 br label %for.body 152 153for.cond.cleanup: ; preds = %for.body 154 ret void 155 156for.body: ; preds = %entry, %for.body 157 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 158 %i.014 = phi i32 [ 0, %entry ], [ %add, %for.body ] 159 %arrayidx = getelementptr inbounds i32, ptr %Preds, i64 %indvars.iv 160 %0 = load i32, ptr %arrayidx, align 4 161 %cmp1.not = icmp eq i32 %0, 0 162 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 163 %add = add nuw nsw i32 %i.014, 1 164 %1 = trunc i64 %indvars.iv to i32 165 %offset.0 = select i1 %cmp1.not, i32 %add, i32 %1 166 %idxprom213 = zext i32 %offset.0 to i64 167 %arrayidx3 = getelementptr inbounds float, ptr %Base, i64 %idxprom213 168 %2 = load float, ptr %arrayidx3, align 4 169 %arrayidx5 = getelementptr inbounds float, ptr %Dest, i64 %indvars.iv 170 store float %2, ptr %arrayidx5, align 4 171 %exitcond.not = icmp eq i64 %indvars.iv.next, 100 172 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body 173} 174