xref: /llvm-project/llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll (revision 38fffa630ee80163dc65e759392ad29798905679) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN:opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s
3
4; For %for.1, we are fine initially, because the previous value %for.1.next dominates the
5; user of %for.1. But for %for.2, we have to sink the user (%for.1.next) past the previous
6; value %for.2.next. This however breaks the condition we have for %for.1. We cannot fix
7; both first order recurrences and cannot vectorize the loop.
8define i32 @c(i32 %N) {
9; CHECK-LABEL: @c(
10; CHECK-NEXT:  entry:
11; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
12; CHECK:       for.body:
13; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [ 10, [[ENTRY:%.*]] ]
14; CHECK-NEXT:    [[FOR_1:%.*]] = phi i32 [ [[FOR_1_NEXT:%.*]], [[FOR_BODY]] ], [ 20, [[ENTRY]] ]
15; CHECK-NEXT:    [[FOR_2:%.*]] = phi i32 [ [[FOR_2_NEXT:%.*]], [[FOR_BODY]] ], [ 11, [[ENTRY]] ]
16; CHECK-NEXT:    [[FOR_1_NEXT]] = add nsw i32 [[FOR_2]], 1
17; CHECK-NEXT:    [[FOR_2_NEXT]] = shl i32 [[FOR_1]], 24
18; CHECK-NEXT:    [[INC]] = add nsw i32 [[IV]], 1
19; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[N:%.*]]
20; CHECK-NEXT:    br i1 [[EXITCOND]], label [[FOR_COND1_FOR_END_CRIT_EDGE:%.*]], label [[FOR_BODY]]
21; CHECK:       for.cond1.for.end_crit_edge:
22; CHECK-NEXT:    [[ADD_LCSSA:%.*]] = phi i32 [ [[FOR_1_NEXT]], [[FOR_BODY]] ]
23; CHECK-NEXT:    [[SEXT_LCSSA:%.*]] = phi i32 [ [[FOR_2_NEXT]], [[FOR_BODY]] ]
24; CHECK-NEXT:    [[RES:%.*]] = add i32 [[ADD_LCSSA]], [[SEXT_LCSSA]]
25; CHECK-NEXT:    ret i32 [[RES]]
26;
27entry:
28  br label %for.body
29
30for.body:                                         ; preds = %for.body.preheader, %for.body
31  %iv  = phi i32 [ %inc, %for.body ], [ 10, %entry ]
32  %for.1 = phi i32 [ %for.1.next, %for.body ], [ 20, %entry ]
33  %for.2 = phi i32 [ %for.2.next, %for.body ], [ 11, %entry ]
34  %for.1.next = add nsw i32 %for.2, 1
35  %for.2.next = shl i32 %for.1, 24
36  %inc = add nsw i32 %iv, 1
37  %exitcond = icmp eq i32 %inc, %N
38  br i1 %exitcond, label %for.cond1.for.end_crit_edge, label %for.body
39
40for.cond1.for.end_crit_edge:                      ; preds = %for.body
41  %add.lcssa = phi i32 [ %for.1.next, %for.body ]
42  %sext.lcssa = phi i32 [ %for.2.next, %for.body ]
43  %res = add i32 %add.lcssa, %sext.lcssa
44  ret i32 %res
45}
46
47
48; The 'previous' instruction of %for.2 is in a separate block.
49; PR54195.
50define void @multiple_recurrences_with_previous_in_different_block(i32 %a, i8 %b, ptr %ptr) {
51; CHECK-LABEL: @multiple_recurrences_with_previous_in_different_block(
52; CHECK-NEXT:  entry:
53; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]
54; CHECK:       loop.header:
55; CHECK-NEXT:    [[FOR_1:%.*]] = phi i8 [ 10, [[ENTRY:%.*]] ], [ [[FOR_1_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
56; CHECK-NEXT:    [[FOR_2:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[FOR_2_NEXT:%.*]], [[LOOP_LATCH]] ]
57; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH]] ]
58; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[FOR_1]] to i64
59; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i64 [[CONV]], [[FOR_2]]
60; CHECK-NEXT:    [[IV_NEXT]] = add nuw i64 [[IV]], 1
61; CHECK-NEXT:    [[FOR_1_NEXT]] = xor i8 [[B:%.*]], 6
62; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 1000
63; CHECK-NEXT:    br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[LOOP_LATCH]]
64; CHECK:       loop.latch:
65; CHECK-NEXT:    [[PTR_GEP:%.*]] = getelementptr inbounds i64, ptr [[PTR:%.*]], i64 [[IV]]
66; CHECK-NEXT:    store i64 [[SUB]], ptr [[PTR_GEP]], align 4
67; CHECK-NEXT:    [[FOR_2_NEXT]] = zext i32 [[A:%.*]] to i64
68; CHECK-NEXT:    br label [[LOOP_HEADER]]
69; CHECK:       exit:
70; CHECK-NEXT:    ret void
71;
72entry:
73  br label %loop.header
74
75loop.header:
76  %for.1 = phi i8 [ 10, %entry ], [ %for.1.next, %loop.latch ]
77  %for.2 = phi i64  [0, %entry ], [ %for.2.next, %loop.latch ]
78  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
79  %conv = sext i8 %for.1 to i64
80  %sub = sub nsw i64 %conv, %for.2
81  %iv.next = add nuw i64 %iv, 1
82  %for.1.next = xor i8 %b, 6
83  %exitcond = icmp eq i64 %iv, 1000
84  br i1 %exitcond, label %exit, label %loop.latch
85
86loop.latch:
87  %ptr.gep = getelementptr inbounds i64, ptr %ptr, i64 %iv
88  store i64 %sub, ptr %ptr.gep
89  %for.2.next = zext i32 %a to i64
90  br label %loop.header
91
92exit:
93  ret void
94}
95
96define void @test_pr54223_sink_after_insertion_order(ptr noalias %a, ptr noalias %b, ptr noalias %dst) {
97; CHECK-LABEL: @test_pr54223_sink_after_insertion_order(
98; CHECK-NEXT:  entry:
99; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
100; CHECK:       vector.ph:
101; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
102; CHECK:       vector.body:
103; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
104; CHECK-NEXT:    [[VECTOR_RECUR:%.*]] = phi <4 x float> [ <float poison, float poison, float poison, float 0.000000e+00>, [[VECTOR_PH]] ], [ [[BROADCAST_SPLAT:%.*]], [[VECTOR_BODY]] ]
105; CHECK-NEXT:    [[VECTOR_RECUR1:%.*]] = phi <4 x float> [ <float poison, float poison, float poison, float 0.000000e+00>, [[VECTOR_PH]] ], [ [[BROADCAST_SPLAT3:%.*]], [[VECTOR_BODY]] ]
106; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 0
107; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds float, ptr [[DST:%.*]], i64 [[TMP0]]
108; CHECK-NEXT:    [[TMP2:%.*]] = load float, ptr [[A:%.*]], align 4
109; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[TMP2]], i64 0
110; CHECK-NEXT:    [[BROADCAST_SPLAT]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer
111; CHECK-NEXT:    [[TMP3:%.*]] = shufflevector <4 x float> [[VECTOR_RECUR]], <4 x float> [[BROADCAST_SPLAT]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>
112; CHECK-NEXT:    [[TMP4:%.*]] = load float, ptr [[B:%.*]], align 4
113; CHECK-NEXT:    [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <4 x float> poison, float [[TMP4]], i64 0
114; CHECK-NEXT:    [[BROADCAST_SPLAT3]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT2]], <4 x float> poison, <4 x i32> zeroinitializer
115; CHECK-NEXT:    [[TMP5:%.*]] = shufflevector <4 x float> [[VECTOR_RECUR1]], <4 x float> [[BROADCAST_SPLAT3]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>
116; CHECK-NEXT:    [[TMP6:%.*]] = fneg <4 x float> [[TMP5]]
117; CHECK-NEXT:    [[TMP7:%.*]] = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x float> zeroinitializer)
118; CHECK-NEXT:    [[TMP8:%.*]] = getelementptr inbounds float, ptr [[TMP1]], i32 0
119; CHECK-NEXT:    store <4 x float> [[TMP7]], ptr [[TMP8]], align 4
120; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
121; CHECK-NEXT:    [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], 10000
122; CHECK-NEXT:    br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
123; CHECK:       middle.block:
124; CHECK-NEXT:    br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]]
125; CHECK:       scalar.ph:
126; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ 10000, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
127; CHECK-NEXT:    [[SCALAR_RECUR_INIT:%.*]] = phi float [ [[TMP2]], [[MIDDLE_BLOCK]] ], [ 0.000000e+00, [[ENTRY]] ]
128; CHECK-NEXT:    [[SCALAR_RECUR_INIT5:%.*]] = phi float [ [[TMP4]], [[MIDDLE_BLOCK]] ], [ 0.000000e+00, [[ENTRY]] ]
129; CHECK-NEXT:    br label [[LOOP:%.*]]
130; CHECK:       loop:
131; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
132; CHECK-NEXT:    [[SCALAR_RECUR:%.*]] = phi float [ [[SCALAR_RECUR_INIT]], [[SCALAR_PH]] ], [ [[FOR_1_NEXT:%.*]], [[LOOP]] ]
133; CHECK-NEXT:    [[SCALAR_RECUR6:%.*]] = phi float [ [[SCALAR_RECUR_INIT5]], [[SCALAR_PH]] ], [ [[FOR_2_NEXT:%.*]], [[LOOP]] ]
134; CHECK-NEXT:    [[NEG:%.*]] = fneg float [[SCALAR_RECUR6]]
135; CHECK-NEXT:    [[MULADD:%.*]] = call float @llvm.fmuladd.f32(float [[SCALAR_RECUR]], float [[NEG]], float 0.000000e+00)
136; CHECK-NEXT:    [[DST_GEP:%.*]] = getelementptr inbounds float, ptr [[DST]], i64 [[IV]]
137; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
138; CHECK-NEXT:    [[FOR_1_NEXT]] = load float, ptr [[A]], align 4
139; CHECK-NEXT:    [[FOR_2_NEXT]] = load float, ptr [[B]], align 4
140; CHECK-NEXT:    store float [[MULADD]], ptr [[DST_GEP]], align 4
141; CHECK-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 10000
142; CHECK-NEXT:    br i1 [[EXITCOND_NOT]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
143; CHECK:       exit:
144; CHECK-NEXT:    ret void
145;
146entry:
147  br label %loop
148
149loop:
150  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
151  %for.1 = phi float [ 0.0, %entry ], [ %for.1.next, %loop ]
152  %for.2 = phi float [ 0.0, %entry ], [ %for.2.next, %loop ]
153  %neg = fneg float %for.2
154  %muladd = call float @llvm.fmuladd.f32(float %for.1, float %neg, float 0.000000e+00)
155  %dst.gep = getelementptr inbounds float, ptr %dst, i64 %iv
156  %iv.next = add nuw nsw i64 %iv, 1
157  %for.1.next = load float, ptr %a, align 4
158  %for.2.next = load float, ptr %b, align 4
159  store float %muladd, ptr %dst.gep
160  %exitcond.not = icmp eq i64 %iv.next, 10000
161  br i1 %exitcond.not, label %exit, label %loop
162
163exit:
164  ret void
165}
166
167declare float @llvm.fmuladd.f32(float, float, float) #1
168
169define void @test_pr54227(ptr noalias %a, ptr noalias %b) {
170; CHECK-LABEL: @test_pr54227(
171; CHECK-NEXT:  entry:
172; CHECK-NEXT:    br label [[LOOP:%.*]]
173; CHECK:       loop:
174; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
175; CHECK-NEXT:    [[AND17:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[AND1:%.*]], [[LOOP]] ]
176; CHECK-NEXT:    [[F_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[MUL:%.*]], [[LOOP]] ]
177; CHECK-NEXT:    [[E_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD:%.*]], [[LOOP]] ]
178; CHECK-NEXT:    [[AND:%.*]] = and i32 [[AND17]], 255
179; CHECK-NEXT:    [[OR:%.*]] = or i32 [[AND]], [[E_0]]
180; CHECK-NEXT:    [[AND1]] = and i32 [[E_0]], [[F_0]]
181; CHECK-NEXT:    [[MUL]] = shl nsw i32 [[OR]], 1
182; CHECK-NEXT:    [[ADD]] = or i32 [[AND1]], 1
183; CHECK-NEXT:    [[A_GEP:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[IV]]
184; CHECK-NEXT:    store i32 [[ADD]], ptr [[A_GEP]], align 4
185; CHECK-NEXT:    [[B_GEP:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]
186; CHECK-NEXT:    store i32 [[MUL]], ptr [[B_GEP]], align 4
187; CHECK-NEXT:    [[IV_NEXT]] = add nuw i64 [[IV]], 1
188; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 1000
189; CHECK-NEXT:    br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[LOOP]]
190; CHECK:       exit:
191; CHECK-NEXT:    ret void
192;
193entry:
194  br label %loop
195
196loop:
197  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
198  %and17 = phi i32 [ 0, %entry ], [ %and1, %loop ]
199  %f.0 = phi i32 [ 0, %entry ], [ %mul, %loop ]
200  %e.0 = phi i32 [ 0, %entry ], [ %add, %loop ]
201  %and = and i32 %and17, 255
202  %or = or i32 %and, %e.0
203  %and1 = and i32 %e.0, %f.0
204  %mul = shl nsw i32 %or, 1
205  %add = or i32 %and1, 1
206  %a.gep = getelementptr inbounds i32, ptr %a, i64 %iv
207  store i32 %add, ptr %a.gep, align 4
208  %b.gep = getelementptr inbounds i32, ptr %a, i64 %iv
209  store i32 %mul, ptr %b.gep, align 4
210  %iv.next = add nuw i64 %iv, 1
211  %exitcond = icmp eq i64 %iv, 1000
212  br i1 %exitcond, label %exit, label %loop
213
214exit:
215  ret void
216}
217
218define void @test_pr54233_for_depend_on_each_other(ptr noalias %a, ptr noalias %b) {
219; CHECK-LABEL: @test_pr54233_for_depend_on_each_other(
220; CHECK-NEXT:  entry:
221; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
222; CHECK:       vector.ph:
223; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
224; CHECK:       vector.body:
225; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
226; CHECK-NEXT:    [[VECTOR_RECUR:%.*]] = phi <4 x i32> [ <i32 poison, i32 poison, i32 poison, i32 0>, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ]
227; CHECK-NEXT:    [[VECTOR_RECUR1:%.*]] = phi <4 x i32> [ <i32 poison, i32 poison, i32 poison, i32 0>, [[VECTOR_PH]] ], [ [[BROADCAST_SPLAT:%.*]], [[VECTOR_BODY]] ]
228; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 0
229; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[B:%.*]], align 4
230; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1]], i64 0
231; CHECK-NEXT:    [[BROADCAST_SPLAT]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer
232; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR1]], <4 x i32> [[BROADCAST_SPLAT]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>
233; CHECK-NEXT:    [[TMP3:%.*]] = or <4 x i32> [[TMP2]], splat (i32 10)
234; CHECK-NEXT:    [[TMP4]] = xor <4 x i32> splat (i32 12), [[TMP2]]
235; CHECK-NEXT:    [[TMP5:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[TMP4]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>
236; CHECK-NEXT:    [[TMP6:%.*]] = shl <4 x i32> [[TMP2]], [[TMP5]]
237; CHECK-NEXT:    [[TMP7:%.*]] = xor <4 x i32> [[TMP6]], splat (i32 255)
238; CHECK-NEXT:    [[TMP8:%.*]] = and <4 x i32> [[TMP7]], [[TMP3]]
239; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[TMP0]]
240; CHECK-NEXT:    [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[TMP9]], i32 0
241; CHECK-NEXT:    store <4 x i32> [[TMP8]], ptr [[TMP10]], align 4
242; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
243; CHECK-NEXT:    [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
244; CHECK-NEXT:    br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
245; CHECK:       middle.block:
246; CHECK-NEXT:    [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[TMP4]], i32 3
247; CHECK-NEXT:    br i1 false, label [[EXIT:%.*]], label [[SCALAR_PH]]
248; CHECK:       scalar.ph:
249; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ 1000, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
250; CHECK-NEXT:    [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ]
251; CHECK-NEXT:    [[SCALAR_RECUR_INIT3:%.*]] = phi i32 [ [[TMP1]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ]
252; CHECK-NEXT:    br label [[LOOP:%.*]]
253; CHECK:       loop:
254; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
255; CHECK-NEXT:    [[SCALAR_RECUR:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT]], [[SCALAR_PH]] ], [ [[FOR_1_NEXT:%.*]], [[LOOP]] ]
256; CHECK-NEXT:    [[SCALAR_RECUR4:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT3]], [[SCALAR_PH]] ], [ [[FOR_2_NEXT:%.*]], [[LOOP]] ]
257; CHECK-NEXT:    [[OR:%.*]] = or i32 [[SCALAR_RECUR4]], 10
258; CHECK-NEXT:    [[SHL:%.*]] = shl i32 [[SCALAR_RECUR4]], [[SCALAR_RECUR]]
259; CHECK-NEXT:    [[XOR:%.*]] = xor i32 [[SHL]], 255
260; CHECK-NEXT:    [[AND:%.*]] = and i32 [[XOR]], [[OR]]
261; CHECK-NEXT:    [[FOR_1_NEXT]] = xor i32 12, [[SCALAR_RECUR4]]
262; CHECK-NEXT:    [[FOR_2_NEXT]] = load i32, ptr [[B]], align 4
263; CHECK-NEXT:    [[A_GEP:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]
264; CHECK-NEXT:    store i32 [[AND]], ptr [[A_GEP]], align 4
265; CHECK-NEXT:    [[IV_NEXT]] = add nuw i64 [[IV]], 1
266; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 1000
267; CHECK-NEXT:    br i1 [[EXITCOND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]
268; CHECK:       exit:
269; CHECK-NEXT:    ret void
270;
271entry:
272  br label %loop
273
274loop:
275  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
276  %for.1 = phi i32 [ 0, %entry ], [ %for.1.next, %loop ]
277  %for.2 = phi i32 [ 0, %entry ], [ %for.2.next, %loop ]
278  %or = or i32 %for.2, 10
279  %shl = shl i32 %for.2, %for.1
280  %xor = xor i32 %shl, 255
281  %and = and i32 %xor, %or
282  %for.1.next = xor i32 12, %for.2
283  %for.2.next = load i32, ptr %b
284  %a.gep = getelementptr inbounds i32, ptr %a, i64 %iv
285  store i32 %and, ptr %a.gep, align 4
286  %iv.next = add nuw i64 %iv, 1
287  %exitcond = icmp eq i64 %iv, 1000
288  br i1 %exitcond, label %exit, label %loop
289
290exit:
291  ret void
292}
293
294define void @pr54218(ptr %dst, ptr noalias %d) {
295; CHECK-LABEL: @pr54218(
296; CHECK-NEXT:  entry:
297; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]
298; CHECK:       loop.header:
299; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
300; CHECK-NEXT:    [[FOR_1:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[FOR_1_NEXT:%.*]], [[LOOP_LATCH]] ]
301; CHECK-NEXT:    [[P:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[P_NEXT:%.*]], [[LOOP_LATCH]] ]
302; CHECK-NEXT:    [[C_1:%.*]] = icmp eq i32 [[FOR_1]], 0
303; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[C_1]], i8 [[P]], i8 0
304; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 1000
305; CHECK-NEXT:    br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[LOOP_LATCH]]
306; CHECK:       loop.latch:
307; CHECK-NEXT:    [[FOR_1_NEXT]] = load i32, ptr [[D:%.*]], align 4
308; CHECK-NEXT:    [[P_NEXT]] = add i8 [[SEL]], -1
309; CHECK-NEXT:    [[DST_GEP:%.*]] = getelementptr inbounds i8, ptr [[DST:%.*]], i64 [[IV]]
310; CHECK-NEXT:    store i8 [[SEL]], ptr [[DST_GEP]], align 1
311; CHECK-NEXT:    [[IV_NEXT]] = add nuw i64 [[IV]], 1
312; CHECK-NEXT:    br label [[LOOP_HEADER]]
313; CHECK:       exit:
314; CHECK-NEXT:    ret void
315;
316entry:
317  br label %loop.header
318
319loop.header:
320  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
321  %for.1 = phi i32 [ 0, %entry ], [ %for.1.next, %loop.latch ]
322  %p = phi i8 [ 0, %entry ], [ %p.next, %loop.latch ]
323  %c.1 = icmp eq i32 %for.1, 0
324  %sel = select i1 %c.1, i8 %p, i8 0
325  %exitcond = icmp eq i64 %iv, 1000
326  br i1 %exitcond, label %exit, label %loop.latch
327
328loop.latch:
329  %for.1.next = load i32, ptr %d, align 4
330  %p.next = add i8 %sel, -1
331  %dst.gep = getelementptr inbounds i8, ptr %dst, i64 %iv
332  store i8 %sel, ptr %dst.gep
333  %iv.next = add nuw i64 %iv, 1
334  br label %loop.header
335
336exit:
337  ret void
338}
339
340define void @pr54254_fors_depend_on_each_other(ptr %dst) {
341; CHECK-LABEL: @pr54254_fors_depend_on_each_other(
342; CHECK-NEXT:  entry:
343; CHECK-NEXT:    br label [[LOOP:%.*]]
344; CHECK:       loop:
345; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
346; CHECK-NEXT:    [[D_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[XOR:%.*]], [[LOOP]] ]
347; CHECK-NEXT:    [[C_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[REM_NEXT:%.*]], [[LOOP]] ]
348; CHECK-NEXT:    [[F_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[XOR1:%.*]], [[LOOP]] ]
349; CHECK-NEXT:    [[NEG:%.*]] = xor i32 [[D_0]], -1
350; CHECK-NEXT:    [[REM:%.*]] = srem i32 [[F_0]], [[NEG]]
351; CHECK-NEXT:    [[XOR]] = xor i32 [[C_0]], 1
352; CHECK-NEXT:    [[XOR1]] = xor i32 [[REM]], 1
353; CHECK-NEXT:    [[DST_GEP:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i64 [[IV]]
354; CHECK-NEXT:    [[REM_NEXT]] = add i32 [[REM]], 10
355; CHECK-NEXT:    store i32 [[REM]], ptr [[DST_GEP]], align 4
356; CHECK-NEXT:    [[IV_NEXT]] = add nuw i64 [[IV]], 1
357; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[IV]], 1000
358; CHECK-NEXT:    br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[LOOP]]
359; CHECK:       exit:
360; CHECK-NEXT:    ret void
361;
362entry:
363  br label %loop
364
365loop:
366  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
367  %d.0 = phi i32 [ 0, %entry ], [ %xor, %loop ]
368  %c.0 = phi i32 [ 0, %entry ], [ %rem.next, %loop ]
369  %f.0 = phi i32 [ 0, %entry ], [ %xor1, %loop ]
370  %neg = xor i32 %d.0, -1
371  %rem = srem i32 %f.0, %neg
372  %xor = xor i32 %c.0, 1
373  %xor1 = xor i32 %rem, 1
374  %dst.gep = getelementptr inbounds i32, ptr %dst, i64 %iv
375  %rem.next = add i32 %rem, 10
376  store i32 %rem, ptr %dst.gep
377  %iv.next = add nuw i64 %iv, 1
378  %exitcond = icmp eq i64 %iv, 1000
379  br i1 %exitcond, label %exit, label %loop
380
381exit:
382  ret void
383}
384
385; Similar to the test cases for https://github.com/llvm/llvm-project/issues/106523.
386; The previous truncation (%trunc) gets vectorized (rather than folded into an
387; IV) and hoisted along with its AND operand above the user 'or'.
388define void @hoist_previous_value_and_operand(ptr %dst, i64 %mask) {
389; CHECK-LABEL: @hoist_previous_value_and_operand(
390; CHECK-NEXT:  bb:
391; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
392; CHECK:       vector.ph:
393; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[MASK:%.*]], i64 0
394; CHECK-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
395; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
396; CHECK:       vector.body:
397; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
398; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 1, i64 2, i64 3, i64 4>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
399; CHECK-NEXT:    [[VECTOR_RECUR:%.*]] = phi <4 x i32> [ <i32 poison, i32 poison, i32 poison, i32 1>, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ]
400; CHECK-NEXT:    [[VECTOR_RECUR1:%.*]] = phi <4 x i32> [ <i32 poison, i32 poison, i32 poison, i32 0>, [[VECTOR_PH]] ], [ [[TMP6:%.*]], [[VECTOR_BODY]] ]
401; CHECK-NEXT:    [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]
402; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[OFFSET_IDX]], 0
403; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i64 [[TMP0]]
404; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0
405; CHECK-NEXT:    [[TMP3:%.*]] = and <4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
406; CHECK-NEXT:    [[TMP4]] = trunc <4 x i64> [[TMP3]] to <4 x i32>
407; CHECK-NEXT:    [[TMP5:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[TMP4]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>
408; CHECK-NEXT:    [[TMP6]] = or <4 x i32> [[TMP5]], splat (i32 3)
409; CHECK-NEXT:    [[TMP7:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR1]], <4 x i32> [[TMP6]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>
410; CHECK-NEXT:    store <4 x i32> [[TMP7]], ptr [[TMP2]], align 4
411; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
412; CHECK-NEXT:    [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], splat (i64 4)
413; CHECK-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 336
414; CHECK-NEXT:    br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
415; CHECK:       middle.block:
416; CHECK-NEXT:    [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[TMP4]], i32 3
417; CHECK-NEXT:    [[VECTOR_RECUR_EXTRACT2:%.*]] = extractelement <4 x i32> [[TMP6]], i32 3
418; CHECK-NEXT:    br i1 false, label [[EXIT:%.*]], label [[SCALAR_PH]]
419; CHECK:       scalar.ph:
420; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ 337, [[MIDDLE_BLOCK]] ], [ 1, [[BB:%.*]] ]
421; CHECK-NEXT:    [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ], [ 1, [[BB]] ]
422; CHECK-NEXT:    [[SCALAR_RECUR_INIT3:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT2]], [[MIDDLE_BLOCK]] ], [ 0, [[BB]] ]
423; CHECK-NEXT:    br label [[LOOP:%.*]]
424; CHECK:       loop:
425; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[ADD:%.*]], [[LOOP]] ]
426; CHECK-NEXT:    [[FOR_1:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT]], [[SCALAR_PH]] ], [ [[TRUNC:%.*]], [[LOOP]] ]
427; CHECK-NEXT:    [[FOR_2:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT3]], [[SCALAR_PH]] ], [ [[OR:%.*]], [[LOOP]] ]
428; CHECK-NEXT:    [[OR]] = or i32 [[FOR_1]], 3
429; CHECK-NEXT:    [[ADD]] = add i64 [[IV]], 1
430; CHECK-NEXT:    [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DST]], i64 [[IV]]
431; CHECK-NEXT:    store i32 [[FOR_2]], ptr [[GEP]], align 4
432; CHECK-NEXT:    [[ICMP:%.*]] = icmp ult i64 [[IV]], 337
433; CHECK-NEXT:    [[A:%.*]] = and i64 [[IV]], [[MASK]]
434; CHECK-NEXT:    [[TRUNC]] = trunc i64 [[A]] to i32
435; CHECK-NEXT:    br i1 [[ICMP]], label [[LOOP]], label [[EXIT]], !llvm.loop [[LOOP7:![0-9]+]]
436; CHECK:       exit:
437; CHECK-NEXT:    ret void
438;
439bb:
440  br label %loop
441
442loop:
443  %iv = phi i64 [ 1, %bb ], [ %add, %loop ]
444  %for.1 = phi i32 [ 1, %bb ], [ %trunc, %loop ]
445  %for.2 = phi i32 [ 0, %bb ], [ %or, %loop ]
446  %or = or i32 %for.1, 3
447  %add = add i64 %iv, 1
448  %gep = getelementptr inbounds i32, ptr %dst, i64 %iv
449  store i32 %for.2, ptr %gep, align 4
450  %icmp = icmp ult i64 %iv, 337
451  %a = and i64 %iv, %mask
452  %trunc = trunc i64 %a to i32
453  br i1 %icmp, label %loop, label %exit
454
455exit:
456  ret void
457}
458