xref: /llvm-project/llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll (revision 4ad0fdd1631eeae432714c03ede01a10dc00025d)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=loop-vectorize,dce -force-vector-interleave=1 -force-vector-width=4 -S | FileCheck %s
3
4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
5target triple = "x86_64-unknown-linux-gnu"
6
7; PR15794
8; incorrect addition of llvm.mem.parallel_loop_access metadata is undefined
9; behaviour. Vectorizer ignores the memory dependency checks and goes ahead and
10; vectorizes this loop with uniform stores which has an output dependency.
11
12; void foo(int *a, int *b, int k, int m) {
13;   for (int i = 0; i < m; i++) {
14;     for (int j = 0; j < m; j++) {
15;       a[i] = a[i + j + k] + 1; <<<
16;     }
17;     b[i] = b[i] + 3;
18;   }
19; }
20
21; Function Attrs: nounwind uwtable
22define void @foo(ptr nocapture %a, ptr nocapture %b, i32 %k, i32 %m) #0 {
23; CHECK-LABEL: @foo(
24; CHECK-NEXT:  entry:
25; CHECK-NEXT:    [[CMP27:%.*]] = icmp sgt i32 [[M:%.*]], 0
26; CHECK-NEXT:    br i1 [[CMP27]], label [[FOR_BODY3_LR_PH_US_PREHEADER:%.*]], label [[FOR_END15:%.*]]
27; CHECK:       for.body3.lr.ph.us.preheader:
28; CHECK-NEXT:    [[TMP0:%.*]] = add i32 [[M]], -1
29; CHECK-NEXT:    [[TMP1:%.*]] = zext i32 [[K:%.*]] to i64
30; CHECK-NEXT:    [[TMP2:%.*]] = zext i32 [[M]] to i64
31; CHECK-NEXT:    br label [[FOR_BODY3_LR_PH_US:%.*]]
32; CHECK:       for.end.us:
33; CHECK-NEXT:    [[ARRAYIDX9_US:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[INDVARS_IV33:%.*]]
34; CHECK-NEXT:    [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX9_US]], align 4, !llvm.mem.parallel_loop_access [[META0:![0-9]+]]
35; CHECK-NEXT:    [[ADD10_US:%.*]] = add nsw i32 [[TMP3]], 3
36; CHECK-NEXT:    store i32 [[ADD10_US]], ptr [[ARRAYIDX9_US]], align 4, !llvm.mem.parallel_loop_access [[META0]]
37; CHECK-NEXT:    [[INDVARS_IV_NEXT34:%.*]] = add i64 [[INDVARS_IV33]], 1
38; CHECK-NEXT:    [[LFTR_WIDEIV35:%.*]] = trunc i64 [[INDVARS_IV_NEXT34]] to i32
39; CHECK-NEXT:    [[EXITCOND36:%.*]] = icmp eq i32 [[LFTR_WIDEIV35]], [[M]]
40; CHECK-NEXT:    br i1 [[EXITCOND36]], label [[FOR_END15_LOOPEXIT:%.*]], label [[FOR_BODY3_LR_PH_US]], !llvm.loop [[LOOP2:![0-9]+]]
41; CHECK:       for.body3.us:
42; CHECK-NEXT:    [[INDVARS_IV29:%.*]] = phi i64 [ [[BC_RESUME_VAL:%.*]], [[SCALAR_PH:%.*]] ], [ [[INDVARS_IV_NEXT30:%.*]], [[FOR_BODY3_US:%.*]] ]
43; CHECK-NEXT:    [[TMP4:%.*]] = trunc i64 [[INDVARS_IV29]] to i32
44; CHECK-NEXT:    [[ADD4_US:%.*]] = add i32 [[ADD_US:%.*]], [[TMP4]]
45; CHECK-NEXT:    [[IDXPROM_US:%.*]] = sext i32 [[ADD4_US]] to i64
46; CHECK-NEXT:    [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[IDXPROM_US]]
47; CHECK-NEXT:    [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX_US]], align 4, !llvm.mem.parallel_loop_access [[META0]]
48; CHECK-NEXT:    [[ADD5_US:%.*]] = add nsw i32 [[TMP5]], 1
49; CHECK-NEXT:    store i32 [[ADD5_US]], ptr [[ARRAYIDX7_US:%.*]], align 4, !llvm.mem.parallel_loop_access [[META0]]
50; CHECK-NEXT:    [[INDVARS_IV_NEXT30]] = add i64 [[INDVARS_IV29]], 1
51; CHECK-NEXT:    [[LFTR_WIDEIV31:%.*]] = trunc i64 [[INDVARS_IV_NEXT30]] to i32
52; CHECK-NEXT:    [[EXITCOND32:%.*]] = icmp eq i32 [[LFTR_WIDEIV31]], [[M]]
53; CHECK-NEXT:    br i1 [[EXITCOND32]], label [[FOR_END_US:%.*]], label [[FOR_BODY3_US]], !llvm.loop [[LOOP3:![0-9]+]]
54; CHECK:       for.body3.lr.ph.us:
55; CHECK-NEXT:    [[INDVARS_IV33]] = phi i64 [ [[INDVARS_IV_NEXT34]], [[FOR_END_US]] ], [ 0, [[FOR_BODY3_LR_PH_US_PREHEADER]] ]
56; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[TMP1]], [[INDVARS_IV33]]
57; CHECK-NEXT:    [[TMP7:%.*]] = trunc i64 [[TMP6]] to i32
58; CHECK-NEXT:    [[TMP8:%.*]] = trunc i64 [[INDVARS_IV33]] to i32
59; CHECK-NEXT:    [[ADD_US]] = add i32 [[TMP8]], [[K]]
60; CHECK-NEXT:    [[ARRAYIDX7_US]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV33]]
61; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 4
62; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH]], label [[VECTOR_SCEVCHECK:%.*]]
63; CHECK:       vector.scevcheck:
64; CHECK-NEXT:    [[TMP9:%.*]] = add i32 [[TMP7]], [[TMP0]]
65; CHECK-NEXT:    [[TMP10:%.*]] = icmp slt i32 [[TMP9]], [[TMP7]]
66; CHECK-NEXT:    br i1 [[TMP10]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
67; CHECK:       vector.ph:
68; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], 4
69; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]]
70; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
71; CHECK:       vector.body:
72; CHECK-NEXT:    [[OFFSET_IDX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
73; CHECK-NEXT:    [[TMP11:%.*]] = trunc i64 [[OFFSET_IDX]] to i32
74; CHECK-NEXT:    [[TMP12:%.*]] = add i32 [[TMP11]], 0
75; CHECK-NEXT:    [[TMP13:%.*]] = add i32 [[ADD_US]], [[TMP12]]
76; CHECK-NEXT:    [[TMP14:%.*]] = sext i32 [[TMP13]] to i64
77; CHECK-NEXT:    [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP14]]
78; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i32 0
79; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP16]], align 4
80; CHECK-NEXT:    [[TMP17:%.*]] = add nsw <4 x i32> [[WIDE_LOAD]], splat (i32 1)
81; CHECK-NEXT:    [[TMP18:%.*]] = extractelement <4 x i32> [[TMP17]], i32 3
82; CHECK-NEXT:    store i32 [[TMP18]], ptr [[ARRAYIDX7_US]], align 4, !llvm.mem.parallel_loop_access [[META0]]
83; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[OFFSET_IDX]], 4
84; CHECK-NEXT:    [[TMP19:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
85; CHECK-NEXT:    br i1 [[TMP19]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
86; CHECK:       middle.block:
87; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]]
88; CHECK-NEXT:    br i1 [[CMP_N]], label [[FOR_END_US]], label [[SCALAR_PH]]
89; CHECK:       scalar.ph:
90; CHECK-NEXT:    [[BC_RESUME_VAL]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[FOR_BODY3_LR_PH_US]] ]
91; CHECK-NEXT:    br label [[FOR_BODY3_US]]
92; CHECK:       for.end15.loopexit:
93; CHECK-NEXT:    br label [[FOR_END15]]
94; CHECK:       for.end15:
95; CHECK-NEXT:    ret void
96;
97entry:
98  %cmp27 = icmp sgt i32 %m, 0
99  br i1 %cmp27, label %for.body3.lr.ph.us, label %for.end15
100
101for.end.us:                                       ; preds = %for.body3.us
102  %arrayidx9.us = getelementptr inbounds i32, ptr %b, i64 %indvars.iv33
103  %0 = load i32, ptr %arrayidx9.us, align 4, !llvm.mem.parallel_loop_access !3
104  %add10.us = add nsw i32 %0, 3
105  store i32 %add10.us, ptr %arrayidx9.us, align 4, !llvm.mem.parallel_loop_access !3
106  %indvars.iv.next34 = add i64 %indvars.iv33, 1
107  %lftr.wideiv35 = trunc i64 %indvars.iv.next34 to i32
108  %exitcond36 = icmp eq i32 %lftr.wideiv35, %m
109  br i1 %exitcond36, label %for.end15, label %for.body3.lr.ph.us, !llvm.loop !5
110
111for.body3.us:                                     ; preds = %for.body3.us, %for.body3.lr.ph.us
112  %indvars.iv29 = phi i64 [ 0, %for.body3.lr.ph.us ], [ %indvars.iv.next30, %for.body3.us ]
113  %1 = trunc i64 %indvars.iv29 to i32
114  %add4.us = add i32 %add.us, %1
115  %idxprom.us = sext i32 %add4.us to i64
116  %arrayidx.us = getelementptr inbounds i32, ptr %a, i64 %idxprom.us
117  %2 = load i32, ptr %arrayidx.us, align 4, !llvm.mem.parallel_loop_access !3
118  %add5.us = add nsw i32 %2, 1
119  store i32 %add5.us, ptr %arrayidx7.us, align 4, !llvm.mem.parallel_loop_access !3
120  %indvars.iv.next30 = add i64 %indvars.iv29, 1
121  %lftr.wideiv31 = trunc i64 %indvars.iv.next30 to i32
122  %exitcond32 = icmp eq i32 %lftr.wideiv31, %m
123  br i1 %exitcond32, label %for.end.us, label %for.body3.us, !llvm.loop !4
124
125for.body3.lr.ph.us:                               ; preds = %for.end.us, %entry
126  %indvars.iv33 = phi i64 [ %indvars.iv.next34, %for.end.us ], [ 0, %entry ]
127  %3 = trunc i64 %indvars.iv33 to i32
128  %add.us = add i32 %3, %k
129  %arrayidx7.us = getelementptr inbounds i32, ptr %a, i64 %indvars.iv33
130  br label %for.body3.us
131
132for.end15:                                        ; preds = %for.end.us, %entry
133  ret void
134}
135
136; Same test as above, but without the invalid parallel_loop_access metadata.
137
138; Here we can see the vectorizer does the mem dep checks and decides it is
139; unsafe to vectorize.
140define void @no-par-mem-metadata(ptr nocapture %a, ptr nocapture %b, i32 %k, i32 %m) #0 {
141; CHECK-LABEL: @no-par-mem-metadata(
142; CHECK-NEXT:  entry:
143; CHECK-NEXT:    [[CMP27:%.*]] = icmp sgt i32 [[M:%.*]], 0
144; CHECK-NEXT:    br i1 [[CMP27]], label [[FOR_BODY3_LR_PH_US_PREHEADER:%.*]], label [[FOR_END15:%.*]]
145; CHECK:       for.body3.lr.ph.us.preheader:
146; CHECK-NEXT:    br label [[FOR_BODY3_LR_PH_US:%.*]]
147; CHECK:       for.end.us:
148; CHECK-NEXT:    [[ARRAYIDX9_US:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[INDVARS_IV33:%.*]]
149; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX9_US]], align 4
150; CHECK-NEXT:    [[ADD10_US:%.*]] = add nsw i32 [[TMP0]], 3
151; CHECK-NEXT:    store i32 [[ADD10_US]], ptr [[ARRAYIDX9_US]], align 4
152; CHECK-NEXT:    [[INDVARS_IV_NEXT34:%.*]] = add i64 [[INDVARS_IV33]], 1
153; CHECK-NEXT:    [[LFTR_WIDEIV35:%.*]] = trunc i64 [[INDVARS_IV_NEXT34]] to i32
154; CHECK-NEXT:    [[EXITCOND36:%.*]] = icmp eq i32 [[LFTR_WIDEIV35]], [[M]]
155; CHECK-NEXT:    br i1 [[EXITCOND36]], label [[FOR_END15_LOOPEXIT:%.*]], label [[FOR_BODY3_LR_PH_US]], !llvm.loop [[LOOP2]]
156; CHECK:       for.body3.us:
157; CHECK-NEXT:    [[INDVARS_IV29:%.*]] = phi i64 [ 0, [[FOR_BODY3_LR_PH_US]] ], [ [[INDVARS_IV_NEXT30:%.*]], [[FOR_BODY3_US:%.*]] ]
158; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 [[INDVARS_IV29]] to i32
159; CHECK-NEXT:    [[ADD4_US:%.*]] = add i32 [[ADD_US:%.*]], [[TMP1]]
160; CHECK-NEXT:    [[IDXPROM_US:%.*]] = sext i32 [[ADD4_US]] to i64
161; CHECK-NEXT:    [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[IDXPROM_US]]
162; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX_US]], align 4
163; CHECK-NEXT:    [[ADD5_US:%.*]] = add nsw i32 [[TMP2]], 1
164; CHECK-NEXT:    store i32 [[ADD5_US]], ptr [[ARRAYIDX7_US:%.*]], align 4
165; CHECK-NEXT:    [[INDVARS_IV_NEXT30]] = add i64 [[INDVARS_IV29]], 1
166; CHECK-NEXT:    [[LFTR_WIDEIV31:%.*]] = trunc i64 [[INDVARS_IV_NEXT30]] to i32
167; CHECK-NEXT:    [[EXITCOND32:%.*]] = icmp eq i32 [[LFTR_WIDEIV31]], [[M]]
168; CHECK-NEXT:    br i1 [[EXITCOND32]], label [[FOR_END_US:%.*]], label [[FOR_BODY3_US]], !llvm.loop [[LOOP1:![0-9]+]]
169; CHECK:       for.body3.lr.ph.us:
170; CHECK-NEXT:    [[INDVARS_IV33]] = phi i64 [ [[INDVARS_IV_NEXT34]], [[FOR_END_US]] ], [ 0, [[FOR_BODY3_LR_PH_US_PREHEADER]] ]
171; CHECK-NEXT:    [[TMP3:%.*]] = trunc i64 [[INDVARS_IV33]] to i32
172; CHECK-NEXT:    [[ADD_US]] = add i32 [[TMP3]], [[K:%.*]]
173; CHECK-NEXT:    [[ARRAYIDX7_US]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV33]]
174; CHECK-NEXT:    br label [[FOR_BODY3_US]]
175; CHECK:       for.end15.loopexit:
176; CHECK-NEXT:    br label [[FOR_END15]]
177; CHECK:       for.end15:
178; CHECK-NEXT:    ret void
179;
180entry:
181  %cmp27 = icmp sgt i32 %m, 0
182  br i1 %cmp27, label %for.body3.lr.ph.us, label %for.end15
183
184for.end.us:                                       ; preds = %for.body3.us
185  %arrayidx9.us = getelementptr inbounds i32, ptr %b, i64 %indvars.iv33
186  %0 = load i32, ptr %arrayidx9.us, align 4
187  %add10.us = add nsw i32 %0, 3
188  store i32 %add10.us, ptr %arrayidx9.us, align 4
189  %indvars.iv.next34 = add i64 %indvars.iv33, 1
190  %lftr.wideiv35 = trunc i64 %indvars.iv.next34 to i32
191  %exitcond36 = icmp eq i32 %lftr.wideiv35, %m
192  br i1 %exitcond36, label %for.end15, label %for.body3.lr.ph.us, !llvm.loop !5
193
194for.body3.us:                                     ; preds = %for.body3.us, %for.body3.lr.ph.us
195  %indvars.iv29 = phi i64 [ 0, %for.body3.lr.ph.us ], [ %indvars.iv.next30, %for.body3.us ]
196  %1 = trunc i64 %indvars.iv29 to i32
197  %add4.us = add i32 %add.us, %1
198  %idxprom.us = sext i32 %add4.us to i64
199  %arrayidx.us = getelementptr inbounds i32, ptr %a, i64 %idxprom.us
200  %2 = load i32, ptr %arrayidx.us, align 4
201  %add5.us = add nsw i32 %2, 1
202  store i32 %add5.us, ptr %arrayidx7.us, align 4
203  %indvars.iv.next30 = add i64 %indvars.iv29, 1
204  %lftr.wideiv31 = trunc i64 %indvars.iv.next30 to i32
205  %exitcond32 = icmp eq i32 %lftr.wideiv31, %m
206  br i1 %exitcond32, label %for.end.us, label %for.body3.us, !llvm.loop !4
207
208for.body3.lr.ph.us:                               ; preds = %for.end.us, %entry
209  %indvars.iv33 = phi i64 [ %indvars.iv.next34, %for.end.us ], [ 0, %entry ]
210  %3 = trunc i64 %indvars.iv33 to i32
211  %add.us = add i32 %3, %k
212  %arrayidx7.us = getelementptr inbounds i32, ptr %a, i64 %indvars.iv33
213  br label %for.body3.us
214
215for.end15:                                        ; preds = %for.end.us, %entry
216  ret void
217}
218
219attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
220
221!3 = !{!4, !5}
222!4 = !{!4}
223!5 = !{!5}
224
225