1; RUN: opt -passes=loop-vectorize -debug-only=loop-vectorize -disable-output 2>&1 < %s | FileCheck %s 2; REQUIRES: asserts 3 4target triple = "x86_64" 5 6; Test that shows how many registers the loop vectorizer thinks an illegal <VF x i1> will consume. 7 8; CHECK-LABEL: LV: Checking a loop in 'or_reduction_avx' from <stdin> 9; CHECK: LV(REG): VF = 64 10; CHECK-NEXT: LV(REG): Found max usage: 2 item 11; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 136 registers 12; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 1 registers 13 14define i1 @or_reduction_avx(i32 %arg, ptr %ptr) "target-features"="+avx" { 15entry: 16 br label %loop 17exit: 18 ret i1 %reduction_next 19loop: 20 %induction = phi i32 [ 0, %entry ], [ %induction_next, %loop ] 21 %reduction = phi i1 [ 0, %entry ], [ %reduction_next, %loop ] 22 %gep = getelementptr inbounds i32, ptr %ptr, i32 %induction 23 %loaded = load i32, ptr %gep 24 %i1 = icmp eq i32 %loaded, %induction 25 %reduction_next = or i1 %i1, %reduction 26 %induction_next = add nuw i32 %induction, 1 27 %cond = icmp eq i32 %induction_next, %arg 28 br i1 %cond, label %exit, label %loop, !llvm.loop !64 29} 30 31!64 = distinct !{!64, !65} 32!65 = !{!"llvm.loop.vectorize.width", i32 64} 33