1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2; RUN: opt -p loop-vectorize -mcpu=z16 -force-target-instruction-cost=1 -S %s | FileCheck %s 3 4target triple = "systemz-unknown-linux-unknown" 5 6define void @test_scalar_steps_target_instruction_cost(ptr %dst) { 7; CHECK-LABEL: define void @test_scalar_steps_target_instruction_cost( 8; CHECK-SAME: ptr [[DST:%.*]]) #[[ATTR0:[0-9]+]] { 9; CHECK-NEXT: [[ENTRY:.*]]: 10; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] 11; CHECK: [[VECTOR_PH]]: 12; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] 13; CHECK: [[VECTOR_BODY]]: 14; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE2:.*]] ] 15; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 3 16; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[INDEX]], i64 0 17; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer 18; CHECK-NEXT: [[VEC_IV:%.*]] = add <2 x i64> [[BROADCAST_SPLAT]], <i64 0, i64 1> 19; CHECK-NEXT: [[TMP0:%.*]] = icmp ule <2 x i64> [[VEC_IV]], splat (i64 8) 20; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i1> [[TMP0]], i32 0 21; CHECK-NEXT: br i1 [[TMP1]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] 22; CHECK: [[PRED_STORE_IF]]: 23; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[OFFSET_IDX]], 0 24; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[TMP2]] 25; CHECK-NEXT: store i64 [[TMP2]], ptr [[TMP3]], align 8 26; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]] 27; CHECK: [[PRED_STORE_CONTINUE]]: 28; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i1> [[TMP0]], i32 1 29; CHECK-NEXT: br i1 [[TMP4]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2]] 30; CHECK: [[PRED_STORE_IF1]]: 31; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], 3 32; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[TMP5]] 33; CHECK-NEXT: store i64 [[TMP5]], ptr [[TMP6]], align 8 34; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE2]] 35; CHECK: [[PRED_STORE_CONTINUE2]]: 36; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 37; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 10 38; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 39; CHECK: [[MIDDLE_BLOCK]]: 40; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]] 41; CHECK: [[SCALAR_PH]]: 42; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 30, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] 43; CHECK-NEXT: br label %[[LOOP:.*]] 44; CHECK: [[LOOP]]: 45; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ] 46; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[IV]] 47; CHECK-NEXT: store i64 [[IV]], ptr [[GEP]], align 8 48; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 3 49; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IV]], 22 50; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP]], label %[[EXIT]], !llvm.loop [[LOOP3:![0-9]+]] 51; CHECK: [[EXIT]]: 52; CHECK-NEXT: ret void 53; 54entry: 55 br label %loop 56 57loop: 58 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] 59 %gep = getelementptr inbounds i64, ptr %dst, i64 %iv 60 store i64 %iv, ptr %gep, align 8 61 %iv.next = add nuw nsw i64 %iv, 3 62 %cmp = icmp ult i64 %iv, 22 63 br i1 %cmp, label %loop, label %exit 64 65exit: 66 ret void 67} 68;. 69; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} 70; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} 71; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} 72; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} 73;. 74