1; REQUIRES: asserts 2 3; RUN: opt -passes=loop-vectorize -debug-only=loop-vectorize \ 4; RUN: -force-tail-folding-style=data-with-evl \ 5; RUN: -prefer-predicate-over-epilogue=predicate-dont-vectorize \ 6; RUN: -mtriple=riscv64 -mattr=+v -riscv-v-vector-bits-max=128 -disable-output < %s 2>&1 | FileCheck --check-prefixes=IF-EVL-OUTLOOP %s 7 8; RUN: opt -passes=loop-vectorize -debug-only=loop-vectorize \ 9; RUN: -prefer-inloop-reductions \ 10; RUN: -force-tail-folding-style=data-with-evl \ 11; RUN: -prefer-predicate-over-epilogue=predicate-dont-vectorize \ 12; RUN: -mtriple=riscv64 -mattr=+v -riscv-v-vector-bits-max=128 -disable-output < %s 2>&1 | FileCheck --check-prefixes=IF-EVL-INLOOP %s 13 14; RUN: opt -passes=loop-vectorize -debug-only=loop-vectorize \ 15; RUN: -force-tail-folding-style=none \ 16; RUN: -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue \ 17; RUN: -mtriple=riscv64 -mattr=+v -riscv-v-vector-bits-max=128 -disable-output < %s 2>&1 | FileCheck --check-prefixes=NO-VP-OUTLOOP %s 18 19; RUN: opt -passes=loop-vectorize -debug-only=loop-vectorize \ 20; RUN: -prefer-inloop-reductions \ 21; RUN: -force-tail-folding-style=none \ 22; RUN: -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue \ 23; RUN: -mtriple=riscv64 -mattr=+v -riscv-v-vector-bits-max=128 -disable-output < %s 2>&1 | FileCheck --check-prefixes=NO-VP-INLOOP %s 24 25 26define i32 @reduction(ptr %a, i64 %n, i32 %start) { 27; IF-EVL-OUTLOOP: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF={1}' { 28; IF-EVL-OUTLOOP-NEXT: Live-in vp<[[VFUF:%[0-9]+]]> = VF * UF 29; IF-EVL-OUTLOOP-NEXT: Live-in vp<[[VTC:%[0-9]+]]> = vector-trip-count 30; IF-EVL-OUTLOOP-NEXT: Live-in ir<%n> = original trip-count 31; IF-EVL-OUTLOOP-EMPTY: 32; IF-EVL-OUTLOOP-NEXT: ir-bb<entry>: 33; IF-EVL-OUTLOOP-NEXT: Successor(s): vector.ph 34; IF-EVL-OUTLOOP-EMPTY: 35; IF-EVL-OUTLOOP-NEXT: vector.ph: 36; IF-EVL-OUTLOOP-NEXT: Successor(s): vector loop 37; IF-EVL-OUTLOOP-EMPTY: 38; IF-EVL-OUTLOOP-NEXT: <x1> vector loop: { 39; IF-EVL-OUTLOOP-NEXT: vector.body: 40; IF-EVL-OUTLOOP-NEXT: EMIT vp<[[IV:%[0-9]+]]> = CANONICAL-INDUCTION 41; IF-EVL-OUTLOOP-NEXT: EXPLICIT-VECTOR-LENGTH-BASED-IV-PHI vp<[[EVL_PHI:%[0-9]+]]> = phi ir<0>, vp<[[IV_NEXT:%.+]]> 42; IF-EVL-OUTLOOP-NEXT: WIDEN-REDUCTION-PHI ir<[[RDX_PHI:%.+]]> = phi ir<%start>, vp<[[RDX_SELECT:%.+]]> 43; IF-EVL-OUTLOOP-NEXT: EMIT vp<[[AVL:%.+]]> = sub ir<%n>, vp<[[EVL_PHI]]> 44; IF-EVL-OUTLOOP-NEXT: EMIT vp<[[EVL:%.+]]> = EXPLICIT-VECTOR-LENGTH vp<[[AVL]]> 45; IF-EVL-OUTLOOP-NEXT: vp<[[ST:%[0-9]+]]> = SCALAR-STEPS vp<[[EVL_PHI]]>, ir<1> 46; IF-EVL-OUTLOOP-NEXT: CLONE ir<[[GEP1:%.+]]> = getelementptr inbounds ir<%a>, vp<[[ST]]> 47; IF-EVL-OUTLOOP-NEXT: vp<[[PTR1:%[0-9]+]]> = vector-pointer ir<[[GEP1]]> 48; IF-EVL-OUTLOOP-NEXT: WIDEN ir<[[LD1:%.+]]> = vp.load vp<[[PTR1]]>, vp<[[EVL]]> 49; IF-EVL-OUTLOOP-NEXT: WIDEN ir<[[ADD:%.+]]> = vp.add ir<[[LD1]]>, ir<[[RDX_PHI]]>, vp<[[EVL]]> 50; IF-EVL-OUTLOOP-NEXT: WIDEN-INTRINSIC vp<[[RDX_SELECT]]> = call llvm.vp.merge(ir<true>, ir<[[ADD]]>, ir<[[RDX_PHI]]>, vp<[[EVL]]>) 51; IF-EVL-OUTLOOP-NEXT: SCALAR-CAST vp<[[CAST:%[0-9]+]]> = zext vp<[[EVL]]> to i64 52; IF-EVL-OUTLOOP-NEXT: EMIT vp<[[IV_NEXT]]> = add vp<[[CAST]]>, vp<[[EVL_PHI]]> 53; IF-EVL-OUTLOOP-NEXT: EMIT vp<[[IV_NEXT_EXIT:%.+]]> = add vp<[[IV]]>, vp<[[VFUF]]> 54; IF-EVL-OUTLOOP-NEXT: EMIT branch-on-count vp<[[IV_NEXT_EXIT]]>, vp<[[VTC]]> 55; IF-EVL-OUTLOOP-NEXT: No successors 56; IF-EVL-OUTLOOP-NEXT: } 57; IF-EVL-OUTLOOP-NEXT: Successor(s): middle.block 58; IF-EVL-OUTLOOP-EMPTY: 59; IF-EVL-OUTLOOP-NEXT: middle.block: 60; IF-EVL-OUTLOOP-NEXT: EMIT vp<[[RDX:%.+]]> = compute-reduction-result ir<[[RDX_PHI]]>, vp<[[RDX_SELECT]]> 61; IF-EVL-OUTLOOP-NEXT: EMIT vp<[[RDX_EX:%.+]]> = extract-from-end vp<[[RDX]]>, ir<1> 62; IF-EVL-OUTLOOP-NEXT: EMIT branch-on-cond ir<true> 63; IF-EVL-OUTLOOP-NEXT: Successor(s): ir-bb<for.end>, scalar.ph 64; IF-EVL-OUTLOOP-EMPTY: 65; IF-EVL-OUTLOOP-NEXT: scalar.ph: 66; IF-EVL-OUTLOOP-NEXT: EMIT vp<[[IV_RESUME:%.+]]> = resume-phi vp<[[VTC]]>, ir<0> 67; IF-EVL-OUTLOOP-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RDX]]>, ir<%start> 68; IF-EVL-OUTLOOP-NEXT: Successor(s): ir-bb<for.body> 69; IF-EVL-OUTLOOP-EMPTY: 70; IF-EVL-OUTLOOP-NEXT: ir-bb<for.body>: 71; IF-EVL-OUTLOOP-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] (extra operand: vp<[[IV_RESUME]]> from scalar.ph) 72; IF-EVL-OUTLOOP-NEXT: IR %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ] 73; IF-EVL-OUTLOOP: IR %exitcond.not = icmp eq i64 %iv.next, %n 74; IF-EVL-OUTLOOP-NEXT: No successors 75; IF-EVL-OUTLOOP-EMPTY: 76; IF-EVL-OUTLOOP-NEXT: ir-bb<for.end>: 77; IF-EVL-OUTLOOP-NEXT: IR %add.lcssa = phi i32 [ %add, %for.body ] (extra operand: vp<[[RDX_EX]]> from middle.block) 78; IF-EVL-OUTLOOP-NEXT: No successors 79; IF-EVL-OUTLOOP-NEXT: } 80; 81 82; IF-EVL-INLOOP: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF={1}' { 83; IF-EVL-INLOOP-NEXT: Live-in vp<[[VFUF:%[0-9]+]]> = VF * UF 84; IF-EVL-INLOOP-NEXT: Live-in vp<[[VTC:%[0-9]+]]> = vector-trip-count 85; IF-EVL-INLOOP-NEXT: Live-in ir<%n> = original trip-count 86; IF-EVL-INLOOP-EMPTY: 87; IF-EVL-INLOOP: vector.ph: 88; IF-EVL-INLOOP-NEXT: Successor(s): vector loop 89; IF-EVL-INLOOP-EMPTY: 90; IF-EVL-INLOOP-NEXT: <x1> vector loop: { 91; IF-EVL-INLOOP-NEXT: vector.body: 92; IF-EVL-INLOOP-NEXT: EMIT vp<[[IV:%[0-9]+]]> = CANONICAL-INDUCTION 93; IF-EVL-INLOOP-NEXT: EXPLICIT-VECTOR-LENGTH-BASED-IV-PHI vp<[[EVL_PHI:%[0-9]+]]> = phi ir<0>, vp<[[IV_NEXT:%.+]]> 94; IF-EVL-INLOOP-NEXT: WIDEN-REDUCTION-PHI ir<[[RDX_PHI:%.+]]> = phi ir<%start>, ir<[[RDX_NEXT:%.+]]> 95; IF-EVL-INLOOP-NEXT: EMIT vp<[[AVL:%.+]]> = sub ir<%n>, vp<[[EVL_PHI]]> 96; IF-EVL-INLOOP-NEXT: EMIT vp<[[EVL:%.+]]> = EXPLICIT-VECTOR-LENGTH vp<[[AVL]]> 97; IF-EVL-INLOOP-NEXT: vp<[[ST:%[0-9]+]]> = SCALAR-STEPS vp<[[EVL_PHI]]>, ir<1> 98; IF-EVL-INLOOP-NEXT: CLONE ir<[[GEP1:%.+]]> = getelementptr inbounds ir<%a>, vp<[[ST]]> 99; IF-EVL-INLOOP-NEXT: vp<[[PTR1:%[0-9]+]]> = vector-pointer ir<[[GEP1]]> 100; IF-EVL-INLOOP-NEXT: WIDEN ir<[[LD1:%.+]]> = vp.load vp<[[PTR1]]>, vp<[[EVL]]> 101; IF-EVL-INLOOP-NEXT: REDUCE ir<[[ADD:%.+]]> = ir<[[RDX_PHI]]> + vp.reduce.add (ir<[[LD1]]>, vp<[[EVL]]>) 102; IF-EVL-INLOOP-NEXT: SCALAR-CAST vp<[[CAST:%[0-9]+]]> = zext vp<[[EVL]]> to i64 103; IF-EVL-INLOOP-NEXT: EMIT vp<[[IV_NEXT]]> = add vp<[[CAST]]>, vp<[[EVL_PHI]]> 104; IF-EVL-INLOOP-NEXT: EMIT vp<[[IV_NEXT_EXIT:%.+]]> = add vp<[[IV]]>, vp<[[VFUF]]> 105; IF-EVL-INLOOP-NEXT: EMIT branch-on-count vp<[[IV_NEXT_EXIT]]>, vp<[[VTC]]> 106; IF-EVL-INLOOP-NEXT: No successors 107; IF-EVL-INLOOP-NEXT: } 108; IF-EVL-INLOOP-NEXT: Successor(s): middle.block 109; IF-EVL-INLOOP-EMPTY: 110; IF-EVL-INLOOP-NEXT: middle.block: 111; IF-EVL-INLOOP-NEXT: EMIT vp<[[RDX:%.+]]> = compute-reduction-result ir<[[RDX_PHI]]>, ir<[[ADD]]> 112; IF-EVL-INLOOP-NEXT: EMIT vp<[[RDX_EX:%.+]]> = extract-from-end vp<[[RDX]]>, ir<1> 113; IF-EVL-INLOOP-NEXT: EMIT branch-on-cond ir<true> 114; IF-EVL-INLOOP-NEXT: Successor(s): ir-bb<for.end>, scalar.ph 115; IF-EVL-INLOOP-EMPTY: 116; IF-EVL-INLOOP-NEXT: scalar.ph: 117; IF-EVL-INLOOP-NEXT: EMIT vp<[[IV_RESUME:%.+]]> = resume-phi vp<[[VTC]]>, ir<0> 118; IF-EVL-INLOOP-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RDX]]>, ir<%start> 119; IF-EVL-INLOOP-NEXT: Successor(s): ir-bb<for.body> 120; IF-EVL-INLOOP-EMPTY: 121; IF-EVL-INLOOP-NEXT: ir-bb<for.body>: 122; IF-EVL-INLOOP-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] (extra operand: vp<[[IV_RESUME]]> from scalar.ph) 123; IF-EVL-INLOOP-NEXT: IR %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ] 124; IF-EVL-INLOOP: IR %exitcond.not = icmp eq i64 %iv.next, %n 125; IF-EVL-INLOOP-NEXT: No successors 126; IF-EVL-INLOOP-EMPTY: 127; IF-EVL-INLOOP-NEXT: ir-bb<for.end>: 128; IF-EVL-INLOOP-NEXT: IR %add.lcssa = phi i32 [ %add, %for.body ] (extra operand: vp<[[RDX_EX]]> from middle.block) 129; IF-EVL-INLOOP-NEXT: No successors 130; IF-EVL-INLOOP-NEXT: } 131; 132 133; NO-VP-OUTLOOP: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF>=1' { 134; NO-VP-OUTLOOP-NEXT: Live-in vp<[[VFUF:%[0-9]+]]> = VF * UF 135; NO-VP-OUTLOOP-NEXT: Live-in vp<[[VTC:%[0-9]+]]> = vector-trip-count 136; NO-VP-OUTLOOP-NEXT: Live-in ir<%n> = original trip-count 137; NO-VP-OUTLOOP-EMPTY: 138; NO-VP-OUTLOOP: vector.ph: 139; NO-VP-OUTLOOP-NEXT: Successor(s): vector loop 140; NO-VP-OUTLOOP-EMPTY: 141; NO-VP-OUTLOOP-NEXT: <x1> vector loop: { 142; NO-VP-OUTLOOP-NEXT: vector.body: 143; NO-VP-OUTLOOP-NEXT: EMIT vp<[[IV:%[0-9]+]]> = CANONICAL-INDUCTION 144; NO-VP-OUTLOOP-NEXT: WIDEN-REDUCTION-PHI ir<[[RDX_PHI:%.+]]> = phi ir<%start>, ir<[[RDX_NEXT:%.+]]> 145; NO-VP-OUTLOOP-NEXT: vp<[[ST:%[0-9]+]]> = SCALAR-STEPS vp<[[IV]]>, ir<1> 146; NO-VP-OUTLOOP-NEXT: CLONE ir<[[GEP1:%.+]]> = getelementptr inbounds ir<%a>, vp<[[ST]]> 147; NO-VP-OUTLOOP-NEXT: vp<[[PTR1:%[0-9]+]]> = vector-pointer ir<[[GEP1]]> 148; NO-VP-OUTLOOP-NEXT: WIDEN ir<[[LD1:%.+]]> = load vp<[[PTR1]]> 149; NO-VP-OUTLOOP-NEXT: WIDEN ir<[[ADD:%.+]]> = add ir<[[LD1]]>, ir<[[RDX_PHI]]> 150; NO-VP-OUTLOOP-NEXT: EMIT vp<[[IV_NEXT_EXIT:%.+]]> = add nuw vp<[[IV]]>, vp<[[VFUF]]> 151; NO-VP-OUTLOOP-NEXT: EMIT branch-on-count vp<[[IV_NEXT_EXIT]]>, vp<[[VTC]]> 152; NO-VP-OUTLOOP-NEXT: No successors 153; NO-VP-OUTLOOP-NEXT: } 154; NO-VP-OUTLOOP-NEXT: Successor(s): middle.block 155; NO-VP-OUTLOOP-EMPTY: 156; NO-VP-OUTLOOP-NEXT: middle.block: 157; NO-VP-OUTLOOP-NEXT: EMIT vp<[[RDX:%.+]]> = compute-reduction-result ir<[[RDX_PHI]]>, ir<[[ADD]]> 158; NO-VP-OUTLOOP-NEXT: EMIT vp<[[RDX_EX:%.+]]> = extract-from-end vp<[[RDX]]>, ir<1> 159; NO-VP-OUTLOOP-NEXT: EMIT vp<[[BOC:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]> 160; NO-VP-OUTLOOP-NEXT: EMIT branch-on-cond vp<[[BOC]]> 161; NO-VP-OUTLOOP-NEXT: Successor(s): ir-bb<for.end>, scalar.ph 162; NO-VP-OUTLOOP-EMPTY: 163; NO-VP-OUTLOOP-NEXT: scalar.ph: 164; NO-VP-OUTLOOP-NEXT: EMIT vp<[[IV_RESUME:%.+]]> = resume-phi vp<[[VTC]]>, ir<0> 165; NO-VP-OUTLOOP-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RDX]]>, ir<%start> 166; NO-VP-OUTLOOP-NEXT: Successor(s): ir-bb<for.body> 167; NO-VP-OUTLOOP-EMPTY: 168; NO-VP-OUTLOOP-NEXT: ir-bb<for.body>: 169; NO-VP-OUTLOOP-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] (extra operand: vp<[[IV_RESUME]]> from scalar.ph) 170; NO-VP-OUTLOOP-NEXT: IR %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ] 171; NO-VP-OUTLOOP: IR %exitcond.not = icmp eq i64 %iv.next, %n 172; NO-VP-OUTLOOP-NEXT: No successors 173; NO-VP-OUTLOOP-EMPTY: 174; NO-VP-OUTLOOP-NEXT: ir-bb<for.end>: 175; NO-VP-OUTLOOP-NEXT: IR %add.lcssa = phi i32 [ %add, %for.body ] (extra operand: vp<[[RDX_EX]]> from middle.block) 176; NO-VP-OUTLOOP-NEXT: No successors 177; NO-VP-OUTLOOP-NEXT: } 178; 179 180; NO-VP-INLOOP: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF>=1' { 181; NO-VP-INLOOP-NEXT: Live-in vp<[[VFUF:%[0-9]+]]> = VF * UF 182; NO-VP-INLOOP-NEXT: Live-in vp<[[VTC:%[0-9]+]]> = vector-trip-count 183; NO-VP-INLOOP-NEXT: Live-in ir<%n> = original trip-count 184; NO-VP-INLOOP-EMPTY: 185; NO-VP-INLOOP: vector.ph: 186; NO-VP-INLOOP-NEXT: Successor(s): vector loop 187; NO-VP-INLOOP-EMPTY: 188; NO-VP-INLOOP-NEXT: <x1> vector loop: { 189; NO-VP-INLOOP-NEXT: vector.body: 190; NO-VP-INLOOP-NEXT: EMIT vp<[[IV:%[0-9]+]]> = CANONICAL-INDUCTION 191; NO-VP-INLOOP-NEXT: WIDEN-REDUCTION-PHI ir<[[RDX_PHI:%.+]]> = phi ir<%start>, ir<[[RDX_NEXT:%.+]]> 192; NO-VP-INLOOP-NEXT: vp<[[ST:%[0-9]+]]> = SCALAR-STEPS vp<[[IV]]>, ir<1> 193; NO-VP-INLOOP-NEXT: CLONE ir<[[GEP1:%.+]]> = getelementptr inbounds ir<%a>, vp<[[ST]]> 194; NO-VP-INLOOP-NEXT: vp<[[PTR1:%[0-9]+]]> = vector-pointer ir<[[GEP1]]> 195; NO-VP-INLOOP-NEXT: WIDEN ir<[[LD1:%.+]]> = load vp<[[PTR1]]> 196; NO-VP-INLOOP-NEXT: REDUCE ir<[[ADD:%.+]]> = ir<[[RDX_PHI]]> + reduce.add (ir<[[LD1]]>) 197; NO-VP-INLOOP-NEXT: EMIT vp<[[IV_NEXT_EXIT:%.+]]> = add nuw vp<[[IV]]>, vp<[[VFUF]]> 198; NO-VP-INLOOP-NEXT: EMIT branch-on-count vp<[[IV_NEXT_EXIT]]>, vp<[[VTC]]> 199; NO-VP-INLOOP-NEXT: No successors 200; NO-VP-INLOOP-NEXT: } 201; NO-VP-INLOOP-NEXT: Successor(s): middle.block 202; NO-VP-INLOOP-EMPTY: 203; NO-VP-INLOOP-NEXT: middle.block: 204; NO-VP-INLOOP-NEXT: EMIT vp<[[RDX:%.+]]> = compute-reduction-result ir<[[RDX_PHI]]>, ir<[[ADD]]> 205; NO-VP-INLOOP-NEXT: EMIT vp<[[RDX_EX:%.+]]> = extract-from-end vp<[[RDX]]>, ir<1> 206; NO-VP-INLOOP-NEXT: EMIT vp<[[BOC:%.+]]> = icmp eq ir<%n>, vp<[[VTC]]> 207; NO-VP-INLOOP-NEXT: EMIT branch-on-cond vp<[[BOC]]> 208; NO-VP-INLOOP-NEXT: Successor(s): ir-bb<for.end>, scalar.ph 209; NO-VP-INLOOP-EMPTY: 210; NO-VP-INLOOP-NEXT: scalar.ph: 211; NO-VP-INLOOP-NEXT: EMIT vp<[[IV_RESUME:%.+]]> = resume-phi vp<[[VTC]]>, ir<0> 212; NO-VP-INLOOP-NEXT: EMIT vp<[[RED_RESUME:%.+]]> = resume-phi vp<[[RDX]]>, ir<%start> 213; NO-VP-INLOOP-NEXT: Successor(s): ir-bb<for.body> 214; NO-VP-INLOOP-EMPTY: 215; NO-VP-INLOOP-NEXT: ir-bb<for.body>: 216; NO-VP-INLOOP-NEXT: IR %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] (extra operand: vp<[[IV_RESUME]]> from scalar.ph) 217; NO-VP-INLOOP-NEXT: IR %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ] 218; NO-VP-INLOOP: IR %exitcond.not = icmp eq i64 %iv.next, %n 219; NO-VP-INLOOP-NEXT: No successors 220; NO-VP-INLOOP-EMPTY: 221; NO-VP-INLOOP-NEXT: ir-bb<for.end>: 222; NO-VP-INLOOP-NEXT: IR %add.lcssa = phi i32 [ %add, %for.body ] (extra operand: vp<[[RDX_EX]]> from middle.block) 223; NO-VP-INLOOP-NEXT: No successors 224; NO-VP-INLOOP-NEXT: } 225; 226entry: 227 br label %for.body 228 229for.body: 230 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 231 %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ] 232 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %iv 233 %0 = load i32, ptr %arrayidx, align 4 234 %add = add nsw i32 %0, %rdx 235 %iv.next = add nuw nsw i64 %iv, 1 236 %exitcond.not = icmp eq i64 %iv.next, %n 237 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0 238 239for.end: 240 ret i32 %add 241} 242 243!0 = distinct !{!0, !1} 244!1 = !{!"llvm.loop.vectorize.enable", i1 true} 245