1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2; RUN: opt -p loop-vectorize -mattr="+v" -S %s | FileCheck %s
3
4target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
5target triple = "riscv64-unknown-linux-gnu"
6
7; Test case for https://github.com/llvm/llvm-project/issues/87378.
8define void @pr87378_vpinstruction_or_drop_poison_generating_flags(ptr %arg, i64 %a, i64 %b, i64 %c) {
9; CHECK-LABEL: define void @pr87378_vpinstruction_or_drop_poison_generating_flags(
10; CHECK-SAME: ptr [[ARG:%.*]], i64 [[A:%.*]], i64 [[B:%.*]], i64 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
11; CHECK-NEXT:  entry:
12; CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
13; CHECK-NEXT:    [[TMP1:%.*]] = mul i64 [[TMP0]], 8
14; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1001, [[TMP1]]
15; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
16; CHECK:       vector.ph:
17; CHECK-NEXT:    [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
18; CHECK-NEXT:    [[TMP3:%.*]] = mul i64 [[TMP2]], 8
19; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 1001, [[TMP3]]
20; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 1001, [[N_MOD_VF]]
21; CHECK-NEXT:    [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
22; CHECK-NEXT:    [[TMP5:%.*]] = mul i64 [[TMP4]], 8
23; CHECK-NEXT:    [[TMP6:%.*]] = call <vscale x 8 x i64> @llvm.stepvector.nxv8i64()
24; CHECK-NEXT:    [[TMP8:%.*]] = mul <vscale x 8 x i64> [[TMP6]], splat (i64 1)
25; CHECK-NEXT:    [[INDUCTION:%.*]] = add <vscale x 8 x i64> zeroinitializer, [[TMP8]]
26; CHECK-NEXT:    [[TMP11:%.*]] = mul i64 1, [[TMP5]]
27; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i64> poison, i64 [[TMP11]], i64 0
28; CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i64> [[DOTSPLATINSERT]], <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
29; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 8 x i64> poison, i64 [[A]], i64 0
30; CHECK-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 8 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
31; CHECK-NEXT:    [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 8 x i64> poison, i64 [[B]], i64 0
32; CHECK-NEXT:    [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 8 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
33; CHECK-NEXT:    [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <vscale x 8 x i64> poison, i64 [[C]], i64 0
34; CHECK-NEXT:    [[BROADCAST_SPLAT4:%.*]] = shufflevector <vscale x 8 x i64> [[BROADCAST_SPLATINSERT3]], <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
35; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
36; CHECK:       vector.body:
37; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
38; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <vscale x 8 x i64> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
39; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 0
40; CHECK-NEXT:    [[TMP13:%.*]] = icmp ule <vscale x 8 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
41; CHECK-NEXT:    [[TMP14:%.*]] = icmp ule <vscale x 8 x i64> [[VEC_IND]], [[BROADCAST_SPLAT2]]
42; CHECK-NEXT:    [[TMP15:%.*]] = select <vscale x 8 x i1> [[TMP13]], <vscale x 8 x i1> [[TMP14]], <vscale x 8 x i1> zeroinitializer
43; CHECK-NEXT:    [[TMP16:%.*]] = xor <vscale x 8 x i1> [[TMP13]], splat (i1 true)
44; CHECK-NEXT:    [[TMP17:%.*]] = or <vscale x 8 x i1> [[TMP15]], [[TMP16]]
45; CHECK-NEXT:    [[TMP18:%.*]] = icmp ule <vscale x 8 x i64> [[VEC_IND]], [[BROADCAST_SPLAT4]]
46; CHECK-NEXT:    [[TMP19:%.*]] = select <vscale x 8 x i1> [[TMP17]], <vscale x 8 x i1> [[TMP18]], <vscale x 8 x i1> zeroinitializer
47; CHECK-NEXT:    [[TMP20:%.*]] = xor <vscale x 8 x i1> [[TMP14]], splat (i1 true)
48; CHECK-NEXT:    [[TMP21:%.*]] = select <vscale x 8 x i1> [[TMP13]], <vscale x 8 x i1> [[TMP20]], <vscale x 8 x i1> zeroinitializer
49; CHECK-NEXT:    [[TMP22:%.*]] = or <vscale x 8 x i1> [[TMP19]], [[TMP21]]
50; CHECK-NEXT:    [[EXT:%.*]] = extractelement <vscale x 8 x i1> [[TMP19]], i32 0
51; CHECK-NEXT:    [[PREDPHI:%.*]] = select i1 [[EXT]], i64 [[TMP12]], i64 poison
52; CHECK-NEXT:    [[TMP24:%.*]] = getelementptr i16, ptr [[ARG]], i64 [[PREDPHI]]
53; CHECK-NEXT:    [[TMP25:%.*]] = getelementptr i16, ptr [[TMP24]], i32 0
54; CHECK-NEXT:    call void @llvm.masked.store.nxv8i16.p0(<vscale x 8 x i16> zeroinitializer, ptr [[TMP25]], i32 2, <vscale x 8 x i1> [[TMP22]])
55; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP5]]
56; CHECK-NEXT:    [[VEC_IND_NEXT]] = add <vscale x 8 x i64> [[VEC_IND]], [[DOTSPLAT]]
57; CHECK-NEXT:    [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
58; CHECK-NEXT:    br i1 [[TMP26]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
59; CHECK:       middle.block:
60; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 1001, [[N_VEC]]
61; CHECK-NEXT:    br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
62; CHECK:       scalar.ph:
63; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
64; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]
65; CHECK:       loop.header:
66; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
67; CHECK-NEXT:    [[C_1:%.*]] = icmp ule i64 [[IV]], [[A]]
68; CHECK-NEXT:    br i1 [[C_1]], label [[THEN_1:%.*]], label [[ELSE_1:%.*]]
69; CHECK:       then.1:
70; CHECK-NEXT:    [[C_2:%.*]] = icmp ule i64 [[IV]], [[B]]
71; CHECK-NEXT:    br i1 [[C_2]], label [[ELSE_1]], label [[MERGE:%.*]]
72; CHECK:       else.1:
73; CHECK-NEXT:    [[C_3:%.*]] = icmp ule i64 [[IV]], [[C]]
74; CHECK-NEXT:    br i1 [[C_3]], label [[THEN_2:%.*]], label [[LOOP_LATCH]]
75; CHECK:       then.2:
76; CHECK-NEXT:    br label [[MERGE]]
77; CHECK:       merge:
78; CHECK-NEXT:    [[IDX:%.*]] = phi i64 [ poison, [[THEN_1]] ], [ [[IV]], [[THEN_2]] ]
79; CHECK-NEXT:    [[GETELEMENTPTR:%.*]] = getelementptr i16, ptr [[ARG]], i64 [[IDX]]
80; CHECK-NEXT:    store i16 0, ptr [[GETELEMENTPTR]], align 2
81; CHECK-NEXT:    br label [[LOOP_LATCH]]
82; CHECK:       loop.latch:
83; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
84; CHECK-NEXT:    [[ICMP:%.*]] = icmp eq i64 [[IV]], 1000
85; CHECK-NEXT:    br i1 [[ICMP]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]
86; CHECK:       exit:
87; CHECK-NEXT:    ret void
88;
89entry:
90  br label %loop.header
91
92loop.header:
93  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
94  %c.1 = icmp ule i64 %iv, %a
95  br i1 %c.1, label %then.1, label %else.1
96
97then.1:
98  %c.2 = icmp ule i64 %iv, %b
99  br i1 %c.2, label %else.1, label %merge
100
101else.1:
102  %c.3 = icmp ule i64 %iv, %c
103  br i1 %c.3, label %then.2, label %loop.latch
104
105then.2:
106  br label %merge
107
108merge:
109  %idx = phi i64 [ poison, %then.1 ], [ %iv, %then.2 ]
110  %getelementptr = getelementptr i16, ptr %arg, i64 %idx
111  store i16 0, ptr %getelementptr, align 2
112  br label %loop.latch
113
114loop.latch:
115  %iv.next = add i64 %iv, 1
116  %icmp = icmp eq i64 %iv, 1000
117  br i1 %icmp, label %exit, label %loop.header
118
119exit:
120  ret void
121}
122;.
123; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
124; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
125; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
126; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
127;.
128