1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt < %s -passes=loop-vectorize -mtriple loongarch64-linux-gnu -mattr=+lasx -S | FileCheck %s 3 4;; This is a collection of tests whose only purpose is to show changes in the 5;; default configuration. Please keep these tests minimal - if you're testing 6;; functionality of some specific configuration, please place that in a 7;; separate test file with a hard coded configuration (even if that 8;; configuration is the current default). 9 10target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128" 11target triple = "loongarch64" 12 13define void @vector_add(ptr noalias nocapture %a, i64 %v) { 14; CHECK-LABEL: define void @vector_add( 15; CHECK-SAME: ptr noalias captures(none) [[A:%.*]], i64 [[V:%.*]]) #[[ATTR0:[0-9]+]] { 16; CHECK-NEXT: entry: 17; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 18; CHECK: vector.ph: 19; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[V]], i64 0 20; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer 21; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 22; CHECK: vector.body: 23; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 24; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 25; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[TMP0]] 26; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i64, ptr [[TMP2]], i32 0 27; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i64, ptr [[TMP2]], i32 4 28; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i64>, ptr [[TMP4]], align 8 29; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i64>, ptr [[TMP5]], align 8 30; CHECK-NEXT: [[TMP6:%.*]] = add <4 x i64> [[WIDE_LOAD]], [[BROADCAST_SPLAT]] 31; CHECK-NEXT: [[TMP7:%.*]] = add <4 x i64> [[WIDE_LOAD1]], [[BROADCAST_SPLAT]] 32; CHECK-NEXT: store <4 x i64> [[TMP6]], ptr [[TMP4]], align 8 33; CHECK-NEXT: store <4 x i64> [[TMP7]], ptr [[TMP5]], align 8 34; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 35; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1024 36; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 37; CHECK: middle.block: 38; CHECK-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 39; CHECK: scalar.ph: 40; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 1024, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 41; CHECK-NEXT: br label [[FOR_BODY:%.*]] 42; CHECK: for.body: 43; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ] 44; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[IV]] 45; CHECK-NEXT: [[ELEM:%.*]] = load i64, ptr [[ARRAYIDX]], align 8 46; CHECK-NEXT: [[ADD:%.*]] = add i64 [[ELEM]], [[V]] 47; CHECK-NEXT: store i64 [[ADD]], ptr [[ARRAYIDX]], align 8 48; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 49; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 1024 50; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] 51; CHECK: for.end: 52; CHECK-NEXT: ret void 53; 54entry: 55 br label %for.body 56 57for.body: 58 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 59 %arrayidx = getelementptr inbounds i64, ptr %a, i64 %iv 60 %elem = load i64, ptr %arrayidx 61 %add = add i64 %elem, %v 62 store i64 %add, ptr %arrayidx 63 %iv.next = add nuw nsw i64 %iv, 1 64 %exitcond.not = icmp eq i64 %iv.next, 1024 65 br i1 %exitcond.not, label %for.end, label %for.body 66 67for.end: 68 ret void 69} 70;. 71; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} 72; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} 73; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} 74; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} 75;. 76