1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=loop-vectorize < %s -S -o - | FileCheck %s 3 4target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 5target triple = "thumbv8.1m.main-none-eabi" 6 7; Test cases to make sure LV & loop versioning can handle loops with 8; multiple exiting branches. 9 10; Multiple branches exiting the loop to a unique exit block. 11define void @multiple_exits_unique_exit_block(ptr %A, ptr %B, i32 %N) #0 { 12; CHECK-LABEL: @multiple_exits_unique_exit_block( 13; CHECK-NEXT: entry: 14; CHECK-NEXT: [[A2:%.*]] = ptrtoint ptr [[A:%.*]] to i32 15; CHECK-NEXT: [[B1:%.*]] = ptrtoint ptr [[B:%.*]] to i32 16; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[N:%.*]], i32 999) 17; CHECK-NEXT: [[TMP0:%.*]] = add nuw nsw i32 [[UMIN]], 1 18; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i32 [[TMP0]], 4 19; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] 20; CHECK: vector.memcheck: 21; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[B1]], [[A2]] 22; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i32 [[TMP1]], 16 23; CHECK-NEXT: br i1 [[DIFF_CHECK]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 24; CHECK: vector.ph: 25; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], 4 26; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[N_MOD_VF]], 0 27; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 4, i32 [[N_MOD_VF]] 28; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[TMP3]] 29; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 30; CHECK: vector.body: 31; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 32; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[INDEX]], 0 33; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP4]] 34; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 0 35; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP6]], align 4 36; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[TMP4]] 37; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 0 38; CHECK-NEXT: store <4 x i32> [[WIDE_LOAD]], ptr [[TMP8]], align 4 39; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 40; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 41; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 42; CHECK: middle.block: 43; CHECK-NEXT: br label [[SCALAR_PH]] 44; CHECK: scalar.ph: 45; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[ENTRY:%.*]] ] 46; CHECK-NEXT: br label [[LOOP_HEADER:%.*]] 47; CHECK: loop.header: 48; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY:%.*]] ] 49; CHECK-NEXT: [[COND_0:%.*]] = icmp eq i32 [[IV]], [[N]] 50; CHECK-NEXT: br i1 [[COND_0]], label [[EXIT:%.*]], label [[FOR_BODY]] 51; CHECK: for.body: 52; CHECK-NEXT: [[A_GEP:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[IV]] 53; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[A_GEP]], align 4 54; CHECK-NEXT: [[B_GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[IV]] 55; CHECK-NEXT: store i32 [[LV]], ptr [[B_GEP]], align 4 56; CHECK-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 1 57; CHECK-NEXT: [[COND_1:%.*]] = icmp ult i32 [[IV_NEXT]], 1000 58; CHECK-NEXT: br i1 [[COND_1]], label [[LOOP_HEADER]], label [[EXIT]], !llvm.loop [[LOOP3:![0-9]+]] 59; CHECK: exit: 60; CHECK-NEXT: ret void 61; 62entry: 63 br label %loop.header 64 65loop.header: 66 %iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ] 67 %cond.0 = icmp eq i32 %iv, %N 68 br i1 %cond.0, label %exit, label %for.body 69 70for.body: 71 %A.gep = getelementptr inbounds i32, ptr %A, i32 %iv 72 %lv = load i32, ptr %A.gep, align 4 73 %B.gep = getelementptr inbounds i32, ptr %B, i32 %iv 74 store i32 %lv, ptr %B.gep, align 4 75 %iv.next = add nuw i32 %iv, 1 76 %cond.1 = icmp ult i32 %iv.next, 1000 77 br i1 %cond.1, label %loop.header, label %exit 78 79exit: 80 ret void 81} 82 83 84; Multiple branches exiting the loop to different blocks. 85define i32 @multiple_exits_multiple_exit_blocks(ptr %A, ptr %B, i32 %N) #0 { 86; CHECK-LABEL: @multiple_exits_multiple_exit_blocks( 87; CHECK-NEXT: entry: 88; CHECK-NEXT: [[A2:%.*]] = ptrtoint ptr [[A:%.*]] to i32 89; CHECK-NEXT: [[B1:%.*]] = ptrtoint ptr [[B:%.*]] to i32 90; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[N:%.*]], i32 999) 91; CHECK-NEXT: [[TMP0:%.*]] = add nuw nsw i32 [[UMIN]], 1 92; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i32 [[TMP0]], 4 93; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] 94; CHECK: vector.memcheck: 95; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[B1]], [[A2]] 96; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i32 [[TMP1]], 16 97; CHECK-NEXT: br i1 [[DIFF_CHECK]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 98; CHECK: vector.ph: 99; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], 4 100; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[N_MOD_VF]], 0 101; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 4, i32 [[N_MOD_VF]] 102; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[TMP3]] 103; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 104; CHECK: vector.body: 105; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 106; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[INDEX]], 0 107; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[TMP4]] 108; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 0 109; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP6]], align 4 110; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[TMP4]] 111; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 0 112; CHECK-NEXT: store <4 x i32> [[WIDE_LOAD]], ptr [[TMP8]], align 4 113; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 114; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 115; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 116; CHECK: middle.block: 117; CHECK-NEXT: br label [[SCALAR_PH]] 118; CHECK: scalar.ph: 119; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[ENTRY:%.*]] ] 120; CHECK-NEXT: br label [[LOOP_HEADER:%.*]] 121; CHECK: loop.header: 122; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY:%.*]] ] 123; CHECK-NEXT: [[COND_0:%.*]] = icmp eq i32 [[IV]], [[N]] 124; CHECK-NEXT: br i1 [[COND_0]], label [[EXIT_0:%.*]], label [[FOR_BODY]] 125; CHECK: for.body: 126; CHECK-NEXT: [[A_GEP:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[IV]] 127; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[A_GEP]], align 4 128; CHECK-NEXT: [[B_GEP:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[IV]] 129; CHECK-NEXT: store i32 [[LV]], ptr [[B_GEP]], align 4 130; CHECK-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 1 131; CHECK-NEXT: [[COND_1:%.*]] = icmp ult i32 [[IV_NEXT]], 1000 132; CHECK-NEXT: br i1 [[COND_1]], label [[LOOP_HEADER]], label [[EXIT_1:%.*]], !llvm.loop [[LOOP5:![0-9]+]] 133; CHECK: exit.0: 134; CHECK-NEXT: ret i32 1 135; CHECK: exit.1: 136; CHECK-NEXT: ret i32 2 137; 138entry: 139 br label %loop.header 140 141loop.header: 142 %iv = phi i32 [ 0, %entry ], [ %iv.next, %for.body ] 143 %cond.0 = icmp eq i32 %iv, %N 144 br i1 %cond.0, label %exit.0, label %for.body 145 146for.body: 147 %A.gep = getelementptr inbounds i32, ptr %A, i32 %iv 148 %lv = load i32, ptr %A.gep, align 4 149 %B.gep = getelementptr inbounds i32, ptr %B, i32 %iv 150 store i32 %lv, ptr %B.gep, align 4 151 %iv.next = add nuw i32 %iv, 1 152 %cond.1 = icmp ult i32 %iv.next, 1000 153 br i1 %cond.1, label %loop.header, label %exit.1 154 155exit.0: 156 ret i32 1 157 158exit.1: 159 ret i32 2 160} 161 162attributes #0 = { "target-features"="+mve" } 163