1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes --filter "call.*(cos|sin|tan|cbrt|erf|exp[^e]|gamma|log|sqrt|copysign|dim|min|mod|hypot|nextafter|pow|fma)" --version 2 2; RUN: opt -mattr=+neon -vector-library=sleefgnuabi -passes=inject-tli-mappings,loop-vectorize,simplifycfg -force-vector-interleave=1 -S < %s | FileCheck %s -check-prefix=SLEEF-NEON 3; RUN: opt -mattr=+sve -vector-library=sleefgnuabi -passes=inject-tli-mappings,loop-vectorize,simplifycfg -mcpu=neoverse-v1 -force-vector-interleave=1 -prefer-predicate-over-epilogue=predicate-dont-vectorize -S < %s | FileCheck %s -check-prefix=SLEEF-SVE 4; RUN: opt -mattr=+sve -vector-library=sleefgnuabi -passes=inject-tli-mappings,loop-vectorize,simplifycfg -mcpu=neoverse-v1 -force-vector-interleave=1 -S < %s | FileCheck %s -check-prefixes=SLEEF-SVE-NOPRED 5; RUN: opt -mattr=+neon -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize,simplifycfg -force-vector-interleave=1 -S < %s | FileCheck %s -check-prefix=ARMPL-NEON 6; RUN: opt -mattr=+sve -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize,simplifycfg -mcpu=neoverse-v1 -force-vector-interleave=1 -prefer-predicate-over-epilogue=predicate-dont-vectorize -S < %s | FileCheck %s -check-prefix=ARMPL-SVE 7; RUN: opt -mattr=+sve -vector-library=ArmPL -passes=inject-tli-mappings,loop-vectorize,simplifycfg -mcpu=neoverse-v1 -force-vector-interleave=1 -S < %s | FileCheck %s -check-prefixes=ARMPL-SVE-NOPRED 8 9 10 11target triple = "aarch64-unknown-linux-gnu" 12 13; We are checking whether loops containing function calls can be vectorized, 14; when the compiler provides TLI mappings to their vector variants. The tests 15; are checking fixed width vectorization with NEON and scalable vectorization 16; with SVE. 17 18declare double @acos(double) 19declare float @acosf(float) 20 21define void @acos_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 22; SLEEF-NEON-LABEL: define void @acos_f64 23; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0:[0-9]+]] { 24; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_acos(<2 x double> [[WIDE_LOAD:%.*]]) 25; 26; SLEEF-SVE-LABEL: define void @acos_f64 27; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0:[0-9]+]] { 28; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_acos(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 29; 30; SLEEF-SVE-NOPRED-LABEL: define void @acos_f64 31; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0:[0-9]+]] { 32; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_acos(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 33; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @acos(double [[IN:%.*]]) 34; 35; ARMPL-NEON-LABEL: define void @acos_f64 36; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0:[0-9]+]] { 37; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vacosq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 38; 39; ARMPL-SVE-LABEL: define void @acos_f64 40; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0:[0-9]+]] { 41; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svacos_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 42; 43; ARMPL-SVE-NOPRED-LABEL: define void @acos_f64 44; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0:[0-9]+]] { 45; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svacos_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 46; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @acos(double [[IN:%.*]]) 47; 48 entry: 49 br label %for.body 50 51 for.body: 52 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 53 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 54 %in = load double, ptr %in.gep, align 8 55 %call = tail call double @acos(double %in) 56 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 57 store double %call, ptr %out.gep, align 8 58 %iv.next = add nuw nsw i64 %iv, 1 59 %exitcond = icmp eq i64 %iv.next, 1000 60 br i1 %exitcond, label %for.end, label %for.body 61 62 for.end: 63 ret void 64} 65 66define void @acos_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 67; SLEEF-NEON-LABEL: define void @acos_f32 68; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 69; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_acosf(<4 x float> [[WIDE_LOAD:%.*]]) 70; 71; SLEEF-SVE-LABEL: define void @acos_f32 72; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 73; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_acosf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 74; 75; SLEEF-SVE-NOPRED-LABEL: define void @acos_f32 76; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 77; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_acosf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 78; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @acosf(float [[IN:%.*]]) 79; 80; ARMPL-NEON-LABEL: define void @acos_f32 81; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 82; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vacosq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 83; 84; ARMPL-SVE-LABEL: define void @acos_f32 85; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 86; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svacos_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 87; 88; ARMPL-SVE-NOPRED-LABEL: define void @acos_f32 89; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 90; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svacos_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 91; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @acosf(float [[IN:%.*]]) 92; 93 entry: 94 br label %for.body 95 96 for.body: 97 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 98 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 99 %in = load float, ptr %in.gep, align 8 100 %call = tail call float @acosf(float %in) 101 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 102 store float %call, ptr %out.gep, align 4 103 %iv.next = add nuw nsw i64 %iv, 1 104 %exitcond = icmp eq i64 %iv.next, 1000 105 br i1 %exitcond, label %for.end, label %for.body 106 107 for.end: 108 ret void 109} 110 111declare double @acosh(double) 112declare float @acoshf(float) 113 114define void @acosh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 115; SLEEF-NEON-LABEL: define void @acosh_f64 116; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 117; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_acosh(<2 x double> [[WIDE_LOAD:%.*]]) 118; 119; SLEEF-SVE-LABEL: define void @acosh_f64 120; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 121; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_acosh(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 122; 123; SLEEF-SVE-NOPRED-LABEL: define void @acosh_f64 124; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 125; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_acosh(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 126; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @acosh(double [[IN:%.*]]) 127; 128; ARMPL-NEON-LABEL: define void @acosh_f64 129; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 130; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vacoshq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 131; 132; ARMPL-SVE-LABEL: define void @acosh_f64 133; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 134; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svacosh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 135; 136; ARMPL-SVE-NOPRED-LABEL: define void @acosh_f64 137; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 138; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svacosh_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 139; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @acosh(double [[IN:%.*]]) 140; 141 entry: 142 br label %for.body 143 144 for.body: 145 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 146 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 147 %in = load double, ptr %in.gep, align 8 148 %call = tail call double @acosh(double %in) 149 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 150 store double %call, ptr %out.gep, align 8 151 %iv.next = add nuw nsw i64 %iv, 1 152 %exitcond = icmp eq i64 %iv.next, 1000 153 br i1 %exitcond, label %for.end, label %for.body 154 155 for.end: 156 ret void 157} 158 159define void @acosh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 160; SLEEF-NEON-LABEL: define void @acosh_f32 161; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 162; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_acoshf(<4 x float> [[WIDE_LOAD:%.*]]) 163; 164; SLEEF-SVE-LABEL: define void @acosh_f32 165; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 166; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_acoshf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 167; 168; SLEEF-SVE-NOPRED-LABEL: define void @acosh_f32 169; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 170; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_acoshf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 171; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @acoshf(float [[IN:%.*]]) 172; 173; ARMPL-NEON-LABEL: define void @acosh_f32 174; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 175; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vacoshq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 176; 177; ARMPL-SVE-LABEL: define void @acosh_f32 178; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 179; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svacosh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 180; 181; ARMPL-SVE-NOPRED-LABEL: define void @acosh_f32 182; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 183; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svacosh_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 184; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @acoshf(float [[IN:%.*]]) 185; 186 entry: 187 br label %for.body 188 189 for.body: 190 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 191 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 192 %in = load float, ptr %in.gep, align 8 193 %call = tail call float @acoshf(float %in) 194 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 195 store float %call, ptr %out.gep, align 4 196 %iv.next = add nuw nsw i64 %iv, 1 197 %exitcond = icmp eq i64 %iv.next, 1000 198 br i1 %exitcond, label %for.end, label %for.body 199 200 for.end: 201 ret void 202} 203 204declare double @asin(double) 205declare float @asinf(float) 206 207define void @asin_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 208; SLEEF-NEON-LABEL: define void @asin_f64 209; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 210; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_asin(<2 x double> [[WIDE_LOAD:%.*]]) 211; 212; SLEEF-SVE-LABEL: define void @asin_f64 213; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 214; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_asin(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 215; 216; SLEEF-SVE-NOPRED-LABEL: define void @asin_f64 217; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 218; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_asin(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 219; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @asin(double [[IN:%.*]]) 220; 221; ARMPL-NEON-LABEL: define void @asin_f64 222; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 223; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vasinq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 224; 225; ARMPL-SVE-LABEL: define void @asin_f64 226; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 227; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svasin_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 228; 229; ARMPL-SVE-NOPRED-LABEL: define void @asin_f64 230; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 231; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svasin_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 232; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @asin(double [[IN:%.*]]) 233; 234 entry: 235 br label %for.body 236 237 for.body: 238 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 239 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 240 %in = load double, ptr %in.gep, align 8 241 %call = tail call double @asin(double %in) 242 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 243 store double %call, ptr %out.gep, align 8 244 %iv.next = add nuw nsw i64 %iv, 1 245 %exitcond = icmp eq i64 %iv.next, 1000 246 br i1 %exitcond, label %for.end, label %for.body 247 248 for.end: 249 ret void 250} 251 252define void @asin_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 253; SLEEF-NEON-LABEL: define void @asin_f32 254; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 255; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_asinf(<4 x float> [[WIDE_LOAD:%.*]]) 256; 257; SLEEF-SVE-LABEL: define void @asin_f32 258; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 259; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_asinf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 260; 261; SLEEF-SVE-NOPRED-LABEL: define void @asin_f32 262; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 263; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_asinf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 264; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @asinf(float [[IN:%.*]]) 265; 266; ARMPL-NEON-LABEL: define void @asin_f32 267; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 268; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vasinq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 269; 270; ARMPL-SVE-LABEL: define void @asin_f32 271; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 272; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svasin_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 273; 274; ARMPL-SVE-NOPRED-LABEL: define void @asin_f32 275; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 276; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svasin_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 277; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @asinf(float [[IN:%.*]]) 278; 279 entry: 280 br label %for.body 281 282 for.body: 283 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 284 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 285 %in = load float, ptr %in.gep, align 8 286 %call = tail call float @asinf(float %in) 287 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 288 store float %call, ptr %out.gep, align 4 289 %iv.next = add nuw nsw i64 %iv, 1 290 %exitcond = icmp eq i64 %iv.next, 1000 291 br i1 %exitcond, label %for.end, label %for.body 292 293 for.end: 294 ret void 295} 296 297declare double @asinh(double) 298declare float @asinhf(float) 299 300define void @asinh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 301; SLEEF-NEON-LABEL: define void @asinh_f64 302; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 303; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_asinh(<2 x double> [[WIDE_LOAD:%.*]]) 304; 305; SLEEF-SVE-LABEL: define void @asinh_f64 306; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 307; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_asinh(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 308; 309; SLEEF-SVE-NOPRED-LABEL: define void @asinh_f64 310; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 311; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_asinh(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 312; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @asinh(double [[IN:%.*]]) 313; 314; ARMPL-NEON-LABEL: define void @asinh_f64 315; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 316; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vasinhq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 317; 318; ARMPL-SVE-LABEL: define void @asinh_f64 319; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 320; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svasinh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 321; 322; ARMPL-SVE-NOPRED-LABEL: define void @asinh_f64 323; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 324; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svasinh_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 325; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @asinh(double [[IN:%.*]]) 326; 327 entry: 328 br label %for.body 329 330 for.body: 331 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 332 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 333 %in = load double, ptr %in.gep, align 8 334 %call = tail call double @asinh(double %in) 335 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 336 store double %call, ptr %out.gep, align 8 337 %iv.next = add nuw nsw i64 %iv, 1 338 %exitcond = icmp eq i64 %iv.next, 1000 339 br i1 %exitcond, label %for.end, label %for.body 340 341 for.end: 342 ret void 343} 344 345define void @asinh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 346; SLEEF-NEON-LABEL: define void @asinh_f32 347; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 348; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_asinhf(<4 x float> [[WIDE_LOAD:%.*]]) 349; 350; SLEEF-SVE-LABEL: define void @asinh_f32 351; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 352; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_asinhf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 353; 354; SLEEF-SVE-NOPRED-LABEL: define void @asinh_f32 355; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 356; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_asinhf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 357; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @asinhf(float [[IN:%.*]]) 358; 359; ARMPL-NEON-LABEL: define void @asinh_f32 360; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 361; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vasinhq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 362; 363; ARMPL-SVE-LABEL: define void @asinh_f32 364; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 365; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svasinh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 366; 367; ARMPL-SVE-NOPRED-LABEL: define void @asinh_f32 368; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 369; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svasinh_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 370; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @asinhf(float [[IN:%.*]]) 371; 372 entry: 373 br label %for.body 374 375 for.body: 376 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 377 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 378 %in = load float, ptr %in.gep, align 8 379 %call = tail call float @asinhf(float %in) 380 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 381 store float %call, ptr %out.gep, align 4 382 %iv.next = add nuw nsw i64 %iv, 1 383 %exitcond = icmp eq i64 %iv.next, 1000 384 br i1 %exitcond, label %for.end, label %for.body 385 386 for.end: 387 ret void 388} 389 390declare double @atan(double) 391declare float @atanf(float) 392 393define void @atan_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 394; SLEEF-NEON-LABEL: define void @atan_f64 395; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 396; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_atan(<2 x double> [[WIDE_LOAD:%.*]]) 397; 398; SLEEF-SVE-LABEL: define void @atan_f64 399; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 400; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_atan(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 401; 402; SLEEF-SVE-NOPRED-LABEL: define void @atan_f64 403; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 404; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_atan(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 405; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @atan(double [[IN:%.*]]) 406; 407; ARMPL-NEON-LABEL: define void @atan_f64 408; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 409; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vatanq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 410; 411; ARMPL-SVE-LABEL: define void @atan_f64 412; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 413; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svatan_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 414; 415; ARMPL-SVE-NOPRED-LABEL: define void @atan_f64 416; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 417; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svatan_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 418; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @atan(double [[IN:%.*]]) 419; 420 entry: 421 br label %for.body 422 423 for.body: 424 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 425 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 426 %in = load double, ptr %in.gep, align 8 427 %call = tail call double @atan(double %in) 428 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 429 store double %call, ptr %out.gep, align 8 430 %iv.next = add nuw nsw i64 %iv, 1 431 %exitcond = icmp eq i64 %iv.next, 1000 432 br i1 %exitcond, label %for.end, label %for.body 433 434 for.end: 435 ret void 436} 437 438define void @atan_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 439; SLEEF-NEON-LABEL: define void @atan_f32 440; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 441; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_atanf(<4 x float> [[WIDE_LOAD:%.*]]) 442; 443; SLEEF-SVE-LABEL: define void @atan_f32 444; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 445; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_atanf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 446; 447; SLEEF-SVE-NOPRED-LABEL: define void @atan_f32 448; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 449; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_atanf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 450; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @atanf(float [[IN:%.*]]) 451; 452; ARMPL-NEON-LABEL: define void @atan_f32 453; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 454; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vatanq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 455; 456; ARMPL-SVE-LABEL: define void @atan_f32 457; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 458; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svatan_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 459; 460; ARMPL-SVE-NOPRED-LABEL: define void @atan_f32 461; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 462; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svatan_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 463; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @atanf(float [[IN:%.*]]) 464; 465 entry: 466 br label %for.body 467 468 for.body: 469 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 470 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 471 %in = load float, ptr %in.gep, align 8 472 %call = tail call float @atanf(float %in) 473 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 474 store float %call, ptr %out.gep, align 4 475 %iv.next = add nuw nsw i64 %iv, 1 476 %exitcond = icmp eq i64 %iv.next, 1000 477 br i1 %exitcond, label %for.end, label %for.body 478 479 for.end: 480 ret void 481} 482 483declare double @atan2(double, double) 484declare float @atan2f(float, float) 485 486define void @atan2_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 487; SLEEF-NEON-LABEL: define void @atan2_f64 488; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 489; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2vv_atan2(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 490; 491; SLEEF-SVE-LABEL: define void @atan2_f64 492; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 493; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_atan2(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 494; 495; SLEEF-SVE-NOPRED-LABEL: define void @atan2_f64 496; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 497; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_atan2(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 498; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @atan2(double [[IN:%.*]], double [[IN]]) 499; 500; ARMPL-NEON-LABEL: define void @atan2_f64 501; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 502; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vatan2q_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 503; 504; ARMPL-SVE-LABEL: define void @atan2_f64 505; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 506; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svatan2_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 507; 508; ARMPL-SVE-NOPRED-LABEL: define void @atan2_f64 509; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 510; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svatan2_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 511; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @atan2(double [[IN:%.*]], double [[IN]]) 512; 513 entry: 514 br label %for.body 515 516 for.body: 517 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 518 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 519 %in = load double, ptr %in.gep, align 8 520 %call = tail call double @atan2(double %in, double %in) 521 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 522 store double %call, ptr %out.gep, align 8 523 %iv.next = add nuw nsw i64 %iv, 1 524 %exitcond = icmp eq i64 %iv.next, 1000 525 br i1 %exitcond, label %for.end, label %for.body 526 527 for.end: 528 ret void 529} 530 531define void @atan2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 532; SLEEF-NEON-LABEL: define void @atan2_f32 533; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 534; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4vv_atan2f(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 535; 536; SLEEF-SVE-LABEL: define void @atan2_f32 537; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 538; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_atan2f(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 539; 540; SLEEF-SVE-NOPRED-LABEL: define void @atan2_f32 541; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 542; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_atan2f(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 543; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @atan2f(float [[IN:%.*]], float [[IN]]) 544; 545; ARMPL-NEON-LABEL: define void @atan2_f32 546; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 547; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vatan2q_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 548; 549; ARMPL-SVE-LABEL: define void @atan2_f32 550; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 551; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svatan2_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 552; 553; ARMPL-SVE-NOPRED-LABEL: define void @atan2_f32 554; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 555; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svatan2_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 556; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @atan2f(float [[IN:%.*]], float [[IN]]) 557; 558 entry: 559 br label %for.body 560 561 for.body: 562 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 563 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 564 %in = load float, ptr %in.gep, align 8 565 %call = tail call float @atan2f(float %in, float %in) 566 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 567 store float %call, ptr %out.gep, align 4 568 %iv.next = add nuw nsw i64 %iv, 1 569 %exitcond = icmp eq i64 %iv.next, 1000 570 br i1 %exitcond, label %for.end, label %for.body 571 572 for.end: 573 ret void 574} 575 576declare double @atanh(double) 577declare float @atanhf(float) 578 579define void @atanh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 580; SLEEF-NEON-LABEL: define void @atanh_f64 581; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 582; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_atanh(<2 x double> [[WIDE_LOAD:%.*]]) 583; 584; SLEEF-SVE-LABEL: define void @atanh_f64 585; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 586; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_atanh(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 587; 588; SLEEF-SVE-NOPRED-LABEL: define void @atanh_f64 589; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 590; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_atanh(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 591; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @atanh(double [[IN:%.*]]) 592; 593; ARMPL-NEON-LABEL: define void @atanh_f64 594; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 595; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vatanhq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 596; 597; ARMPL-SVE-LABEL: define void @atanh_f64 598; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 599; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svatanh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 600; 601; ARMPL-SVE-NOPRED-LABEL: define void @atanh_f64 602; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 603; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svatanh_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 604; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @atanh(double [[IN:%.*]]) 605; 606 entry: 607 br label %for.body 608 609 for.body: 610 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 611 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 612 %in = load double, ptr %in.gep, align 8 613 %call = tail call double @atanh(double %in) 614 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 615 store double %call, ptr %out.gep, align 8 616 %iv.next = add nuw nsw i64 %iv, 1 617 %exitcond = icmp eq i64 %iv.next, 1000 618 br i1 %exitcond, label %for.end, label %for.body 619 620 for.end: 621 ret void 622} 623 624define void @atanh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 625; SLEEF-NEON-LABEL: define void @atanh_f32 626; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 627; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_atanhf(<4 x float> [[WIDE_LOAD:%.*]]) 628; 629; SLEEF-SVE-LABEL: define void @atanh_f32 630; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 631; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_atanhf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 632; 633; SLEEF-SVE-NOPRED-LABEL: define void @atanh_f32 634; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 635; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_atanhf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 636; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @atanhf(float [[IN:%.*]]) 637; 638; ARMPL-NEON-LABEL: define void @atanh_f32 639; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 640; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vatanhq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 641; 642; ARMPL-SVE-LABEL: define void @atanh_f32 643; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 644; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svatanh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 645; 646; ARMPL-SVE-NOPRED-LABEL: define void @atanh_f32 647; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 648; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svatanh_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 649; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @atanhf(float [[IN:%.*]]) 650; 651 entry: 652 br label %for.body 653 654 for.body: 655 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 656 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 657 %in = load float, ptr %in.gep, align 8 658 %call = tail call float @atanhf(float %in) 659 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 660 store float %call, ptr %out.gep, align 4 661 %iv.next = add nuw nsw i64 %iv, 1 662 %exitcond = icmp eq i64 %iv.next, 1000 663 br i1 %exitcond, label %for.end, label %for.body 664 665 for.end: 666 ret void 667} 668 669declare double @cbrt(double) 670declare float @cbrtf(float) 671 672define void @cbrt_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 673; SLEEF-NEON-LABEL: define void @cbrt_f64 674; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 675; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_cbrt(<2 x double> [[WIDE_LOAD:%.*]]) 676; 677; SLEEF-SVE-LABEL: define void @cbrt_f64 678; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 679; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cbrt(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 680; 681; SLEEF-SVE-NOPRED-LABEL: define void @cbrt_f64 682; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 683; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cbrt(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 684; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @cbrt(double [[IN:%.*]]) 685; 686; ARMPL-NEON-LABEL: define void @cbrt_f64 687; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 688; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vcbrtq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 689; 690; ARMPL-SVE-LABEL: define void @cbrt_f64 691; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 692; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svcbrt_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 693; 694; ARMPL-SVE-NOPRED-LABEL: define void @cbrt_f64 695; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 696; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svcbrt_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 697; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @cbrt(double [[IN:%.*]]) 698; 699 entry: 700 br label %for.body 701 702 for.body: 703 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 704 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 705 %in = load double, ptr %in.gep, align 8 706 %call = tail call double @cbrt(double %in) 707 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 708 store double %call, ptr %out.gep, align 8 709 %iv.next = add nuw nsw i64 %iv, 1 710 %exitcond = icmp eq i64 %iv.next, 1000 711 br i1 %exitcond, label %for.end, label %for.body 712 713 for.end: 714 ret void 715} 716 717define void @cbrt_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 718; SLEEF-NEON-LABEL: define void @cbrt_f32 719; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 720; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_cbrtf(<4 x float> [[WIDE_LOAD:%.*]]) 721; 722; SLEEF-SVE-LABEL: define void @cbrt_f32 723; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 724; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_cbrtf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 725; 726; SLEEF-SVE-NOPRED-LABEL: define void @cbrt_f32 727; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 728; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_cbrtf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 729; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @cbrtf(float [[IN:%.*]]) 730; 731; ARMPL-NEON-LABEL: define void @cbrt_f32 732; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 733; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vcbrtq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 734; 735; ARMPL-SVE-LABEL: define void @cbrt_f32 736; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 737; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svcbrt_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 738; 739; ARMPL-SVE-NOPRED-LABEL: define void @cbrt_f32 740; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 741; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svcbrt_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 742; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @cbrtf(float [[IN:%.*]]) 743; 744 entry: 745 br label %for.body 746 747 for.body: 748 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 749 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 750 %in = load float, ptr %in.gep, align 8 751 %call = tail call float @cbrtf(float %in) 752 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 753 store float %call, ptr %out.gep, align 4 754 %iv.next = add nuw nsw i64 %iv, 1 755 %exitcond = icmp eq i64 %iv.next, 1000 756 br i1 %exitcond, label %for.end, label %for.body 757 758 for.end: 759 ret void 760} 761 762declare double @copysign(double, double) 763declare float @copysignf(float, float) 764 765define void @copysign_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 766; SLEEF-NEON-LABEL: define void @copysign_f64 767; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 768; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2vv_copysign(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 769; 770; SLEEF-SVE-LABEL: define void @copysign_f64 771; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 772; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_copysign(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 773; 774; SLEEF-SVE-NOPRED-LABEL: define void @copysign_f64 775; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 776; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_copysign(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 777; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @copysign(double [[IN:%.*]], double [[IN]]) 778; 779; ARMPL-NEON-LABEL: define void @copysign_f64 780; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 781; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vcopysignq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 782; 783; ARMPL-SVE-LABEL: define void @copysign_f64 784; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 785; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svcopysign_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 786; 787; ARMPL-SVE-NOPRED-LABEL: define void @copysign_f64 788; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 789; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svcopysign_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 790; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @copysign(double [[IN:%.*]], double [[IN]]) 791; 792 entry: 793 br label %for.body 794 795 for.body: 796 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 797 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 798 %in = load double, ptr %in.gep, align 8 799 %call = tail call double @copysign(double %in, double %in) 800 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 801 store double %call, ptr %out.gep, align 8 802 %iv.next = add nuw nsw i64 %iv, 1 803 %exitcond = icmp eq i64 %iv.next, 1000 804 br i1 %exitcond, label %for.end, label %for.body 805 806 for.end: 807 ret void 808} 809 810define void @copysign_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 811; SLEEF-NEON-LABEL: define void @copysign_f32 812; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 813; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4vv_copysignf(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 814; 815; SLEEF-SVE-LABEL: define void @copysign_f32 816; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 817; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_copysignf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 818; 819; SLEEF-SVE-NOPRED-LABEL: define void @copysign_f32 820; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 821; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_copysignf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 822; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @copysignf(float [[IN:%.*]], float [[IN]]) 823; 824; ARMPL-NEON-LABEL: define void @copysign_f32 825; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 826; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vcopysignq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 827; 828; ARMPL-SVE-LABEL: define void @copysign_f32 829; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 830; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svcopysign_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 831; 832; ARMPL-SVE-NOPRED-LABEL: define void @copysign_f32 833; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 834; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svcopysign_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 835; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @copysignf(float [[IN:%.*]], float [[IN]]) 836; 837 entry: 838 br label %for.body 839 840 for.body: 841 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 842 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 843 %in = load float, ptr %in.gep, align 8 844 %call = tail call float @copysignf(float %in, float %in) 845 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 846 store float %call, ptr %out.gep, align 4 847 %iv.next = add nuw nsw i64 %iv, 1 848 %exitcond = icmp eq i64 %iv.next, 1000 849 br i1 %exitcond, label %for.end, label %for.body 850 851 for.end: 852 ret void 853} 854 855declare double @cos(double) 856declare float @cosf(float) 857 858define void @cos_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 859; SLEEF-NEON-LABEL: define void @cos_f64 860; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 861; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_cos(<2 x double> [[WIDE_LOAD:%.*]]) 862; 863; SLEEF-SVE-LABEL: define void @cos_f64 864; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 865; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cos(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 866; 867; SLEEF-SVE-NOPRED-LABEL: define void @cos_f64 868; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 869; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cos(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 870; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @cos(double [[IN:%.*]]) 871; 872; ARMPL-NEON-LABEL: define void @cos_f64 873; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 874; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vcosq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 875; 876; ARMPL-SVE-LABEL: define void @cos_f64 877; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 878; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svcos_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 879; 880; ARMPL-SVE-NOPRED-LABEL: define void @cos_f64 881; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 882; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svcos_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 883; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @cos(double [[IN:%.*]]) 884; 885 entry: 886 br label %for.body 887 888 for.body: 889 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 890 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 891 %in = load double, ptr %in.gep, align 8 892 %call = tail call double @cos(double %in) 893 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 894 store double %call, ptr %out.gep, align 8 895 %iv.next = add nuw nsw i64 %iv, 1 896 %exitcond = icmp eq i64 %iv.next, 1000 897 br i1 %exitcond, label %for.end, label %for.body 898 899 for.end: 900 ret void 901} 902 903define void @cos_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 904; SLEEF-NEON-LABEL: define void @cos_f32 905; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 906; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_cosf(<4 x float> [[WIDE_LOAD:%.*]]) 907; 908; SLEEF-SVE-LABEL: define void @cos_f32 909; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 910; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_cosf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 911; 912; SLEEF-SVE-NOPRED-LABEL: define void @cos_f32 913; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 914; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_cosf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 915; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @cosf(float [[IN:%.*]]) 916; 917; ARMPL-NEON-LABEL: define void @cos_f32 918; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 919; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vcosq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 920; 921; ARMPL-SVE-LABEL: define void @cos_f32 922; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 923; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svcos_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 924; 925; ARMPL-SVE-NOPRED-LABEL: define void @cos_f32 926; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 927; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svcos_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 928; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @cosf(float [[IN:%.*]]) 929; 930 entry: 931 br label %for.body 932 933 for.body: 934 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 935 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 936 %in = load float, ptr %in.gep, align 8 937 %call = tail call float @cosf(float %in) 938 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 939 store float %call, ptr %out.gep, align 4 940 %iv.next = add nuw nsw i64 %iv, 1 941 %exitcond = icmp eq i64 %iv.next, 1000 942 br i1 %exitcond, label %for.end, label %for.body 943 944 for.end: 945 ret void 946} 947 948declare double @cosh(double) 949declare float @coshf(float) 950 951define void @cosh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 952; SLEEF-NEON-LABEL: define void @cosh_f64 953; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 954; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_cosh(<2 x double> [[WIDE_LOAD:%.*]]) 955; 956; SLEEF-SVE-LABEL: define void @cosh_f64 957; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 958; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cosh(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 959; 960; SLEEF-SVE-NOPRED-LABEL: define void @cosh_f64 961; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 962; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cosh(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 963; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @cosh(double [[IN:%.*]]) 964; 965; ARMPL-NEON-LABEL: define void @cosh_f64 966; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 967; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vcoshq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 968; 969; ARMPL-SVE-LABEL: define void @cosh_f64 970; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 971; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svcosh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 972; 973; ARMPL-SVE-NOPRED-LABEL: define void @cosh_f64 974; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 975; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svcosh_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 976; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @cosh(double [[IN:%.*]]) 977; 978 entry: 979 br label %for.body 980 981 for.body: 982 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 983 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 984 %in = load double, ptr %in.gep, align 8 985 %call = tail call double @cosh(double %in) 986 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 987 store double %call, ptr %out.gep, align 8 988 %iv.next = add nuw nsw i64 %iv, 1 989 %exitcond = icmp eq i64 %iv.next, 1000 990 br i1 %exitcond, label %for.end, label %for.body 991 992 for.end: 993 ret void 994} 995 996define void @cosh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 997; SLEEF-NEON-LABEL: define void @cosh_f32 998; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 999; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_coshf(<4 x float> [[WIDE_LOAD:%.*]]) 1000; 1001; SLEEF-SVE-LABEL: define void @cosh_f32 1002; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1003; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_coshf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1004; 1005; SLEEF-SVE-NOPRED-LABEL: define void @cosh_f32 1006; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1007; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_coshf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1008; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @coshf(float [[IN:%.*]]) 1009; 1010; ARMPL-NEON-LABEL: define void @cosh_f32 1011; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1012; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vcoshq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 1013; 1014; ARMPL-SVE-LABEL: define void @cosh_f32 1015; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1016; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svcosh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1017; 1018; ARMPL-SVE-NOPRED-LABEL: define void @cosh_f32 1019; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1020; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svcosh_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1021; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @coshf(float [[IN:%.*]]) 1022; 1023 entry: 1024 br label %for.body 1025 1026 for.body: 1027 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1028 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 1029 %in = load float, ptr %in.gep, align 8 1030 %call = tail call float @coshf(float %in) 1031 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 1032 store float %call, ptr %out.gep, align 4 1033 %iv.next = add nuw nsw i64 %iv, 1 1034 %exitcond = icmp eq i64 %iv.next, 1000 1035 br i1 %exitcond, label %for.end, label %for.body 1036 1037 for.end: 1038 ret void 1039} 1040 1041declare double @cospi(double) 1042declare float @cospif(float) 1043 1044define void @cospi_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1045; SLEEF-NEON-LABEL: define void @cospi_f64 1046; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1047; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_cospi(<2 x double> [[WIDE_LOAD:%.*]]) 1048; 1049; SLEEF-SVE-LABEL: define void @cospi_f64 1050; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1051; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cospi(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1052; 1053; SLEEF-SVE-NOPRED-LABEL: define void @cospi_f64 1054; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1055; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_cospi(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1056; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @cospi(double [[IN:%.*]]) 1057; 1058; ARMPL-NEON-LABEL: define void @cospi_f64 1059; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1060; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vcospiq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 1061; 1062; ARMPL-SVE-LABEL: define void @cospi_f64 1063; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1064; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svcospi_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1065; 1066; ARMPL-SVE-NOPRED-LABEL: define void @cospi_f64 1067; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1068; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svcospi_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1069; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @cospi(double [[IN:%.*]]) 1070; 1071 entry: 1072 br label %for.body 1073 1074 for.body: 1075 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1076 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 1077 %in = load double, ptr %in.gep, align 8 1078 %call = tail call double @cospi(double %in) 1079 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 1080 store double %call, ptr %out.gep, align 8 1081 %iv.next = add nuw nsw i64 %iv, 1 1082 %exitcond = icmp eq i64 %iv.next, 1000 1083 br i1 %exitcond, label %for.end, label %for.body 1084 1085 for.end: 1086 ret void 1087} 1088 1089define void @cospi_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1090; SLEEF-NEON-LABEL: define void @cospi_f32 1091; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1092; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_cospif(<4 x float> [[WIDE_LOAD:%.*]]) 1093; 1094; SLEEF-SVE-LABEL: define void @cospi_f32 1095; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1096; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_cospif(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1097; 1098; SLEEF-SVE-NOPRED-LABEL: define void @cospi_f32 1099; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1100; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_cospif(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1101; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @cospif(float [[IN:%.*]]) 1102; 1103; ARMPL-NEON-LABEL: define void @cospi_f32 1104; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1105; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vcospiq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 1106; 1107; ARMPL-SVE-LABEL: define void @cospi_f32 1108; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1109; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svcospi_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1110; 1111; ARMPL-SVE-NOPRED-LABEL: define void @cospi_f32 1112; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1113; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svcospi_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1114; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @cospif(float [[IN:%.*]]) 1115; 1116 entry: 1117 br label %for.body 1118 1119 for.body: 1120 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1121 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 1122 %in = load float, ptr %in.gep, align 8 1123 %call = tail call float @cospif(float %in) 1124 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 1125 store float %call, ptr %out.gep, align 4 1126 %iv.next = add nuw nsw i64 %iv, 1 1127 %exitcond = icmp eq i64 %iv.next, 1000 1128 br i1 %exitcond, label %for.end, label %for.body 1129 1130 for.end: 1131 ret void 1132} 1133 1134declare double @erf(double) 1135declare float @erff(float) 1136 1137define void @erf_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1138; SLEEF-NEON-LABEL: define void @erf_f64 1139; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1140; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_erf(<2 x double> [[WIDE_LOAD:%.*]]) 1141; 1142; SLEEF-SVE-LABEL: define void @erf_f64 1143; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1144; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_erf(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1145; 1146; SLEEF-SVE-NOPRED-LABEL: define void @erf_f64 1147; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1148; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_erf(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1149; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @erf(double [[IN:%.*]]) 1150; 1151; ARMPL-NEON-LABEL: define void @erf_f64 1152; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1153; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_verfq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 1154; 1155; ARMPL-SVE-LABEL: define void @erf_f64 1156; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1157; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_sverf_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1158; 1159; ARMPL-SVE-NOPRED-LABEL: define void @erf_f64 1160; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1161; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_sverf_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1162; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @erf(double [[IN:%.*]]) 1163; 1164 entry: 1165 br label %for.body 1166 1167 for.body: 1168 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1169 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 1170 %in = load double, ptr %in.gep, align 8 1171 %call = tail call double @erf(double %in) 1172 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 1173 store double %call, ptr %out.gep, align 8 1174 %iv.next = add nuw nsw i64 %iv, 1 1175 %exitcond = icmp eq i64 %iv.next, 1000 1176 br i1 %exitcond, label %for.end, label %for.body 1177 1178 for.end: 1179 ret void 1180} 1181 1182define void @erf_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1183; SLEEF-NEON-LABEL: define void @erf_f32 1184; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1185; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_erff(<4 x float> [[WIDE_LOAD:%.*]]) 1186; 1187; SLEEF-SVE-LABEL: define void @erf_f32 1188; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1189; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_erff(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1190; 1191; SLEEF-SVE-NOPRED-LABEL: define void @erf_f32 1192; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1193; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_erff(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1194; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @erff(float [[IN:%.*]]) 1195; 1196; ARMPL-NEON-LABEL: define void @erf_f32 1197; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1198; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_verfq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 1199; 1200; ARMPL-SVE-LABEL: define void @erf_f32 1201; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1202; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_sverf_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1203; 1204; ARMPL-SVE-NOPRED-LABEL: define void @erf_f32 1205; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1206; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_sverf_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1207; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @erff(float [[IN:%.*]]) 1208; 1209 entry: 1210 br label %for.body 1211 1212 for.body: 1213 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1214 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 1215 %in = load float, ptr %in.gep, align 8 1216 %call = tail call float @erff(float %in) 1217 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 1218 store float %call, ptr %out.gep, align 4 1219 %iv.next = add nuw nsw i64 %iv, 1 1220 %exitcond = icmp eq i64 %iv.next, 1000 1221 br i1 %exitcond, label %for.end, label %for.body 1222 1223 for.end: 1224 ret void 1225} 1226 1227declare double @erfc(double) 1228declare float @erfcf(float) 1229 1230define void @erfc_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1231; SLEEF-NEON-LABEL: define void @erfc_f64 1232; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1233; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_erfc(<2 x double> [[WIDE_LOAD:%.*]]) 1234; 1235; SLEEF-SVE-LABEL: define void @erfc_f64 1236; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1237; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_erfc(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1238; 1239; SLEEF-SVE-NOPRED-LABEL: define void @erfc_f64 1240; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1241; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_erfc(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1242; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @erfc(double [[IN:%.*]]) 1243; 1244; ARMPL-NEON-LABEL: define void @erfc_f64 1245; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1246; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_verfcq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 1247; 1248; ARMPL-SVE-LABEL: define void @erfc_f64 1249; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1250; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_sverfc_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1251; 1252; ARMPL-SVE-NOPRED-LABEL: define void @erfc_f64 1253; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1254; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_sverfc_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1255; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @erfc(double [[IN:%.*]]) 1256; 1257 entry: 1258 br label %for.body 1259 1260 for.body: 1261 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1262 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 1263 %in = load double, ptr %in.gep, align 8 1264 %call = tail call double @erfc(double %in) 1265 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 1266 store double %call, ptr %out.gep, align 8 1267 %iv.next = add nuw nsw i64 %iv, 1 1268 %exitcond = icmp eq i64 %iv.next, 1000 1269 br i1 %exitcond, label %for.end, label %for.body 1270 1271 for.end: 1272 ret void 1273} 1274 1275define void @erfc_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1276; SLEEF-NEON-LABEL: define void @erfc_f32 1277; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1278; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_erfcf(<4 x float> [[WIDE_LOAD:%.*]]) 1279; 1280; SLEEF-SVE-LABEL: define void @erfc_f32 1281; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1282; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_erfcf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1283; 1284; SLEEF-SVE-NOPRED-LABEL: define void @erfc_f32 1285; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1286; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_erfcf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1287; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @erfcf(float [[IN:%.*]]) 1288; 1289; ARMPL-NEON-LABEL: define void @erfc_f32 1290; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1291; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_verfcq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 1292; 1293; ARMPL-SVE-LABEL: define void @erfc_f32 1294; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1295; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_sverfc_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1296; 1297; ARMPL-SVE-NOPRED-LABEL: define void @erfc_f32 1298; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1299; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_sverfc_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1300; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @erfcf(float [[IN:%.*]]) 1301; 1302 entry: 1303 br label %for.body 1304 1305 for.body: 1306 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1307 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 1308 %in = load float, ptr %in.gep, align 8 1309 %call = tail call float @erfcf(float %in) 1310 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 1311 store float %call, ptr %out.gep, align 4 1312 %iv.next = add nuw nsw i64 %iv, 1 1313 %exitcond = icmp eq i64 %iv.next, 1000 1314 br i1 %exitcond, label %for.end, label %for.body 1315 1316 for.end: 1317 ret void 1318} 1319 1320declare double @exp(double) 1321declare float @expf(float) 1322 1323define void @exp_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1324; SLEEF-NEON-LABEL: define void @exp_f64 1325; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1326; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_exp(<2 x double> [[WIDE_LOAD:%.*]]) 1327; 1328; SLEEF-SVE-LABEL: define void @exp_f64 1329; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1330; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1331; 1332; SLEEF-SVE-NOPRED-LABEL: define void @exp_f64 1333; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1334; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1335; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp(double [[IN:%.*]]) 1336; 1337; ARMPL-NEON-LABEL: define void @exp_f64 1338; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1339; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vexpq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 1340; 1341; ARMPL-SVE-LABEL: define void @exp_f64 1342; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1343; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svexp_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1344; 1345; ARMPL-SVE-NOPRED-LABEL: define void @exp_f64 1346; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1347; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svexp_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1348; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp(double [[IN:%.*]]) 1349; 1350 entry: 1351 br label %for.body 1352 1353 for.body: 1354 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1355 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 1356 %in = load double, ptr %in.gep, align 8 1357 %call = tail call double @exp(double %in) 1358 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 1359 store double %call, ptr %out.gep, align 8 1360 %iv.next = add nuw nsw i64 %iv, 1 1361 %exitcond = icmp eq i64 %iv.next, 1000 1362 br i1 %exitcond, label %for.end, label %for.body 1363 1364 for.end: 1365 ret void 1366} 1367 1368define void @exp_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1369; SLEEF-NEON-LABEL: define void @exp_f32 1370; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1371; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_expf(<4 x float> [[WIDE_LOAD:%.*]]) 1372; 1373; SLEEF-SVE-LABEL: define void @exp_f32 1374; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1375; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_expf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1376; 1377; SLEEF-SVE-NOPRED-LABEL: define void @exp_f32 1378; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1379; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_expf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1380; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @expf(float [[IN:%.*]]) 1381; 1382; ARMPL-NEON-LABEL: define void @exp_f32 1383; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1384; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vexpq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 1385; 1386; ARMPL-SVE-LABEL: define void @exp_f32 1387; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1388; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svexp_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1389; 1390; ARMPL-SVE-NOPRED-LABEL: define void @exp_f32 1391; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1392; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svexp_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1393; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @expf(float [[IN:%.*]]) 1394; 1395 entry: 1396 br label %for.body 1397 1398 for.body: 1399 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1400 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 1401 %in = load float, ptr %in.gep, align 8 1402 %call = tail call float @expf(float %in) 1403 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 1404 store float %call, ptr %out.gep, align 4 1405 %iv.next = add nuw nsw i64 %iv, 1 1406 %exitcond = icmp eq i64 %iv.next, 1000 1407 br i1 %exitcond, label %for.end, label %for.body 1408 1409 for.end: 1410 ret void 1411} 1412 1413declare double @exp10(double) 1414declare float @exp10f(float) 1415 1416define void @exp10_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1417; SLEEF-NEON-LABEL: define void @exp10_f64 1418; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1419; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_exp10(<2 x double> [[WIDE_LOAD:%.*]]) 1420; 1421; SLEEF-SVE-LABEL: define void @exp10_f64 1422; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1423; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp10(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1424; 1425; SLEEF-SVE-NOPRED-LABEL: define void @exp10_f64 1426; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1427; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp10(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1428; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp10(double [[IN:%.*]]) 1429; 1430; ARMPL-NEON-LABEL: define void @exp10_f64 1431; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1432; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vexp10q_f64(<2 x double> [[WIDE_LOAD:%.*]]) 1433; 1434; ARMPL-SVE-LABEL: define void @exp10_f64 1435; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1436; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svexp10_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1437; 1438; ARMPL-SVE-NOPRED-LABEL: define void @exp10_f64 1439; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1440; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svexp10_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1441; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp10(double [[IN:%.*]]) 1442; 1443 entry: 1444 br label %for.body 1445 1446 for.body: 1447 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1448 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 1449 %in = load double, ptr %in.gep, align 8 1450 %call = tail call double @exp10(double %in) 1451 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 1452 store double %call, ptr %out.gep, align 8 1453 %iv.next = add nuw nsw i64 %iv, 1 1454 %exitcond = icmp eq i64 %iv.next, 1000 1455 br i1 %exitcond, label %for.end, label %for.body 1456 1457 for.end: 1458 ret void 1459} 1460 1461define void @exp10_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1462; SLEEF-NEON-LABEL: define void @exp10_f32 1463; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1464; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_exp10f(<4 x float> [[WIDE_LOAD:%.*]]) 1465; 1466; SLEEF-SVE-LABEL: define void @exp10_f32 1467; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1468; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_exp10f(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1469; 1470; SLEEF-SVE-NOPRED-LABEL: define void @exp10_f32 1471; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1472; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_exp10f(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1473; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @exp10f(float [[IN:%.*]]) 1474; 1475; ARMPL-NEON-LABEL: define void @exp10_f32 1476; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1477; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vexp10q_f32(<4 x float> [[WIDE_LOAD:%.*]]) 1478; 1479; ARMPL-SVE-LABEL: define void @exp10_f32 1480; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1481; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svexp10_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1482; 1483; ARMPL-SVE-NOPRED-LABEL: define void @exp10_f32 1484; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1485; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svexp10_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1486; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @exp10f(float [[IN:%.*]]) 1487; 1488 entry: 1489 br label %for.body 1490 1491 for.body: 1492 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1493 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 1494 %in = load float, ptr %in.gep, align 8 1495 %call = tail call float @exp10f(float %in) 1496 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 1497 store float %call, ptr %out.gep, align 4 1498 %iv.next = add nuw nsw i64 %iv, 1 1499 %exitcond = icmp eq i64 %iv.next, 1000 1500 br i1 %exitcond, label %for.end, label %for.body 1501 1502 for.end: 1503 ret void 1504} 1505 1506declare double @exp2(double) 1507declare float @exp2f(float) 1508 1509define void @exp2_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1510; SLEEF-NEON-LABEL: define void @exp2_f64 1511; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1512; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_exp2(<2 x double> [[WIDE_LOAD:%.*]]) 1513; 1514; SLEEF-SVE-LABEL: define void @exp2_f64 1515; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1516; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp2(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1517; 1518; SLEEF-SVE-NOPRED-LABEL: define void @exp2_f64 1519; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1520; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_exp2(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1521; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp2(double [[IN:%.*]]) 1522; 1523; ARMPL-NEON-LABEL: define void @exp2_f64 1524; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1525; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vexp2q_f64(<2 x double> [[WIDE_LOAD:%.*]]) 1526; 1527; ARMPL-SVE-LABEL: define void @exp2_f64 1528; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1529; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svexp2_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1530; 1531; ARMPL-SVE-NOPRED-LABEL: define void @exp2_f64 1532; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1533; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svexp2_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1534; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @exp2(double [[IN:%.*]]) 1535; 1536 entry: 1537 br label %for.body 1538 1539 for.body: 1540 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1541 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 1542 %in = load double, ptr %in.gep, align 8 1543 %call = tail call double @exp2(double %in) 1544 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 1545 store double %call, ptr %out.gep, align 8 1546 %iv.next = add nuw nsw i64 %iv, 1 1547 %exitcond = icmp eq i64 %iv.next, 1000 1548 br i1 %exitcond, label %for.end, label %for.body 1549 1550 for.end: 1551 ret void 1552} 1553 1554define void @exp2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1555; SLEEF-NEON-LABEL: define void @exp2_f32 1556; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1557; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_exp2f(<4 x float> [[WIDE_LOAD:%.*]]) 1558; 1559; SLEEF-SVE-LABEL: define void @exp2_f32 1560; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1561; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_exp2f(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1562; 1563; SLEEF-SVE-NOPRED-LABEL: define void @exp2_f32 1564; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1565; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_exp2f(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1566; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @exp2f(float [[IN:%.*]]) 1567; 1568; ARMPL-NEON-LABEL: define void @exp2_f32 1569; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1570; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vexp2q_f32(<4 x float> [[WIDE_LOAD:%.*]]) 1571; 1572; ARMPL-SVE-LABEL: define void @exp2_f32 1573; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1574; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svexp2_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1575; 1576; ARMPL-SVE-NOPRED-LABEL: define void @exp2_f32 1577; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1578; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svexp2_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1579; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @exp2f(float [[IN:%.*]]) 1580; 1581 entry: 1582 br label %for.body 1583 1584 for.body: 1585 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1586 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 1587 %in = load float, ptr %in.gep, align 8 1588 %call = tail call float @exp2f(float %in) 1589 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 1590 store float %call, ptr %out.gep, align 4 1591 %iv.next = add nuw nsw i64 %iv, 1 1592 %exitcond = icmp eq i64 %iv.next, 1000 1593 br i1 %exitcond, label %for.end, label %for.body 1594 1595 for.end: 1596 ret void 1597} 1598 1599declare double @expm1(double) 1600declare float @expm1f(float) 1601 1602define void @expm1_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1603; SLEEF-NEON-LABEL: define void @expm1_f64 1604; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1605; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_expm1(<2 x double> [[WIDE_LOAD:%.*]]) 1606; 1607; SLEEF-SVE-LABEL: define void @expm1_f64 1608; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1609; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_expm1(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1610; 1611; SLEEF-SVE-NOPRED-LABEL: define void @expm1_f64 1612; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1613; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_expm1(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1614; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @expm1(double [[IN:%.*]]) 1615; 1616; ARMPL-NEON-LABEL: define void @expm1_f64 1617; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1618; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vexpm1q_f64(<2 x double> [[WIDE_LOAD:%.*]]) 1619; 1620; ARMPL-SVE-LABEL: define void @expm1_f64 1621; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1622; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svexpm1_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1623; 1624; ARMPL-SVE-NOPRED-LABEL: define void @expm1_f64 1625; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1626; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svexpm1_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 1627; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @expm1(double [[IN:%.*]]) 1628; 1629 entry: 1630 br label %for.body 1631 1632 for.body: 1633 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1634 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 1635 %in = load double, ptr %in.gep, align 8 1636 %call = tail call double @expm1(double %in) 1637 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 1638 store double %call, ptr %out.gep, align 8 1639 %iv.next = add nuw nsw i64 %iv, 1 1640 %exitcond = icmp eq i64 %iv.next, 1000 1641 br i1 %exitcond, label %for.end, label %for.body 1642 1643 for.end: 1644 ret void 1645} 1646 1647define void @expm1_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1648; SLEEF-NEON-LABEL: define void @expm1_f32 1649; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1650; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_expm1f(<4 x float> [[WIDE_LOAD:%.*]]) 1651; 1652; SLEEF-SVE-LABEL: define void @expm1_f32 1653; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1654; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_expm1f(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1655; 1656; SLEEF-SVE-NOPRED-LABEL: define void @expm1_f32 1657; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1658; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_expm1f(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1659; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @expm1f(float [[IN:%.*]]) 1660; 1661; ARMPL-NEON-LABEL: define void @expm1_f32 1662; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1663; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vexpm1q_f32(<4 x float> [[WIDE_LOAD:%.*]]) 1664; 1665; ARMPL-SVE-LABEL: define void @expm1_f32 1666; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1667; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svexpm1_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1668; 1669; ARMPL-SVE-NOPRED-LABEL: define void @expm1_f32 1670; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1671; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svexpm1_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 1672; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @expm1f(float [[IN:%.*]]) 1673; 1674 entry: 1675 br label %for.body 1676 1677 for.body: 1678 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1679 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 1680 %in = load float, ptr %in.gep, align 8 1681 %call = tail call float @expm1f(float %in) 1682 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 1683 store float %call, ptr %out.gep, align 4 1684 %iv.next = add nuw nsw i64 %iv, 1 1685 %exitcond = icmp eq i64 %iv.next, 1000 1686 br i1 %exitcond, label %for.end, label %for.body 1687 1688 for.end: 1689 ret void 1690} 1691 1692declare double @fdim(double, double) 1693declare float @fdimf(float, float) 1694 1695define void @fdim_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1696; SLEEF-NEON-LABEL: define void @fdim_f64 1697; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1698; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2vv_fdim(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 1699; 1700; SLEEF-SVE-LABEL: define void @fdim_f64 1701; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1702; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_fdim(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1703; 1704; SLEEF-SVE-NOPRED-LABEL: define void @fdim_f64 1705; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1706; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_fdim(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 1707; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fdim(double [[IN:%.*]], double [[IN]]) 1708; 1709; ARMPL-NEON-LABEL: define void @fdim_f64 1710; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1711; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vfdimq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 1712; 1713; ARMPL-SVE-LABEL: define void @fdim_f64 1714; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1715; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svfdim_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1716; 1717; ARMPL-SVE-NOPRED-LABEL: define void @fdim_f64 1718; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1719; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svfdim_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 1720; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fdim(double [[IN:%.*]], double [[IN]]) 1721; 1722 entry: 1723 br label %for.body 1724 1725 for.body: 1726 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1727 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 1728 %in = load double, ptr %in.gep, align 8 1729 %call = tail call double @fdim(double %in, double %in) 1730 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 1731 store double %call, ptr %out.gep, align 8 1732 %iv.next = add nuw nsw i64 %iv, 1 1733 %exitcond = icmp eq i64 %iv.next, 1000 1734 br i1 %exitcond, label %for.end, label %for.body 1735 1736 for.end: 1737 ret void 1738} 1739 1740define void @fdim_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1741; SLEEF-NEON-LABEL: define void @fdim_f32 1742; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1743; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4vv_fdimf(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 1744; 1745; SLEEF-SVE-LABEL: define void @fdim_f32 1746; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1747; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_fdimf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1748; 1749; SLEEF-SVE-NOPRED-LABEL: define void @fdim_f32 1750; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1751; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_fdimf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 1752; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fdimf(float [[IN:%.*]], float [[IN]]) 1753; 1754; ARMPL-NEON-LABEL: define void @fdim_f32 1755; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1756; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vfdimq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 1757; 1758; ARMPL-SVE-LABEL: define void @fdim_f32 1759; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1760; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svfdim_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1761; 1762; ARMPL-SVE-NOPRED-LABEL: define void @fdim_f32 1763; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1764; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svfdim_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 1765; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fdimf(float [[IN:%.*]], float [[IN]]) 1766; 1767 entry: 1768 br label %for.body 1769 1770 for.body: 1771 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1772 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 1773 %in = load float, ptr %in.gep, align 8 1774 %call = tail call float @fdimf(float %in, float %in) 1775 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 1776 store float %call, ptr %out.gep, align 4 1777 %iv.next = add nuw nsw i64 %iv, 1 1778 %exitcond = icmp eq i64 %iv.next, 1000 1779 br i1 %exitcond, label %for.end, label %for.body 1780 1781 for.end: 1782 ret void 1783} 1784 1785declare double @fma(double, double, double) 1786declare float @fmaf(float, float, float) 1787 1788define void @fma_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1789; SLEEF-NEON-LABEL: define void @fma_f64 1790; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1791; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2vvv_fma(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]], <2 x double> [[WIDE_LOAD]]) 1792; 1793; SLEEF-SVE-LABEL: define void @fma_f64 1794; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1795; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxvvv_fma(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1796; 1797; SLEEF-SVE-NOPRED-LABEL: define void @fma_f64 1798; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1799; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxvvv_fma(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 1800; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fma(double [[IN:%.*]], double [[IN]], double [[IN]]) 1801; 1802; ARMPL-NEON-LABEL: define void @fma_f64 1803; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1804; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vfmaq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]], <2 x double> [[WIDE_LOAD]]) 1805; 1806; ARMPL-SVE-LABEL: define void @fma_f64 1807; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1808; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svfma_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1809; 1810; ARMPL-SVE-NOPRED-LABEL: define void @fma_f64 1811; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1812; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svfma_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 1813; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fma(double [[IN:%.*]], double [[IN]], double [[IN]]) 1814; 1815 entry: 1816 br label %for.body 1817 1818 for.body: 1819 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1820 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 1821 %in = load double, ptr %in.gep, align 8 1822 %call = tail call double @fma(double %in, double %in, double %in) 1823 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 1824 store double %call, ptr %out.gep, align 8 1825 %iv.next = add nuw nsw i64 %iv, 1 1826 %exitcond = icmp eq i64 %iv.next, 1000 1827 br i1 %exitcond, label %for.end, label %for.body 1828 1829 for.end: 1830 ret void 1831} 1832 1833define void @fma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1834; SLEEF-NEON-LABEL: define void @fma_f32 1835; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1836; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4vvv_fmaf(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]], <4 x float> [[WIDE_LOAD]]) 1837; 1838; SLEEF-SVE-LABEL: define void @fma_f32 1839; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1840; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxvvv_fmaf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1841; 1842; SLEEF-SVE-NOPRED-LABEL: define void @fma_f32 1843; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1844; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxvvv_fmaf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 1845; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmaf(float [[IN:%.*]], float [[IN]], float [[IN]]) 1846; 1847; ARMPL-NEON-LABEL: define void @fma_f32 1848; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1849; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vfmaq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]], <4 x float> [[WIDE_LOAD]]) 1850; 1851; ARMPL-SVE-LABEL: define void @fma_f32 1852; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1853; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svfma_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1854; 1855; ARMPL-SVE-NOPRED-LABEL: define void @fma_f32 1856; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1857; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svfma_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 1858; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmaf(float [[IN:%.*]], float [[IN]], float [[IN]]) 1859; 1860 entry: 1861 br label %for.body 1862 1863 for.body: 1864 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1865 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 1866 %in = load float, ptr %in.gep, align 8 1867 %call = tail call float @fmaf(float %in, float %in, float %in) 1868 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 1869 store float %call, ptr %out.gep, align 4 1870 %iv.next = add nuw nsw i64 %iv, 1 1871 %exitcond = icmp eq i64 %iv.next, 1000 1872 br i1 %exitcond, label %for.end, label %for.body 1873 1874 for.end: 1875 ret void 1876} 1877 1878declare double @fmax(double, double) 1879declare float @fmaxf(float, float) 1880 1881define void @fmax_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1882; SLEEF-NEON-LABEL: define void @fmax_f64 1883; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1884; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2vv_fmax(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 1885; 1886; SLEEF-SVE-LABEL: define void @fmax_f64 1887; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1888; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_fmax(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1889; 1890; SLEEF-SVE-NOPRED-LABEL: define void @fmax_f64 1891; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1892; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_fmax(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 1893; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmax(double [[IN:%.*]], double [[IN]]) 1894; 1895; ARMPL-NEON-LABEL: define void @fmax_f64 1896; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1897; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vfmaxq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 1898; 1899; ARMPL-SVE-LABEL: define void @fmax_f64 1900; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1901; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svfmax_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1902; 1903; ARMPL-SVE-NOPRED-LABEL: define void @fmax_f64 1904; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1905; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svfmax_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 1906; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmax(double [[IN:%.*]], double [[IN]]) 1907; 1908 entry: 1909 br label %for.body 1910 1911 for.body: 1912 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1913 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 1914 %in = load double, ptr %in.gep, align 8 1915 %call = tail call double @fmax(double %in, double %in) 1916 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 1917 store double %call, ptr %out.gep, align 8 1918 %iv.next = add nuw nsw i64 %iv, 1 1919 %exitcond = icmp eq i64 %iv.next, 1000 1920 br i1 %exitcond, label %for.end, label %for.body 1921 1922 for.end: 1923 ret void 1924} 1925 1926define void @fmax_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1927; SLEEF-NEON-LABEL: define void @fmax_f32 1928; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1929; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4vv_fmaxf(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 1930; 1931; SLEEF-SVE-LABEL: define void @fmax_f32 1932; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1933; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_fmaxf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1934; 1935; SLEEF-SVE-NOPRED-LABEL: define void @fmax_f32 1936; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1937; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_fmaxf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 1938; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmaxf(float [[IN:%.*]], float [[IN]]) 1939; 1940; ARMPL-NEON-LABEL: define void @fmax_f32 1941; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1942; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vfmaxq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 1943; 1944; ARMPL-SVE-LABEL: define void @fmax_f32 1945; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1946; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svfmax_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1947; 1948; ARMPL-SVE-NOPRED-LABEL: define void @fmax_f32 1949; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1950; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svfmax_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 1951; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmaxf(float [[IN:%.*]], float [[IN]]) 1952; 1953 entry: 1954 br label %for.body 1955 1956 for.body: 1957 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 1958 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 1959 %in = load float, ptr %in.gep, align 8 1960 %call = tail call float @fmaxf(float %in, float %in) 1961 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 1962 store float %call, ptr %out.gep, align 4 1963 %iv.next = add nuw nsw i64 %iv, 1 1964 %exitcond = icmp eq i64 %iv.next, 1000 1965 br i1 %exitcond, label %for.end, label %for.body 1966 1967 for.end: 1968 ret void 1969} 1970 1971declare double @fmin(double, double) 1972declare float @fminf(float, float) 1973 1974define void @fmin_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 1975; SLEEF-NEON-LABEL: define void @fmin_f64 1976; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1977; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2vv_fmin(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 1978; 1979; SLEEF-SVE-LABEL: define void @fmin_f64 1980; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1981; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_fmin(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1982; 1983; SLEEF-SVE-NOPRED-LABEL: define void @fmin_f64 1984; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1985; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_fmin(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 1986; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmin(double [[IN:%.*]], double [[IN]]) 1987; 1988; ARMPL-NEON-LABEL: define void @fmin_f64 1989; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1990; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vfminq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 1991; 1992; ARMPL-SVE-LABEL: define void @fmin_f64 1993; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1994; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svfmin_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 1995; 1996; ARMPL-SVE-NOPRED-LABEL: define void @fmin_f64 1997; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 1998; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svfmin_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 1999; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmin(double [[IN:%.*]], double [[IN]]) 2000; 2001 entry: 2002 br label %for.body 2003 2004 for.body: 2005 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2006 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 2007 %in = load double, ptr %in.gep, align 8 2008 %call = tail call double @fmin(double %in, double %in) 2009 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 2010 store double %call, ptr %out.gep, align 8 2011 %iv.next = add nuw nsw i64 %iv, 1 2012 %exitcond = icmp eq i64 %iv.next, 1000 2013 br i1 %exitcond, label %for.end, label %for.body 2014 2015 for.end: 2016 ret void 2017} 2018 2019define void @fmin_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2020; SLEEF-NEON-LABEL: define void @fmin_f32 2021; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2022; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4vv_fminf(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 2023; 2024; SLEEF-SVE-LABEL: define void @fmin_f32 2025; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2026; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_fminf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2027; 2028; SLEEF-SVE-NOPRED-LABEL: define void @fmin_f32 2029; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2030; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_fminf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 2031; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fminf(float [[IN:%.*]], float [[IN]]) 2032; 2033; ARMPL-NEON-LABEL: define void @fmin_f32 2034; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2035; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vfminq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 2036; 2037; ARMPL-SVE-LABEL: define void @fmin_f32 2038; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2039; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svfmin_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2040; 2041; ARMPL-SVE-NOPRED-LABEL: define void @fmin_f32 2042; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2043; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svfmin_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 2044; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fminf(float [[IN:%.*]], float [[IN]]) 2045; 2046 entry: 2047 br label %for.body 2048 2049 for.body: 2050 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2051 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 2052 %in = load float, ptr %in.gep, align 8 2053 %call = tail call float @fminf(float %in, float %in) 2054 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 2055 store float %call, ptr %out.gep, align 4 2056 %iv.next = add nuw nsw i64 %iv, 1 2057 %exitcond = icmp eq i64 %iv.next, 1000 2058 br i1 %exitcond, label %for.end, label %for.body 2059 2060 for.end: 2061 ret void 2062} 2063 2064declare double @fmod(double, double) 2065declare float @fmodf(float, float) 2066 2067define void @fmod_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2068; SLEEF-NEON-LABEL: define void @fmod_f64 2069; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2070; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2vv_fmod(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 2071; 2072; SLEEF-SVE-LABEL: define void @fmod_f64 2073; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2074; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_fmod(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2075; 2076; SLEEF-SVE-NOPRED-LABEL: define void @fmod_f64 2077; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2078; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_fmod(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 2079; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmod(double [[IN:%.*]], double [[IN]]) 2080; 2081; ARMPL-NEON-LABEL: define void @fmod_f64 2082; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2083; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vfmodq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 2084; 2085; ARMPL-SVE-LABEL: define void @fmod_f64 2086; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2087; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svfmod_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2088; 2089; ARMPL-SVE-NOPRED-LABEL: define void @fmod_f64 2090; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2091; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svfmod_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 2092; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @fmod(double [[IN:%.*]], double [[IN]]) 2093; 2094 entry: 2095 br label %for.body 2096 2097 for.body: 2098 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2099 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 2100 %in = load double, ptr %in.gep, align 8 2101 %call = tail call double @fmod(double %in, double %in) 2102 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 2103 store double %call, ptr %out.gep, align 8 2104 %iv.next = add nuw nsw i64 %iv, 1 2105 %exitcond = icmp eq i64 %iv.next, 1000 2106 br i1 %exitcond, label %for.end, label %for.body 2107 2108 for.end: 2109 ret void 2110} 2111 2112define void @fmod_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2113; SLEEF-NEON-LABEL: define void @fmod_f32 2114; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2115; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4vv_fmodf(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 2116; 2117; SLEEF-SVE-LABEL: define void @fmod_f32 2118; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2119; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_fmodf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2120; 2121; SLEEF-SVE-NOPRED-LABEL: define void @fmod_f32 2122; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2123; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_fmodf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 2124; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmodf(float [[IN:%.*]], float [[IN]]) 2125; 2126; ARMPL-NEON-LABEL: define void @fmod_f32 2127; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2128; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vfmodq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 2129; 2130; ARMPL-SVE-LABEL: define void @fmod_f32 2131; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2132; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svfmod_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2133; 2134; ARMPL-SVE-NOPRED-LABEL: define void @fmod_f32 2135; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2136; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svfmod_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 2137; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @fmodf(float [[IN:%.*]], float [[IN]]) 2138; 2139 entry: 2140 br label %for.body 2141 2142 for.body: 2143 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2144 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 2145 %in = load float, ptr %in.gep, align 8 2146 %call = tail call float @fmodf(float %in, float %in) 2147 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 2148 store float %call, ptr %out.gep, align 4 2149 %iv.next = add nuw nsw i64 %iv, 1 2150 %exitcond = icmp eq i64 %iv.next, 1000 2151 br i1 %exitcond, label %for.end, label %for.body 2152 2153 for.end: 2154 ret void 2155} 2156 2157declare double @hypot(double, double) 2158declare float @hypotf(float, float) 2159 2160define void @hypot_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2161; SLEEF-NEON-LABEL: define void @hypot_f64 2162; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2163; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2vv_hypot(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 2164; 2165; SLEEF-SVE-LABEL: define void @hypot_f64 2166; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2167; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_hypot(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2168; 2169; SLEEF-SVE-NOPRED-LABEL: define void @hypot_f64 2170; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2171; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_hypot(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 2172; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @hypot(double [[IN:%.*]], double [[IN]]) 2173; 2174; ARMPL-NEON-LABEL: define void @hypot_f64 2175; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2176; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vhypotq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 2177; 2178; ARMPL-SVE-LABEL: define void @hypot_f64 2179; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2180; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svhypot_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2181; 2182; ARMPL-SVE-NOPRED-LABEL: define void @hypot_f64 2183; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2184; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svhypot_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 2185; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @hypot(double [[IN:%.*]], double [[IN]]) 2186; 2187 entry: 2188 br label %for.body 2189 2190 for.body: 2191 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2192 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 2193 %in = load double, ptr %in.gep, align 8 2194 %call = tail call double @hypot(double %in, double %in) 2195 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 2196 store double %call, ptr %out.gep, align 8 2197 %iv.next = add nuw nsw i64 %iv, 1 2198 %exitcond = icmp eq i64 %iv.next, 1000 2199 br i1 %exitcond, label %for.end, label %for.body 2200 2201 for.end: 2202 ret void 2203} 2204 2205define void @hypot_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2206; SLEEF-NEON-LABEL: define void @hypot_f32 2207; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2208; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4vv_hypotf(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 2209; 2210; SLEEF-SVE-LABEL: define void @hypot_f32 2211; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2212; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_hypotf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2213; 2214; SLEEF-SVE-NOPRED-LABEL: define void @hypot_f32 2215; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2216; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_hypotf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 2217; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @hypotf(float [[IN:%.*]], float [[IN]]) 2218; 2219; ARMPL-NEON-LABEL: define void @hypot_f32 2220; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2221; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vhypotq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 2222; 2223; ARMPL-SVE-LABEL: define void @hypot_f32 2224; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2225; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svhypot_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2226; 2227; ARMPL-SVE-NOPRED-LABEL: define void @hypot_f32 2228; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2229; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svhypot_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 2230; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @hypotf(float [[IN:%.*]], float [[IN]]) 2231; 2232 entry: 2233 br label %for.body 2234 2235 for.body: 2236 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2237 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 2238 %in = load float, ptr %in.gep, align 8 2239 %call = tail call float @hypotf(float %in, float %in) 2240 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 2241 store float %call, ptr %out.gep, align 4 2242 %iv.next = add nuw nsw i64 %iv, 1 2243 %exitcond = icmp eq i64 %iv.next, 1000 2244 br i1 %exitcond, label %for.end, label %for.body 2245 2246 for.end: 2247 ret void 2248} 2249 2250declare i32 @ilogb(double) 2251declare i32 @ilogbf(float) 2252 2253define void @ilogb_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2254; SLEEF-NEON-LABEL: define void @ilogb_f64 2255; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2256; SLEEF-NEON: [[TMP3:%.*]] = call <2 x i32> @_ZGVnN2v_ilogb(<2 x double> [[WIDE_LOAD:%.*]]) 2257; 2258; SLEEF-SVE-LABEL: define void @ilogb_f64 2259; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2260; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x i32> @_ZGVsMxv_ilogb(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2261; 2262; SLEEF-SVE-NOPRED-LABEL: define void @ilogb_f64 2263; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2264; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x i32> @_ZGVsMxv_ilogb(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 2265; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call i32 @ilogb(double [[IN:%.*]]) 2266; 2267; ARMPL-NEON-LABEL: define void @ilogb_f64 2268; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2269; ARMPL-NEON: [[TMP3:%.*]] = call <2 x i32> @armpl_vilogbq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 2270; 2271; ARMPL-SVE-LABEL: define void @ilogb_f64 2272; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2273; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x i32> @armpl_svilogb_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2274; 2275; ARMPL-SVE-NOPRED-LABEL: define void @ilogb_f64 2276; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2277; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x i32> @armpl_svilogb_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 2278; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call i32 @ilogb(double [[IN:%.*]]) 2279; 2280 entry: 2281 br label %for.body 2282 2283 for.body: 2284 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2285 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 2286 %in = load double, ptr %in.gep, align 8 2287 %call = tail call i32 @ilogb(double %in) 2288 %out.gep = getelementptr inbounds i32, ptr %out.ptr, i64 %iv 2289 store i32 %call, ptr %out.gep, align 8 2290 %iv.next = add nuw nsw i64 %iv, 1 2291 %exitcond = icmp eq i64 %iv.next, 1000 2292 br i1 %exitcond, label %for.end, label %for.body 2293 2294 for.end: 2295 ret void 2296} 2297 2298define void @ilogb_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2299; SLEEF-NEON-LABEL: define void @ilogb_f32 2300; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2301; SLEEF-NEON: [[TMP3:%.*]] = call <4 x i32> @_ZGVnN4v_ilogbf(<4 x float> [[WIDE_LOAD:%.*]]) 2302; 2303; SLEEF-SVE-LABEL: define void @ilogb_f32 2304; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2305; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x i32> @_ZGVsMxv_ilogbf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2306; 2307; SLEEF-SVE-NOPRED-LABEL: define void @ilogb_f32 2308; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2309; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x i32> @_ZGVsMxv_ilogbf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 2310; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call i32 @ilogbf(float [[IN:%.*]]) 2311; 2312; ARMPL-NEON-LABEL: define void @ilogb_f32 2313; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2314; ARMPL-NEON: [[TMP3:%.*]] = call <4 x i32> @armpl_vilogbq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 2315; 2316; ARMPL-SVE-LABEL: define void @ilogb_f32 2317; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2318; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x i32> @armpl_svilogb_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2319; 2320; ARMPL-SVE-NOPRED-LABEL: define void @ilogb_f32 2321; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2322; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x i32> @armpl_svilogb_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 2323; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call i32 @ilogbf(float [[IN:%.*]]) 2324; 2325 entry: 2326 br label %for.body 2327 2328 for.body: 2329 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2330 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 2331 %in = load float, ptr %in.gep, align 8 2332 %call = tail call i32 @ilogbf(float %in) 2333 %out.gep = getelementptr inbounds i32, ptr %out.ptr, i64 %iv 2334 store i32 %call, ptr %out.gep, align 4 2335 %iv.next = add nuw nsw i64 %iv, 1 2336 %exitcond = icmp eq i64 %iv.next, 1000 2337 br i1 %exitcond, label %for.end, label %for.body 2338 2339 for.end: 2340 ret void 2341} 2342 2343declare double @ldexp(double, i32) 2344declare float @ldexpf(float, i32) 2345 2346define void @ldexp_f64(ptr noalias %in1.ptr, ptr noalias %in2.ptr, ptr noalias %out.ptr) { 2347; SLEEF-NEON-LABEL: define void @ldexp_f64 2348; SLEEF-NEON-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2349; SLEEF-NEON: [[TMP5:%.*]] = call <2 x double> @_ZGVnN2vv_ldexp(<2 x double> [[WIDE_LOAD:%.*]], <2 x i32> [[WIDE_LOAD1:%.*]]) 2350; 2351; SLEEF-SVE-LABEL: define void @ldexp_f64 2352; SLEEF-SVE-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2353; SLEEF-SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_ldexp(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i32> [[WIDE_MASKED_LOAD1:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2354; 2355; SLEEF-SVE-NOPRED-LABEL: define void @ldexp_f64 2356; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2357; SLEEF-SVE-NOPRED: [[TMP11:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_ldexp(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i32> [[WIDE_LOAD1:%.*]], <vscale x 2 x i1> splat (i1 true)) 2358; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @ldexp(double [[IN1:%.*]], i32 [[IN2:%.*]]) 2359; 2360; ARMPL-NEON-LABEL: define void @ldexp_f64 2361; ARMPL-NEON-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2362; ARMPL-NEON: [[TMP5:%.*]] = call <2 x double> @armpl_vldexpq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x i32> [[WIDE_LOAD1:%.*]]) 2363; 2364; ARMPL-SVE-LABEL: define void @ldexp_f64 2365; ARMPL-SVE-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2366; ARMPL-SVE: [[TMP15:%.*]] = call <vscale x 2 x double> @armpl_svldexp_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i32> [[WIDE_MASKED_LOAD1:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2367; 2368; ARMPL-SVE-NOPRED-LABEL: define void @ldexp_f64 2369; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2370; ARMPL-SVE-NOPRED: [[TMP11:%.*]] = call <vscale x 2 x double> @armpl_svldexp_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i32> [[WIDE_LOAD1:%.*]], <vscale x 2 x i1> splat (i1 true)) 2371; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @ldexp(double [[IN1:%.*]], i32 [[IN2:%.*]]) 2372; 2373 entry: 2374 br label %for.body 2375 2376 for.body: 2377 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2378 %in1.gep = getelementptr inbounds double, ptr %in1.ptr, i64 %iv 2379 %in1 = load double, ptr %in1.gep, align 8 2380 %in2.gep = getelementptr inbounds i32, ptr %in2.ptr, i64 %iv 2381 %in2 = load i32, ptr %in2.gep, align 8 2382 %call = tail call double @ldexp(double %in1, i32 %in2) 2383 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 2384 store double %call, ptr %out.gep, align 8 2385 %iv.next = add nuw nsw i64 %iv, 1 2386 %exitcond = icmp eq i64 %iv.next, 1000 2387 br i1 %exitcond, label %for.end, label %for.body 2388 2389 for.end: 2390 ret void 2391} 2392 2393define void @ldexp_f32(ptr noalias %in1.ptr, ptr noalias %in2.ptr, ptr noalias %out.ptr) { 2394; SLEEF-NEON-LABEL: define void @ldexp_f32 2395; SLEEF-NEON-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2396; SLEEF-NEON: [[TMP5:%.*]] = call <4 x float> @_ZGVnN4vv_ldexpf(<4 x float> [[WIDE_LOAD:%.*]], <4 x i32> [[WIDE_LOAD1:%.*]]) 2397; 2398; SLEEF-SVE-LABEL: define void @ldexp_f32 2399; SLEEF-SVE-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2400; SLEEF-SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_ldexpf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i32> [[WIDE_MASKED_LOAD1:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2401; 2402; SLEEF-SVE-NOPRED-LABEL: define void @ldexp_f32 2403; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2404; SLEEF-SVE-NOPRED: [[TMP11:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_ldexpf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i32> [[WIDE_LOAD1:%.*]], <vscale x 4 x i1> splat (i1 true)) 2405; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @ldexpf(float [[IN1:%.*]], i32 [[IN2:%.*]]) 2406; 2407; ARMPL-NEON-LABEL: define void @ldexp_f32 2408; ARMPL-NEON-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2409; ARMPL-NEON: [[TMP5:%.*]] = call <4 x float> @armpl_vldexpq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x i32> [[WIDE_LOAD1:%.*]]) 2410; 2411; ARMPL-SVE-LABEL: define void @ldexp_f32 2412; ARMPL-SVE-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2413; ARMPL-SVE: [[TMP15:%.*]] = call <vscale x 4 x float> @armpl_svldexp_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i32> [[WIDE_MASKED_LOAD1:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2414; 2415; ARMPL-SVE-NOPRED-LABEL: define void @ldexp_f32 2416; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN1_PTR:%.*]], ptr noalias [[IN2_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2417; ARMPL-SVE-NOPRED: [[TMP11:%.*]] = call <vscale x 4 x float> @armpl_svldexp_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i32> [[WIDE_LOAD1:%.*]], <vscale x 4 x i1> splat (i1 true)) 2418; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @ldexpf(float [[IN1:%.*]], i32 [[IN2:%.*]]) 2419; 2420 entry: 2421 br label %for.body 2422 2423 for.body: 2424 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2425 %in1.gep = getelementptr inbounds float, ptr %in1.ptr, i64 %iv 2426 %in1 = load float, ptr %in1.gep, align 8 2427 %in2.gep = getelementptr inbounds i32, ptr %in2.ptr, i64 %iv 2428 %in2 = load i32, ptr %in2.gep, align 8 2429 %call = tail call float @ldexpf(float %in1, i32 %in2) 2430 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 2431 store float %call, ptr %out.gep, align 4 2432 %iv.next = add nuw nsw i64 %iv, 1 2433 %exitcond = icmp eq i64 %iv.next, 1000 2434 br i1 %exitcond, label %for.end, label %for.body 2435 2436 for.end: 2437 ret void 2438} 2439 2440declare double @lgamma(double) 2441declare float @lgammaf(float) 2442 2443define void @lgamma_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2444; SLEEF-NEON-LABEL: define void @lgamma_f64 2445; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2446; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_lgamma(<2 x double> [[WIDE_LOAD:%.*]]) 2447; 2448; SLEEF-SVE-LABEL: define void @lgamma_f64 2449; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2450; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_lgamma(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2451; 2452; SLEEF-SVE-NOPRED-LABEL: define void @lgamma_f64 2453; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2454; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_lgamma(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 2455; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @lgamma(double [[IN:%.*]]) 2456; 2457; ARMPL-NEON-LABEL: define void @lgamma_f64 2458; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2459; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vlgammaq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 2460; 2461; ARMPL-SVE-LABEL: define void @lgamma_f64 2462; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2463; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svlgamma_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2464; 2465; ARMPL-SVE-NOPRED-LABEL: define void @lgamma_f64 2466; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2467; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svlgamma_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 2468; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @lgamma(double [[IN:%.*]]) 2469; 2470 entry: 2471 br label %for.body 2472 2473 for.body: 2474 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2475 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 2476 %in = load double, ptr %in.gep, align 8 2477 %call = tail call double @lgamma(double %in) 2478 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 2479 store double %call, ptr %out.gep, align 8 2480 %iv.next = add nuw nsw i64 %iv, 1 2481 %exitcond = icmp eq i64 %iv.next, 1000 2482 br i1 %exitcond, label %for.end, label %for.body 2483 2484 for.end: 2485 ret void 2486} 2487 2488define void @lgamma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2489; SLEEF-NEON-LABEL: define void @lgamma_f32 2490; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2491; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_lgammaf(<4 x float> [[WIDE_LOAD:%.*]]) 2492; 2493; SLEEF-SVE-LABEL: define void @lgamma_f32 2494; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2495; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_lgammaf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2496; 2497; SLEEF-SVE-NOPRED-LABEL: define void @lgamma_f32 2498; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2499; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_lgammaf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 2500; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @lgammaf(float [[IN:%.*]]) 2501; 2502; ARMPL-NEON-LABEL: define void @lgamma_f32 2503; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2504; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vlgammaq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 2505; 2506; ARMPL-SVE-LABEL: define void @lgamma_f32 2507; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2508; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svlgamma_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2509; 2510; ARMPL-SVE-NOPRED-LABEL: define void @lgamma_f32 2511; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2512; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svlgamma_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 2513; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @lgammaf(float [[IN:%.*]]) 2514; 2515 entry: 2516 br label %for.body 2517 2518 for.body: 2519 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2520 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 2521 %in = load float, ptr %in.gep, align 8 2522 %call = tail call float @lgammaf(float %in) 2523 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 2524 store float %call, ptr %out.gep, align 4 2525 %iv.next = add nuw nsw i64 %iv, 1 2526 %exitcond = icmp eq i64 %iv.next, 1000 2527 br i1 %exitcond, label %for.end, label %for.body 2528 2529 for.end: 2530 ret void 2531} 2532 2533declare double @log(double) 2534declare float @logf(float) 2535 2536define void @log_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2537; SLEEF-NEON-LABEL: define void @log_f64 2538; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2539; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_log(<2 x double> [[WIDE_LOAD:%.*]]) 2540; 2541; SLEEF-SVE-LABEL: define void @log_f64 2542; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2543; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2544; 2545; SLEEF-SVE-NOPRED-LABEL: define void @log_f64 2546; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2547; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 2548; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @log(double [[IN:%.*]]) 2549; 2550; ARMPL-NEON-LABEL: define void @log_f64 2551; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2552; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vlogq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 2553; 2554; ARMPL-SVE-LABEL: define void @log_f64 2555; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2556; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svlog_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2557; 2558; ARMPL-SVE-NOPRED-LABEL: define void @log_f64 2559; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2560; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svlog_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 2561; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @log(double [[IN:%.*]]) 2562; 2563 entry: 2564 br label %for.body 2565 2566 for.body: 2567 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2568 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 2569 %in = load double, ptr %in.gep, align 8 2570 %call = tail call double @log(double %in) 2571 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 2572 store double %call, ptr %out.gep, align 8 2573 %iv.next = add nuw nsw i64 %iv, 1 2574 %exitcond = icmp eq i64 %iv.next, 1000 2575 br i1 %exitcond, label %for.end, label %for.body 2576 2577 for.end: 2578 ret void 2579} 2580 2581define void @log_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2582; SLEEF-NEON-LABEL: define void @log_f32 2583; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2584; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_logf(<4 x float> [[WIDE_LOAD:%.*]]) 2585; 2586; SLEEF-SVE-LABEL: define void @log_f32 2587; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2588; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_logf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2589; 2590; SLEEF-SVE-NOPRED-LABEL: define void @log_f32 2591; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2592; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_logf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 2593; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @logf(float [[IN:%.*]]) 2594; 2595; ARMPL-NEON-LABEL: define void @log_f32 2596; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2597; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vlogq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 2598; 2599; ARMPL-SVE-LABEL: define void @log_f32 2600; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2601; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svlog_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2602; 2603; ARMPL-SVE-NOPRED-LABEL: define void @log_f32 2604; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2605; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svlog_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 2606; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @logf(float [[IN:%.*]]) 2607; 2608 entry: 2609 br label %for.body 2610 2611 for.body: 2612 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2613 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 2614 %in = load float, ptr %in.gep, align 8 2615 %call = tail call float @logf(float %in) 2616 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 2617 store float %call, ptr %out.gep, align 4 2618 %iv.next = add nuw nsw i64 %iv, 1 2619 %exitcond = icmp eq i64 %iv.next, 1000 2620 br i1 %exitcond, label %for.end, label %for.body 2621 2622 for.end: 2623 ret void 2624} 2625 2626declare double @log10(double) 2627declare float @log10f(float) 2628 2629define void @log10_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2630; SLEEF-NEON-LABEL: define void @log10_f64 2631; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2632; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_log10(<2 x double> [[WIDE_LOAD:%.*]]) 2633; 2634; SLEEF-SVE-LABEL: define void @log10_f64 2635; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2636; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log10(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2637; 2638; SLEEF-SVE-NOPRED-LABEL: define void @log10_f64 2639; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2640; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log10(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 2641; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @log10(double [[IN:%.*]]) 2642; 2643; ARMPL-NEON-LABEL: define void @log10_f64 2644; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2645; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vlog10q_f64(<2 x double> [[WIDE_LOAD:%.*]]) 2646; 2647; ARMPL-SVE-LABEL: define void @log10_f64 2648; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2649; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svlog10_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2650; 2651; ARMPL-SVE-NOPRED-LABEL: define void @log10_f64 2652; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2653; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svlog10_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 2654; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @log10(double [[IN:%.*]]) 2655; 2656 entry: 2657 br label %for.body 2658 2659 for.body: 2660 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2661 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 2662 %in = load double, ptr %in.gep, align 8 2663 %call = tail call double @log10(double %in) 2664 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 2665 store double %call, ptr %out.gep, align 8 2666 %iv.next = add nuw nsw i64 %iv, 1 2667 %exitcond = icmp eq i64 %iv.next, 1000 2668 br i1 %exitcond, label %for.end, label %for.body 2669 2670 for.end: 2671 ret void 2672} 2673 2674define void @log10_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2675; SLEEF-NEON-LABEL: define void @log10_f32 2676; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2677; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_log10f(<4 x float> [[WIDE_LOAD:%.*]]) 2678; 2679; SLEEF-SVE-LABEL: define void @log10_f32 2680; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2681; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log10f(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2682; 2683; SLEEF-SVE-NOPRED-LABEL: define void @log10_f32 2684; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2685; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log10f(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 2686; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @log10f(float [[IN:%.*]]) 2687; 2688; ARMPL-NEON-LABEL: define void @log10_f32 2689; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2690; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vlog10q_f32(<4 x float> [[WIDE_LOAD:%.*]]) 2691; 2692; ARMPL-SVE-LABEL: define void @log10_f32 2693; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2694; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svlog10_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2695; 2696; ARMPL-SVE-NOPRED-LABEL: define void @log10_f32 2697; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2698; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svlog10_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 2699; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @log10f(float [[IN:%.*]]) 2700; 2701 entry: 2702 br label %for.body 2703 2704 for.body: 2705 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2706 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 2707 %in = load float, ptr %in.gep, align 8 2708 %call = tail call float @log10f(float %in) 2709 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 2710 store float %call, ptr %out.gep, align 4 2711 %iv.next = add nuw nsw i64 %iv, 1 2712 %exitcond = icmp eq i64 %iv.next, 1000 2713 br i1 %exitcond, label %for.end, label %for.body 2714 2715 for.end: 2716 ret void 2717} 2718 2719declare double @log1p(double) 2720declare float @log1pf(float) 2721 2722define void @log1p_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2723; SLEEF-NEON-LABEL: define void @log1p_f64 2724; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2725; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_log1p(<2 x double> [[WIDE_LOAD:%.*]]) 2726; 2727; SLEEF-SVE-LABEL: define void @log1p_f64 2728; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2729; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log1p(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2730; 2731; SLEEF-SVE-NOPRED-LABEL: define void @log1p_f64 2732; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2733; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log1p(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 2734; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @log1p(double [[IN:%.*]]) 2735; 2736; ARMPL-NEON-LABEL: define void @log1p_f64 2737; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2738; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vlog1pq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 2739; 2740; ARMPL-SVE-LABEL: define void @log1p_f64 2741; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2742; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svlog1p_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2743; 2744; ARMPL-SVE-NOPRED-LABEL: define void @log1p_f64 2745; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2746; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svlog1p_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 2747; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @log1p(double [[IN:%.*]]) 2748; 2749 entry: 2750 br label %for.body 2751 2752 for.body: 2753 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2754 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 2755 %in = load double, ptr %in.gep, align 8 2756 %call = tail call double @log1p(double %in) 2757 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 2758 store double %call, ptr %out.gep, align 8 2759 %iv.next = add nuw nsw i64 %iv, 1 2760 %exitcond = icmp eq i64 %iv.next, 1000 2761 br i1 %exitcond, label %for.end, label %for.body 2762 2763 for.end: 2764 ret void 2765} 2766 2767define void @log1p_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2768; SLEEF-NEON-LABEL: define void @log1p_f32 2769; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2770; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_log1pf(<4 x float> [[WIDE_LOAD:%.*]]) 2771; 2772; SLEEF-SVE-LABEL: define void @log1p_f32 2773; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2774; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log1pf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2775; 2776; SLEEF-SVE-NOPRED-LABEL: define void @log1p_f32 2777; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2778; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log1pf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 2779; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @log1pf(float [[IN:%.*]]) 2780; 2781; ARMPL-NEON-LABEL: define void @log1p_f32 2782; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2783; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vlog1pq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 2784; 2785; ARMPL-SVE-LABEL: define void @log1p_f32 2786; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2787; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svlog1p_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2788; 2789; ARMPL-SVE-NOPRED-LABEL: define void @log1p_f32 2790; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2791; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svlog1p_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 2792; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @log1pf(float [[IN:%.*]]) 2793; 2794 entry: 2795 br label %for.body 2796 2797 for.body: 2798 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2799 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 2800 %in = load float, ptr %in.gep, align 8 2801 %call = tail call float @log1pf(float %in) 2802 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 2803 store float %call, ptr %out.gep, align 4 2804 %iv.next = add nuw nsw i64 %iv, 1 2805 %exitcond = icmp eq i64 %iv.next, 1000 2806 br i1 %exitcond, label %for.end, label %for.body 2807 2808 for.end: 2809 ret void 2810} 2811 2812declare double @log2(double) 2813declare float @log2f(float) 2814 2815define void @log2_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2816; SLEEF-NEON-LABEL: define void @log2_f64 2817; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2818; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_log2(<2 x double> [[WIDE_LOAD:%.*]]) 2819; 2820; SLEEF-SVE-LABEL: define void @log2_f64 2821; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2822; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log2(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2823; 2824; SLEEF-SVE-NOPRED-LABEL: define void @log2_f64 2825; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2826; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_log2(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 2827; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @log2(double [[IN:%.*]]) 2828; 2829; ARMPL-NEON-LABEL: define void @log2_f64 2830; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2831; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vlog2q_f64(<2 x double> [[WIDE_LOAD:%.*]]) 2832; 2833; ARMPL-SVE-LABEL: define void @log2_f64 2834; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2835; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svlog2_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2836; 2837; ARMPL-SVE-NOPRED-LABEL: define void @log2_f64 2838; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2839; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svlog2_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 2840; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @log2(double [[IN:%.*]]) 2841; 2842 entry: 2843 br label %for.body 2844 2845 for.body: 2846 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2847 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 2848 %in = load double, ptr %in.gep, align 8 2849 %call = tail call double @log2(double %in) 2850 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 2851 store double %call, ptr %out.gep, align 8 2852 %iv.next = add nuw nsw i64 %iv, 1 2853 %exitcond = icmp eq i64 %iv.next, 1000 2854 br i1 %exitcond, label %for.end, label %for.body 2855 2856 for.end: 2857 ret void 2858} 2859 2860define void @log2_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 2861; SLEEF-NEON-LABEL: define void @log2_f32 2862; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2863; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_log2f(<4 x float> [[WIDE_LOAD:%.*]]) 2864; 2865; SLEEF-SVE-LABEL: define void @log2_f32 2866; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2867; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log2f(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2868; 2869; SLEEF-SVE-NOPRED-LABEL: define void @log2_f32 2870; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2871; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_log2f(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 2872; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @log2f(float [[IN:%.*]]) 2873; 2874; ARMPL-NEON-LABEL: define void @log2_f32 2875; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2876; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vlog2q_f32(<4 x float> [[WIDE_LOAD:%.*]]) 2877; 2878; ARMPL-SVE-LABEL: define void @log2_f32 2879; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2880; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svlog2_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 2881; 2882; ARMPL-SVE-NOPRED-LABEL: define void @log2_f32 2883; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 2884; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svlog2_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 2885; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @log2f(float [[IN:%.*]]) 2886; 2887 entry: 2888 br label %for.body 2889 2890 for.body: 2891 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 2892 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 2893 %in = load float, ptr %in.gep, align 8 2894 %call = tail call float @log2f(float %in) 2895 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 2896 store float %call, ptr %out.gep, align 4 2897 %iv.next = add nuw nsw i64 %iv, 1 2898 %exitcond = icmp eq i64 %iv.next, 1000 2899 br i1 %exitcond, label %for.end, label %for.body 2900 2901 for.end: 2902 ret void 2903} 2904 2905; FIXME: Re-enable modf[f] vectorization once aliasing issues due to output 2906; pointers have been resolved. 2907 2908declare double @modf(double, ptr) 2909declare float @modff(float, ptr) 2910 2911define void @modf_f64(ptr noalias %a, ptr noalias %b, ptr noalias %c) { 2912; SLEEF-NEON-LABEL: define void @modf_f64 2913; SLEEF-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 2914; SLEEF-NEON: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) 2915; 2916; SLEEF-SVE-LABEL: define void @modf_f64 2917; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 2918; SLEEF-SVE: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) 2919; 2920; SLEEF-SVE-NOPRED-LABEL: define void @modf_f64 2921; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 2922; SLEEF-SVE-NOPRED: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) 2923; 2924; ARMPL-NEON-LABEL: define void @modf_f64 2925; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 2926; ARMPL-NEON: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) 2927; 2928; ARMPL-SVE-LABEL: define void @modf_f64 2929; ARMPL-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 2930; ARMPL-SVE: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) 2931; 2932; ARMPL-SVE-NOPRED-LABEL: define void @modf_f64 2933; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 2934; ARMPL-SVE-NOPRED: [[DATA:%.*]] = call double @modf(double [[NUM:%.*]], ptr [[GEPB:%.*]]) 2935; 2936entry: 2937 br label %for.body 2938 2939for.body: 2940 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 2941 %gepa = getelementptr double, ptr %a, i64 %indvars.iv 2942 %num = load double, ptr %gepa, align 8 2943 %gepb = getelementptr double, ptr %b, i64 %indvars.iv 2944 %data = call double @modf(double %num, ptr %gepb) 2945 %gepc = getelementptr inbounds double, ptr %c, i64 %indvars.iv 2946 store double %data, ptr %gepc, align 8 2947 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 2948 %exitcond = icmp eq i64 %indvars.iv.next, 1000 2949 br i1 %exitcond, label %for.cond.cleanup, label %for.body 2950 2951for.cond.cleanup: 2952 ret void 2953} 2954 2955define void @modf_f32(ptr noalias %a, ptr noalias %b, ptr noalias %c) { 2956; SLEEF-NEON-LABEL: define void @modf_f32 2957; SLEEF-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 2958; SLEEF-NEON: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) 2959; 2960; SLEEF-SVE-LABEL: define void @modf_f32 2961; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 2962; SLEEF-SVE: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) 2963; 2964; SLEEF-SVE-NOPRED-LABEL: define void @modf_f32 2965; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 2966; SLEEF-SVE-NOPRED: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) 2967; 2968; ARMPL-NEON-LABEL: define void @modf_f32 2969; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 2970; ARMPL-NEON: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) 2971; 2972; ARMPL-SVE-LABEL: define void @modf_f32 2973; ARMPL-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 2974; ARMPL-SVE: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) 2975; 2976; ARMPL-SVE-NOPRED-LABEL: define void @modf_f32 2977; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 2978; ARMPL-SVE-NOPRED: [[DATA:%.*]] = call float @modff(float [[NUM:%.*]], ptr [[GEPB:%.*]]) 2979; 2980entry: 2981 br label %for.body 2982 2983for.body: 2984 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 2985 %gepa = getelementptr float, ptr %a, i64 %indvars.iv 2986 %num = load float, ptr %gepa, align 8 2987 %gepb = getelementptr float, ptr %b, i64 %indvars.iv 2988 %data = call float @modff(float %num, ptr %gepb) 2989 %gepc = getelementptr inbounds float, ptr %c, i64 %indvars.iv 2990 store float %data, ptr %gepc, align 8 2991 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 2992 %exitcond = icmp eq i64 %indvars.iv.next, 1000 2993 br i1 %exitcond, label %for.cond.cleanup, label %for.body 2994 2995for.cond.cleanup: 2996 ret void 2997} 2998 2999declare double @nextafter(double, double) 3000declare float @nextafterf(float, float) 3001 3002define void @nextafter_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3003; SLEEF-NEON-LABEL: define void @nextafter_f64 3004; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3005; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2vv_nextafter(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 3006; 3007; SLEEF-SVE-LABEL: define void @nextafter_f64 3008; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3009; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_nextafter(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3010; 3011; SLEEF-SVE-NOPRED-LABEL: define void @nextafter_f64 3012; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3013; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_nextafter(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 3014; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @nextafter(double [[IN:%.*]], double [[IN]]) 3015; 3016; ARMPL-NEON-LABEL: define void @nextafter_f64 3017; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3018; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vnextafterq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 3019; 3020; ARMPL-SVE-LABEL: define void @nextafter_f64 3021; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3022; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svnextafter_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3023; 3024; ARMPL-SVE-NOPRED-LABEL: define void @nextafter_f64 3025; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3026; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svnextafter_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 3027; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @nextafter(double [[IN:%.*]], double [[IN]]) 3028; 3029 entry: 3030 br label %for.body 3031 3032 for.body: 3033 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3034 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 3035 %in = load double, ptr %in.gep, align 8 3036 %call = tail call double @nextafter(double %in, double %in) 3037 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 3038 store double %call, ptr %out.gep, align 8 3039 %iv.next = add nuw nsw i64 %iv, 1 3040 %exitcond = icmp eq i64 %iv.next, 1000 3041 br i1 %exitcond, label %for.end, label %for.body 3042 3043 for.end: 3044 ret void 3045} 3046 3047define void @nextafter_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3048; SLEEF-NEON-LABEL: define void @nextafter_f32 3049; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3050; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4vv_nextafterf(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 3051; 3052; SLEEF-SVE-LABEL: define void @nextafter_f32 3053; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3054; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_nextafterf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3055; 3056; SLEEF-SVE-NOPRED-LABEL: define void @nextafter_f32 3057; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3058; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_nextafterf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 3059; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @nextafterf(float [[IN:%.*]], float [[IN]]) 3060; 3061; ARMPL-NEON-LABEL: define void @nextafter_f32 3062; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3063; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vnextafterq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 3064; 3065; ARMPL-SVE-LABEL: define void @nextafter_f32 3066; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3067; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svnextafter_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3068; 3069; ARMPL-SVE-NOPRED-LABEL: define void @nextafter_f32 3070; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3071; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svnextafter_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 3072; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @nextafterf(float [[IN:%.*]], float [[IN]]) 3073; 3074 entry: 3075 br label %for.body 3076 3077 for.body: 3078 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3079 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 3080 %in = load float, ptr %in.gep, align 8 3081 %call = tail call float @nextafterf(float %in, float %in) 3082 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 3083 store float %call, ptr %out.gep, align 4 3084 %iv.next = add nuw nsw i64 %iv, 1 3085 %exitcond = icmp eq i64 %iv.next, 1000 3086 br i1 %exitcond, label %for.end, label %for.body 3087 3088 for.end: 3089 ret void 3090} 3091 3092declare double @pow(double, double) 3093declare float @powf(float, float) 3094 3095define void @pow_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3096; SLEEF-NEON-LABEL: define void @pow_f64 3097; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3098; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2vv_pow(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 3099; 3100; SLEEF-SVE-LABEL: define void @pow_f64 3101; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3102; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_pow(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3103; 3104; SLEEF-SVE-NOPRED-LABEL: define void @pow_f64 3105; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3106; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxvv_pow(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 3107; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @pow(double [[IN:%.*]], double [[IN]]) 3108; 3109; ARMPL-NEON-LABEL: define void @pow_f64 3110; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3111; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vpowq_f64(<2 x double> [[WIDE_LOAD:%.*]], <2 x double> [[WIDE_LOAD]]) 3112; 3113; ARMPL-SVE-LABEL: define void @pow_f64 3114; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3115; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svpow_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x double> [[WIDE_MASKED_LOAD]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3116; 3117; ARMPL-SVE-NOPRED-LABEL: define void @pow_f64 3118; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3119; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svpow_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x double> [[WIDE_LOAD]], <vscale x 2 x i1> splat (i1 true)) 3120; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @pow(double [[IN:%.*]], double [[IN]]) 3121; 3122 entry: 3123 br label %for.body 3124 3125 for.body: 3126 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3127 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 3128 %in = load double, ptr %in.gep, align 8 3129 %call = tail call double @pow(double %in, double %in) 3130 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 3131 store double %call, ptr %out.gep, align 8 3132 %iv.next = add nuw nsw i64 %iv, 1 3133 %exitcond = icmp eq i64 %iv.next, 1000 3134 br i1 %exitcond, label %for.end, label %for.body 3135 3136 for.end: 3137 ret void 3138} 3139 3140define void @pow_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3141; SLEEF-NEON-LABEL: define void @pow_f32 3142; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3143; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4vv_powf(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 3144; 3145; SLEEF-SVE-LABEL: define void @pow_f32 3146; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3147; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_powf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3148; 3149; SLEEF-SVE-NOPRED-LABEL: define void @pow_f32 3150; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3151; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxvv_powf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 3152; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @powf(float [[IN:%.*]], float [[IN]]) 3153; 3154; ARMPL-NEON-LABEL: define void @pow_f32 3155; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3156; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vpowq_f32(<4 x float> [[WIDE_LOAD:%.*]], <4 x float> [[WIDE_LOAD]]) 3157; 3158; ARMPL-SVE-LABEL: define void @pow_f32 3159; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3160; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svpow_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x float> [[WIDE_MASKED_LOAD]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3161; 3162; ARMPL-SVE-NOPRED-LABEL: define void @pow_f32 3163; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3164; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svpow_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x float> [[WIDE_LOAD]], <vscale x 4 x i1> splat (i1 true)) 3165; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @powf(float [[IN:%.*]], float [[IN]]) 3166; 3167 entry: 3168 br label %for.body 3169 3170 for.body: 3171 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3172 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 3173 %in = load float, ptr %in.gep, align 8 3174 %call = tail call float @powf(float %in, float %in) 3175 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 3176 store float %call, ptr %out.gep, align 4 3177 %iv.next = add nuw nsw i64 %iv, 1 3178 %exitcond = icmp eq i64 %iv.next, 1000 3179 br i1 %exitcond, label %for.end, label %for.body 3180 3181 for.end: 3182 ret void 3183} 3184 3185declare double @sin(double) 3186declare float @sinf(float) 3187 3188define void @sin_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3189; SLEEF-NEON-LABEL: define void @sin_f64 3190; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3191; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_sin(<2 x double> [[WIDE_LOAD:%.*]]) 3192; 3193; SLEEF-SVE-LABEL: define void @sin_f64 3194; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3195; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sin(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3196; 3197; SLEEF-SVE-NOPRED-LABEL: define void @sin_f64 3198; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3199; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sin(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3200; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @sin(double [[IN:%.*]]) 3201; 3202; ARMPL-NEON-LABEL: define void @sin_f64 3203; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3204; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vsinq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 3205; 3206; ARMPL-SVE-LABEL: define void @sin_f64 3207; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3208; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svsin_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3209; 3210; ARMPL-SVE-NOPRED-LABEL: define void @sin_f64 3211; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3212; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svsin_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3213; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @sin(double [[IN:%.*]]) 3214; 3215 entry: 3216 br label %for.body 3217 3218 for.body: 3219 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3220 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 3221 %in = load double, ptr %in.gep, align 8 3222 %call = tail call double @sin(double %in) 3223 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 3224 store double %call, ptr %out.gep, align 8 3225 %iv.next = add nuw nsw i64 %iv, 1 3226 %exitcond = icmp eq i64 %iv.next, 1000 3227 br i1 %exitcond, label %for.end, label %for.body 3228 3229 for.end: 3230 ret void 3231} 3232 3233define void @sin_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3234; SLEEF-NEON-LABEL: define void @sin_f32 3235; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3236; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_sinf(<4 x float> [[WIDE_LOAD:%.*]]) 3237; 3238; SLEEF-SVE-LABEL: define void @sin_f32 3239; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3240; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sinf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3241; 3242; SLEEF-SVE-NOPRED-LABEL: define void @sin_f32 3243; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3244; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sinf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3245; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinf(float [[IN:%.*]]) 3246; 3247; ARMPL-NEON-LABEL: define void @sin_f32 3248; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3249; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vsinq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 3250; 3251; ARMPL-SVE-LABEL: define void @sin_f32 3252; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3253; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svsin_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3254; 3255; ARMPL-SVE-NOPRED-LABEL: define void @sin_f32 3256; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3257; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svsin_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3258; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinf(float [[IN:%.*]]) 3259; 3260 entry: 3261 br label %for.body 3262 3263 for.body: 3264 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3265 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 3266 %in = load float, ptr %in.gep, align 8 3267 %call = tail call float @sinf(float %in) 3268 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 3269 store float %call, ptr %out.gep, align 4 3270 %iv.next = add nuw nsw i64 %iv, 1 3271 %exitcond = icmp eq i64 %iv.next, 1000 3272 br i1 %exitcond, label %for.end, label %for.body 3273 3274 for.end: 3275 ret void 3276} 3277 3278; FIXME: Re-enable sincos[f] vectorization once aliasing issues with output 3279; pointers have been resolved. 3280 3281declare void @sincos(double, ptr, ptr) 3282declare void @sincosf(float, ptr, ptr) 3283 3284define void @sincos_f64(ptr noalias %a, ptr noalias %b, ptr noalias %c) { 3285; SLEEF-NEON-LABEL: define void @sincos_f64 3286; SLEEF-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3287; SLEEF-NEON: call void @sincos(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3288; 3289; SLEEF-SVE-LABEL: define void @sincos_f64 3290; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3291; SLEEF-SVE: call void @sincos(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3292; 3293; SLEEF-SVE-NOPRED-LABEL: define void @sincos_f64 3294; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3295; SLEEF-SVE-NOPRED: call void @sincos(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3296; 3297; ARMPL-NEON-LABEL: define void @sincos_f64 3298; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3299; ARMPL-NEON: call void @sincos(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3300; 3301; ARMPL-SVE-LABEL: define void @sincos_f64 3302; ARMPL-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3303; ARMPL-SVE: call void @sincos(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3304; 3305; ARMPL-SVE-NOPRED-LABEL: define void @sincos_f64 3306; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3307; ARMPL-SVE-NOPRED: call void @sincos(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3308; 3309entry: 3310 br label %for.body 3311 3312for.body: 3313 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 3314 %gepa = getelementptr double, ptr %a, i64 %indvars.iv 3315 %num = load double, ptr %gepa, align 8 3316 %gepb = getelementptr double, ptr %b, i64 %indvars.iv 3317 %gepc = getelementptr double, ptr %c, i64 %indvars.iv 3318 call void @sincos(double %num, ptr %gepb, ptr %gepc) 3319 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 3320 %exitcond = icmp eq i64 %indvars.iv.next, 1000 3321 br i1 %exitcond, label %for.cond.cleanup, label %for.body 3322 3323for.cond.cleanup: 3324 ret void 3325} 3326 3327define void @sincos_f32(ptr noalias %a, ptr noalias %b, ptr noalias %c) { 3328; SLEEF-NEON-LABEL: define void @sincos_f32 3329; SLEEF-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3330; SLEEF-NEON: call void @sincosf(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3331; 3332; SLEEF-SVE-LABEL: define void @sincos_f32 3333; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3334; SLEEF-SVE: call void @sincosf(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3335; 3336; SLEEF-SVE-NOPRED-LABEL: define void @sincos_f32 3337; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3338; SLEEF-SVE-NOPRED: call void @sincosf(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3339; 3340; ARMPL-NEON-LABEL: define void @sincos_f32 3341; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3342; ARMPL-NEON: call void @sincosf(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3343; 3344; ARMPL-SVE-LABEL: define void @sincos_f32 3345; ARMPL-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3346; ARMPL-SVE: call void @sincosf(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3347; 3348; ARMPL-SVE-NOPRED-LABEL: define void @sincos_f32 3349; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3350; ARMPL-SVE-NOPRED: call void @sincosf(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3351; 3352entry: 3353 br label %for.body 3354 3355for.body: 3356 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 3357 %gepa = getelementptr float, ptr %a, i64 %indvars.iv 3358 %num = load float, ptr %gepa, align 8 3359 %gepb = getelementptr float, ptr %b, i64 %indvars.iv 3360 %gepc = getelementptr float, ptr %c, i64 %indvars.iv 3361 call void @sincosf(float %num, ptr %gepb, ptr %gepc) 3362 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 3363 %exitcond = icmp eq i64 %indvars.iv.next, 1000 3364 br i1 %exitcond, label %for.cond.cleanup, label %for.body 3365 3366for.cond.cleanup: 3367 ret void 3368} 3369 3370; FIXME: Re-enable sincospi[f] vectorization once aliasing issues with output 3371; pointers have been resolved. 3372 3373declare void @sincospi(double, ptr, ptr) 3374declare void @sincospif(float, ptr, ptr) 3375 3376define void @sincospi_f64(ptr noalias %a, ptr noalias %b, ptr noalias %c) { 3377; SLEEF-NEON-LABEL: define void @sincospi_f64 3378; SLEEF-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3379; SLEEF-NEON: call void @sincospi(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3380; 3381; SLEEF-SVE-LABEL: define void @sincospi_f64 3382; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3383; SLEEF-SVE: call void @sincospi(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3384; 3385; SLEEF-SVE-NOPRED-LABEL: define void @sincospi_f64 3386; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3387; SLEEF-SVE-NOPRED: call void @sincospi(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3388; 3389; ARMPL-NEON-LABEL: define void @sincospi_f64 3390; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3391; ARMPL-NEON: call void @sincospi(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3392; 3393; ARMPL-SVE-LABEL: define void @sincospi_f64 3394; ARMPL-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3395; ARMPL-SVE: call void @sincospi(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3396; 3397; ARMPL-SVE-NOPRED-LABEL: define void @sincospi_f64 3398; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3399; ARMPL-SVE-NOPRED: call void @sincospi(double [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3400; 3401entry: 3402 br label %for.body 3403 3404for.body: 3405 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 3406 %gepa = getelementptr double, ptr %a, i64 %indvars.iv 3407 %num = load double, ptr %gepa, align 8 3408 %gepb = getelementptr double, ptr %b, i64 %indvars.iv 3409 %gepc = getelementptr double, ptr %c, i64 %indvars.iv 3410 call void @sincospi(double %num, ptr %gepb, ptr %gepc) 3411 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 3412 %exitcond = icmp eq i64 %indvars.iv.next, 1000 3413 br i1 %exitcond, label %for.cond.cleanup, label %for.body 3414 3415for.cond.cleanup: 3416 ret void 3417} 3418 3419define void @sincospi_f32(ptr noalias %a, ptr noalias %b, ptr noalias %c) { 3420; SLEEF-NEON-LABEL: define void @sincospi_f32 3421; SLEEF-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3422; SLEEF-NEON: call void @sincospif(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3423; 3424; SLEEF-SVE-LABEL: define void @sincospi_f32 3425; SLEEF-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3426; SLEEF-SVE: call void @sincospif(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3427; 3428; SLEEF-SVE-NOPRED-LABEL: define void @sincospi_f32 3429; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3430; SLEEF-SVE-NOPRED: call void @sincospif(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3431; 3432; ARMPL-NEON-LABEL: define void @sincospi_f32 3433; ARMPL-NEON-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3434; ARMPL-NEON: call void @sincospif(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3435; 3436; ARMPL-SVE-LABEL: define void @sincospi_f32 3437; ARMPL-SVE-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3438; ARMPL-SVE: call void @sincospif(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3439; 3440; ARMPL-SVE-NOPRED-LABEL: define void @sincospi_f32 3441; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]]) #[[ATTR0]] { 3442; ARMPL-SVE-NOPRED: call void @sincospif(float [[NUM:%.*]], ptr [[GEPB:%.*]], ptr [[GEPC:%.*]]) 3443; 3444entry: 3445 br label %for.body 3446 3447for.body: 3448 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 3449 %gepa = getelementptr float, ptr %a, i64 %indvars.iv 3450 %num = load float, ptr %gepa, align 8 3451 %gepb = getelementptr float, ptr %b, i64 %indvars.iv 3452 %gepc = getelementptr float, ptr %c, i64 %indvars.iv 3453 call void @sincospif(float %num, ptr %gepb, ptr %gepc) 3454 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 3455 %exitcond = icmp eq i64 %indvars.iv.next, 1000 3456 br i1 %exitcond, label %for.cond.cleanup, label %for.body 3457 3458for.cond.cleanup: 3459 ret void 3460} 3461 3462declare double @sinh(double) 3463declare float @sinhf(float) 3464 3465define void @sinh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3466; SLEEF-NEON-LABEL: define void @sinh_f64 3467; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3468; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_sinh(<2 x double> [[WIDE_LOAD:%.*]]) 3469; 3470; SLEEF-SVE-LABEL: define void @sinh_f64 3471; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3472; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sinh(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3473; 3474; SLEEF-SVE-NOPRED-LABEL: define void @sinh_f64 3475; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3476; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sinh(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3477; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @sinh(double [[IN:%.*]]) 3478; 3479; ARMPL-NEON-LABEL: define void @sinh_f64 3480; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3481; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vsinhq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 3482; 3483; ARMPL-SVE-LABEL: define void @sinh_f64 3484; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3485; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svsinh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3486; 3487; ARMPL-SVE-NOPRED-LABEL: define void @sinh_f64 3488; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3489; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svsinh_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3490; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @sinh(double [[IN:%.*]]) 3491; 3492 entry: 3493 br label %for.body 3494 3495 for.body: 3496 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3497 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 3498 %in = load double, ptr %in.gep, align 8 3499 %call = tail call double @sinh(double %in) 3500 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 3501 store double %call, ptr %out.gep, align 8 3502 %iv.next = add nuw nsw i64 %iv, 1 3503 %exitcond = icmp eq i64 %iv.next, 1000 3504 br i1 %exitcond, label %for.end, label %for.body 3505 3506 for.end: 3507 ret void 3508} 3509 3510define void @sinh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3511; SLEEF-NEON-LABEL: define void @sinh_f32 3512; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3513; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_sinhf(<4 x float> [[WIDE_LOAD:%.*]]) 3514; 3515; SLEEF-SVE-LABEL: define void @sinh_f32 3516; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3517; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sinhf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3518; 3519; SLEEF-SVE-NOPRED-LABEL: define void @sinh_f32 3520; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3521; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sinhf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3522; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinhf(float [[IN:%.*]]) 3523; 3524; ARMPL-NEON-LABEL: define void @sinh_f32 3525; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3526; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vsinhq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 3527; 3528; ARMPL-SVE-LABEL: define void @sinh_f32 3529; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3530; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svsinh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3531; 3532; ARMPL-SVE-NOPRED-LABEL: define void @sinh_f32 3533; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3534; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svsinh_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3535; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinhf(float [[IN:%.*]]) 3536; 3537 entry: 3538 br label %for.body 3539 3540 for.body: 3541 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3542 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 3543 %in = load float, ptr %in.gep, align 8 3544 %call = tail call float @sinhf(float %in) 3545 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 3546 store float %call, ptr %out.gep, align 4 3547 %iv.next = add nuw nsw i64 %iv, 1 3548 %exitcond = icmp eq i64 %iv.next, 1000 3549 br i1 %exitcond, label %for.end, label %for.body 3550 3551 for.end: 3552 ret void 3553} 3554 3555declare double @sinpi(double) 3556declare float @sinpif(float) 3557 3558define void @sinpi_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3559; SLEEF-NEON-LABEL: define void @sinpi_f64 3560; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3561; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_sinpi(<2 x double> [[WIDE_LOAD:%.*]]) 3562; 3563; SLEEF-SVE-LABEL: define void @sinpi_f64 3564; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3565; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sinpi(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3566; 3567; SLEEF-SVE-NOPRED-LABEL: define void @sinpi_f64 3568; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3569; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sinpi(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3570; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @sinpi(double [[IN:%.*]]) 3571; 3572; ARMPL-NEON-LABEL: define void @sinpi_f64 3573; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3574; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vsinpiq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 3575; 3576; ARMPL-SVE-LABEL: define void @sinpi_f64 3577; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3578; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svsinpi_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3579; 3580; ARMPL-SVE-NOPRED-LABEL: define void @sinpi_f64 3581; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3582; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svsinpi_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3583; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @sinpi(double [[IN:%.*]]) 3584; 3585 entry: 3586 br label %for.body 3587 3588 for.body: 3589 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3590 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 3591 %in = load double, ptr %in.gep, align 8 3592 %call = tail call double @sinpi(double %in) 3593 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 3594 store double %call, ptr %out.gep, align 8 3595 %iv.next = add nuw nsw i64 %iv, 1 3596 %exitcond = icmp eq i64 %iv.next, 1000 3597 br i1 %exitcond, label %for.end, label %for.body 3598 3599 for.end: 3600 ret void 3601} 3602 3603define void @sinpi_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3604; SLEEF-NEON-LABEL: define void @sinpi_f32 3605; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3606; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_sinpif(<4 x float> [[WIDE_LOAD:%.*]]) 3607; 3608; SLEEF-SVE-LABEL: define void @sinpi_f32 3609; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3610; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sinpif(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3611; 3612; SLEEF-SVE-NOPRED-LABEL: define void @sinpi_f32 3613; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3614; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sinpif(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3615; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinpif(float [[IN:%.*]]) 3616; 3617; ARMPL-NEON-LABEL: define void @sinpi_f32 3618; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3619; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vsinpiq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 3620; 3621; ARMPL-SVE-LABEL: define void @sinpi_f32 3622; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3623; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svsinpi_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3624; 3625; ARMPL-SVE-NOPRED-LABEL: define void @sinpi_f32 3626; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3627; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svsinpi_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3628; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @sinpif(float [[IN:%.*]]) 3629; 3630 entry: 3631 br label %for.body 3632 3633 for.body: 3634 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3635 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 3636 %in = load float, ptr %in.gep, align 8 3637 %call = tail call float @sinpif(float %in) 3638 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 3639 store float %call, ptr %out.gep, align 4 3640 %iv.next = add nuw nsw i64 %iv, 1 3641 %exitcond = icmp eq i64 %iv.next, 1000 3642 br i1 %exitcond, label %for.end, label %for.body 3643 3644 for.end: 3645 ret void 3646} 3647 3648declare double @sqrt(double) 3649declare float @sqrtf(float) 3650 3651define void @sqrt_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3652; SLEEF-NEON-LABEL: define void @sqrt_f64 3653; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3654; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_sqrt(<2 x double> [[WIDE_LOAD:%.*]]) 3655; 3656; SLEEF-SVE-LABEL: define void @sqrt_f64 3657; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3658; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sqrt(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3659; 3660; SLEEF-SVE-NOPRED-LABEL: define void @sqrt_f64 3661; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3662; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_sqrt(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3663; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @sqrt(double [[IN:%.*]]) 3664; 3665; ARMPL-NEON-LABEL: define void @sqrt_f64 3666; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3667; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vsqrtq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 3668; 3669; ARMPL-SVE-LABEL: define void @sqrt_f64 3670; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3671; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svsqrt_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3672; 3673; ARMPL-SVE-NOPRED-LABEL: define void @sqrt_f64 3674; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3675; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svsqrt_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3676; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @sqrt(double [[IN:%.*]]) 3677; 3678 entry: 3679 br label %for.body 3680 3681 for.body: 3682 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3683 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 3684 %in = load double, ptr %in.gep, align 8 3685 %call = tail call double @sqrt(double %in) 3686 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 3687 store double %call, ptr %out.gep, align 8 3688 %iv.next = add nuw nsw i64 %iv, 1 3689 %exitcond = icmp eq i64 %iv.next, 1000 3690 br i1 %exitcond, label %for.end, label %for.body 3691 3692 for.end: 3693 ret void 3694} 3695 3696define void @sqrt_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3697; SLEEF-NEON-LABEL: define void @sqrt_f32 3698; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3699; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_sqrtf(<4 x float> [[WIDE_LOAD:%.*]]) 3700; 3701; SLEEF-SVE-LABEL: define void @sqrt_f32 3702; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3703; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sqrtf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3704; 3705; SLEEF-SVE-NOPRED-LABEL: define void @sqrt_f32 3706; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3707; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_sqrtf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3708; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @sqrtf(float [[IN:%.*]]) 3709; 3710; ARMPL-NEON-LABEL: define void @sqrt_f32 3711; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3712; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vsqrtq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 3713; 3714; ARMPL-SVE-LABEL: define void @sqrt_f32 3715; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3716; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svsqrt_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3717; 3718; ARMPL-SVE-NOPRED-LABEL: define void @sqrt_f32 3719; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3720; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svsqrt_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3721; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @sqrtf(float [[IN:%.*]]) 3722; 3723 entry: 3724 br label %for.body 3725 3726 for.body: 3727 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3728 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 3729 %in = load float, ptr %in.gep, align 8 3730 %call = tail call float @sqrtf(float %in) 3731 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 3732 store float %call, ptr %out.gep, align 4 3733 %iv.next = add nuw nsw i64 %iv, 1 3734 %exitcond = icmp eq i64 %iv.next, 1000 3735 br i1 %exitcond, label %for.end, label %for.body 3736 3737 for.end: 3738 ret void 3739} 3740 3741declare double @tan(double) 3742declare float @tanf(float) 3743 3744define void @tan_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3745; SLEEF-NEON-LABEL: define void @tan_f64 3746; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3747; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_tan(<2 x double> [[WIDE_LOAD:%.*]]) 3748; 3749; SLEEF-SVE-LABEL: define void @tan_f64 3750; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3751; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tan(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3752; 3753; SLEEF-SVE-NOPRED-LABEL: define void @tan_f64 3754; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3755; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tan(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3756; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @tan(double [[IN:%.*]]) 3757; 3758; ARMPL-NEON-LABEL: define void @tan_f64 3759; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3760; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vtanq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 3761; 3762; ARMPL-SVE-LABEL: define void @tan_f64 3763; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3764; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svtan_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3765; 3766; ARMPL-SVE-NOPRED-LABEL: define void @tan_f64 3767; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3768; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svtan_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3769; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @tan(double [[IN:%.*]]) 3770; 3771 entry: 3772 br label %for.body 3773 3774 for.body: 3775 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3776 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 3777 %in = load double, ptr %in.gep, align 8 3778 %call = tail call double @tan(double %in) 3779 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 3780 store double %call, ptr %out.gep, align 8 3781 %iv.next = add nuw nsw i64 %iv, 1 3782 %exitcond = icmp eq i64 %iv.next, 1000 3783 br i1 %exitcond, label %for.end, label %for.body 3784 3785 for.end: 3786 ret void 3787} 3788 3789define void @tan_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3790; SLEEF-NEON-LABEL: define void @tan_f32 3791; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3792; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_tanf(<4 x float> [[WIDE_LOAD:%.*]]) 3793; 3794; SLEEF-SVE-LABEL: define void @tan_f32 3795; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3796; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tanf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3797; 3798; SLEEF-SVE-NOPRED-LABEL: define void @tan_f32 3799; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3800; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tanf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3801; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @tanf(float [[IN:%.*]]) 3802; 3803; ARMPL-NEON-LABEL: define void @tan_f32 3804; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3805; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vtanq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 3806; 3807; ARMPL-SVE-LABEL: define void @tan_f32 3808; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3809; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svtan_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3810; 3811; ARMPL-SVE-NOPRED-LABEL: define void @tan_f32 3812; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3813; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svtan_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3814; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @tanf(float [[IN:%.*]]) 3815; 3816 entry: 3817 br label %for.body 3818 3819 for.body: 3820 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3821 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 3822 %in = load float, ptr %in.gep, align 8 3823 %call = tail call float @tanf(float %in) 3824 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 3825 store float %call, ptr %out.gep, align 4 3826 %iv.next = add nuw nsw i64 %iv, 1 3827 %exitcond = icmp eq i64 %iv.next, 1000 3828 br i1 %exitcond, label %for.end, label %for.body 3829 3830 for.end: 3831 ret void 3832} 3833 3834declare double @tanh(double) 3835declare float @tanhf(float) 3836 3837define void @tanh_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3838; SLEEF-NEON-LABEL: define void @tanh_f64 3839; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3840; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_tanh(<2 x double> [[WIDE_LOAD:%.*]]) 3841; 3842; SLEEF-SVE-LABEL: define void @tanh_f64 3843; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3844; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tanh(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3845; 3846; SLEEF-SVE-NOPRED-LABEL: define void @tanh_f64 3847; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3848; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tanh(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3849; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @tanh(double [[IN:%.*]]) 3850; 3851; ARMPL-NEON-LABEL: define void @tanh_f64 3852; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3853; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vtanhq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 3854; 3855; ARMPL-SVE-LABEL: define void @tanh_f64 3856; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3857; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svtanh_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3858; 3859; ARMPL-SVE-NOPRED-LABEL: define void @tanh_f64 3860; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3861; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svtanh_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3862; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @tanh(double [[IN:%.*]]) 3863; 3864 entry: 3865 br label %for.body 3866 3867 for.body: 3868 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3869 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 3870 %in = load double, ptr %in.gep, align 8 3871 %call = tail call double @tanh(double %in) 3872 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 3873 store double %call, ptr %out.gep, align 8 3874 %iv.next = add nuw nsw i64 %iv, 1 3875 %exitcond = icmp eq i64 %iv.next, 1000 3876 br i1 %exitcond, label %for.end, label %for.body 3877 3878 for.end: 3879 ret void 3880} 3881 3882define void @tanh_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3883; SLEEF-NEON-LABEL: define void @tanh_f32 3884; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3885; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_tanhf(<4 x float> [[WIDE_LOAD:%.*]]) 3886; 3887; SLEEF-SVE-LABEL: define void @tanh_f32 3888; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3889; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tanhf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3890; 3891; SLEEF-SVE-NOPRED-LABEL: define void @tanh_f32 3892; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3893; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tanhf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3894; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @tanhf(float [[IN:%.*]]) 3895; 3896; ARMPL-NEON-LABEL: define void @tanh_f32 3897; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3898; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vtanhq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 3899; 3900; ARMPL-SVE-LABEL: define void @tanh_f32 3901; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3902; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svtanh_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3903; 3904; ARMPL-SVE-NOPRED-LABEL: define void @tanh_f32 3905; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3906; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svtanh_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3907; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @tanhf(float [[IN:%.*]]) 3908; 3909 entry: 3910 br label %for.body 3911 3912 for.body: 3913 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3914 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 3915 %in = load float, ptr %in.gep, align 8 3916 %call = tail call float @tanhf(float %in) 3917 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 3918 store float %call, ptr %out.gep, align 4 3919 %iv.next = add nuw nsw i64 %iv, 1 3920 %exitcond = icmp eq i64 %iv.next, 1000 3921 br i1 %exitcond, label %for.end, label %for.body 3922 3923 for.end: 3924 ret void 3925} 3926 3927declare double @tgamma(double) 3928declare float @tgammaf(float) 3929 3930define void @tgamma_f64(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3931; SLEEF-NEON-LABEL: define void @tgamma_f64 3932; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3933; SLEEF-NEON: [[TMP3:%.*]] = call <2 x double> @_ZGVnN2v_tgamma(<2 x double> [[WIDE_LOAD:%.*]]) 3934; 3935; SLEEF-SVE-LABEL: define void @tgamma_f64 3936; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3937; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tgamma(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3938; 3939; SLEEF-SVE-NOPRED-LABEL: define void @tgamma_f64 3940; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3941; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @_ZGVsMxv_tgamma(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3942; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call double @tgamma(double [[IN:%.*]]) 3943; 3944; ARMPL-NEON-LABEL: define void @tgamma_f64 3945; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3946; ARMPL-NEON: [[TMP3:%.*]] = call <2 x double> @armpl_vtgammaq_f64(<2 x double> [[WIDE_LOAD:%.*]]) 3947; 3948; ARMPL-SVE-LABEL: define void @tgamma_f64 3949; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3950; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 2 x double> @armpl_svtgamma_f64_x(<vscale x 2 x double> [[WIDE_MASKED_LOAD:%.*]], <vscale x 2 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3951; 3952; ARMPL-SVE-NOPRED-LABEL: define void @tgamma_f64 3953; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3954; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 2 x double> @armpl_svtgamma_f64_x(<vscale x 2 x double> [[WIDE_LOAD:%.*]], <vscale x 2 x i1> splat (i1 true)) 3955; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call double @tgamma(double [[IN:%.*]]) 3956; 3957 entry: 3958 br label %for.body 3959 3960 for.body: 3961 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 3962 %in.gep = getelementptr inbounds double, ptr %in.ptr, i64 %iv 3963 %in = load double, ptr %in.gep, align 8 3964 %call = tail call double @tgamma(double %in) 3965 %out.gep = getelementptr inbounds double, ptr %out.ptr, i64 %iv 3966 store double %call, ptr %out.gep, align 8 3967 %iv.next = add nuw nsw i64 %iv, 1 3968 %exitcond = icmp eq i64 %iv.next, 1000 3969 br i1 %exitcond, label %for.end, label %for.body 3970 3971 for.end: 3972 ret void 3973} 3974 3975define void @tgamma_f32(ptr noalias %in.ptr, ptr noalias %out.ptr) { 3976; SLEEF-NEON-LABEL: define void @tgamma_f32 3977; SLEEF-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3978; SLEEF-NEON: [[TMP3:%.*]] = call <4 x float> @_ZGVnN4v_tgammaf(<4 x float> [[WIDE_LOAD:%.*]]) 3979; 3980; SLEEF-SVE-LABEL: define void @tgamma_f32 3981; SLEEF-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3982; SLEEF-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tgammaf(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3983; 3984; SLEEF-SVE-NOPRED-LABEL: define void @tgamma_f32 3985; SLEEF-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3986; SLEEF-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @_ZGVsMxv_tgammaf(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 3987; SLEEF-SVE-NOPRED: [[CALL:%.*]] = tail call float @tgammaf(float [[IN:%.*]]) 3988; 3989; ARMPL-NEON-LABEL: define void @tgamma_f32 3990; ARMPL-NEON-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3991; ARMPL-NEON: [[TMP3:%.*]] = call <4 x float> @armpl_vtgammaq_f32(<4 x float> [[WIDE_LOAD:%.*]]) 3992; 3993; ARMPL-SVE-LABEL: define void @tgamma_f32 3994; ARMPL-SVE-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3995; ARMPL-SVE: [[TMP13:%.*]] = call <vscale x 4 x float> @armpl_svtgamma_f32_x(<vscale x 4 x float> [[WIDE_MASKED_LOAD:%.*]], <vscale x 4 x i1> [[ACTIVE_LANE_MASK:%.*]]) 3996; 3997; ARMPL-SVE-NOPRED-LABEL: define void @tgamma_f32 3998; ARMPL-SVE-NOPRED-SAME: (ptr noalias [[IN_PTR:%.*]], ptr noalias [[OUT_PTR:%.*]]) #[[ATTR0]] { 3999; ARMPL-SVE-NOPRED: [[TMP9:%.*]] = call <vscale x 4 x float> @armpl_svtgamma_f32_x(<vscale x 4 x float> [[WIDE_LOAD:%.*]], <vscale x 4 x i1> splat (i1 true)) 4000; ARMPL-SVE-NOPRED: [[CALL:%.*]] = tail call float @tgammaf(float [[IN:%.*]]) 4001; 4002 entry: 4003 br label %for.body 4004 4005 for.body: 4006 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ] 4007 %in.gep = getelementptr inbounds float, ptr %in.ptr, i64 %iv 4008 %in = load float, ptr %in.gep, align 8 4009 %call = tail call float @tgammaf(float %in) 4010 %out.gep = getelementptr inbounds float, ptr %out.ptr, i64 %iv 4011 store float %call, ptr %out.gep, align 4 4012 %iv.next = add nuw nsw i64 %iv, 1 4013 %exitcond = icmp eq i64 %iv.next, 1000 4014 br i1 %exitcond, label %for.end, label %for.body 4015 4016 for.end: 4017 ret void 4018} 4019