xref: /llvm-project/llvm/test/Transforms/LoopVectorize/AArch64/sve-scalable-load-in-loop.ll (revision 7d7577256b76e4293f455b8093504d5f7044ab4b)
1; RUN: opt -S -passes=loop-vectorize -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
2
3; This test is checking that a scalable load inside a loop does not trigger a
4; TypeSize error in the loop vectorization legality analysis. It is possible for
5; a scalable/vector load to appear inside a loop at vectorization legality
6; analysis if, for example, the ACLE are used. If we encounter a scalable/vector
7; load, it should not be considered for analysis, and we should not see a
8; TypeSize error.
9
10; #include <arm_sve.h>
11;
12; void scalable_load_in_loop(long n, int *a, int *b, svuint32_t *x,
13;                            svuint32_t *y) {
14;     for (unsigned i = 0; i < n; i++) {
15;         if (i % 2 == 0) continue;
16;         a[i] = 2 * b[i];
17;         *x = *y;
18;     }
19; }
20
21; CHECK-LABEL: @scalable_load_in_loop
22; CHECK-NOT: vector.body
23define void @scalable_load_in_loop(i64 %n, ptr %x, ptr %y) {
24entry:
25  br label %for.body
26
27for.body:
28  %i = phi i32 [ %inc, %for.inc ], [ 0, %entry ]
29  %rem = and i32 %i, 1
30  %cmp = icmp eq i32 %rem, 0
31  br i1 %cmp, label %for.inc, label %if.end
32
33if.end:
34  %0 = load <vscale x 4 x i32>, ptr %y
35  store <vscale x 4 x i32> %0, ptr %x
36  br label %for.inc
37
38for.inc:
39  %inc = add i32 %i, 1
40  %cmp2 = icmp slt i64 0, %n
41  br i1 %cmp2, label %for.body, label %for.cleanup
42
43for.cleanup:
44  ret void
45}
46