xref: /llvm-project/llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll (revision 1de3dc7d23dd6b856efad3a3a04f2396328726d7) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2; RUN: opt -p loop-vectorize -S %s | FileCheck --check-prefixes=DEFAULT %s
3; RUN: opt -p loop-vectorize -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue -S %s | FileCheck --check-prefixes=PRED %s
4
5target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
6target triple = "arm64-apple-macosx14.0.0"
7
8define void @cost_store_i8(ptr %dst) #0 {
9; DEFAULT-LABEL: define void @cost_store_i8(
10; DEFAULT-SAME: ptr [[DST:%.*]]) #[[ATTR0:[0-9]+]] {
11; DEFAULT-NEXT:  iter.check:
12; DEFAULT-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
13; DEFAULT-NEXT:    [[TMP1:%.*]] = mul i64 [[TMP0]], 8
14; DEFAULT-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 101, [[TMP1]]
15; DEFAULT-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[VEC_EPILOG_SCALAR_PH:%.*]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]
16; DEFAULT:       vector.main.loop.iter.check:
17; DEFAULT-NEXT:    [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
18; DEFAULT-NEXT:    [[TMP3:%.*]] = mul i64 [[TMP2]], 32
19; DEFAULT-NEXT:    [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 101, [[TMP3]]
20; DEFAULT-NEXT:    br i1 [[MIN_ITERS_CHECK1]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]
21; DEFAULT:       vector.ph:
22; DEFAULT-NEXT:    [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
23; DEFAULT-NEXT:    [[TMP5:%.*]] = mul i64 [[TMP4]], 32
24; DEFAULT-NEXT:    [[N_MOD_VF:%.*]] = urem i64 101, [[TMP5]]
25; DEFAULT-NEXT:    [[N_VEC:%.*]] = sub i64 101, [[N_MOD_VF]]
26; DEFAULT-NEXT:    [[TMP6:%.*]] = call i64 @llvm.vscale.i64()
27; DEFAULT-NEXT:    [[TMP7:%.*]] = mul i64 [[TMP6]], 32
28; DEFAULT-NEXT:    br label [[VECTOR_BODY:%.*]]
29; DEFAULT:       vector.body:
30; DEFAULT-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
31; DEFAULT-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 0
32; DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP8]]
33; DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr i8, ptr [[TMP9]], i32 0
34; DEFAULT-NEXT:    [[TMP22:%.*]] = call i64 @llvm.vscale.i64()
35; DEFAULT-NEXT:    [[TMP23:%.*]] = mul i64 [[TMP22]], 16
36; DEFAULT-NEXT:    [[TMP24:%.*]] = getelementptr i8, ptr [[TMP9]], i64 [[TMP23]]
37; DEFAULT-NEXT:    store <vscale x 16 x i8> zeroinitializer, ptr [[TMP10]], align 1
38; DEFAULT-NEXT:    store <vscale x 16 x i8> zeroinitializer, ptr [[TMP24]], align 1
39; DEFAULT-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP7]]
40; DEFAULT-NEXT:    [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
41; DEFAULT-NEXT:    br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
42; DEFAULT:       middle.block:
43; DEFAULT-NEXT:    [[CMP_N:%.*]] = icmp eq i64 101, [[N_VEC]]
44; DEFAULT-NEXT:    br i1 [[CMP_N]], label [[EXIT:%.*]], label [[VEC_EPILOG_ITER_CHECK:%.*]]
45; DEFAULT:       vec.epilog.iter.check:
46; DEFAULT-NEXT:    [[N_VEC_REMAINING:%.*]] = sub i64 101, [[N_VEC]]
47; DEFAULT-NEXT:    [[TMP12:%.*]] = call i64 @llvm.vscale.i64()
48; DEFAULT-NEXT:    [[TMP13:%.*]] = mul i64 [[TMP12]], 8
49; DEFAULT-NEXT:    [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[N_VEC_REMAINING]], [[TMP13]]
50; DEFAULT-NEXT:    br i1 [[MIN_EPILOG_ITERS_CHECK]], label [[VEC_EPILOG_SCALAR_PH]], label [[VEC_EPILOG_PH]]
51; DEFAULT:       vec.epilog.ph:
52; DEFAULT-NEXT:    [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
53; DEFAULT-NEXT:    [[TMP14:%.*]] = call i64 @llvm.vscale.i64()
54; DEFAULT-NEXT:    [[TMP15:%.*]] = mul i64 [[TMP14]], 8
55; DEFAULT-NEXT:    [[N_MOD_VF2:%.*]] = urem i64 101, [[TMP15]]
56; DEFAULT-NEXT:    [[N_VEC3:%.*]] = sub i64 101, [[N_MOD_VF2]]
57; DEFAULT-NEXT:    [[TMP16:%.*]] = call i64 @llvm.vscale.i64()
58; DEFAULT-NEXT:    [[TMP17:%.*]] = mul i64 [[TMP16]], 8
59; DEFAULT-NEXT:    br label [[VEC_EPILOG_VECTOR_BODY:%.*]]
60; DEFAULT:       vec.epilog.vector.body:
61; DEFAULT-NEXT:    [[INDEX5:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], [[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT6:%.*]], [[VEC_EPILOG_VECTOR_BODY]] ]
62; DEFAULT-NEXT:    [[TMP18:%.*]] = add i64 [[INDEX5]], 0
63; DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP18]]
64; DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr i8, ptr [[TMP19]], i32 0
65; DEFAULT-NEXT:    store <vscale x 8 x i8> zeroinitializer, ptr [[TMP20]], align 1
66; DEFAULT-NEXT:    [[INDEX_NEXT6]] = add nuw i64 [[INDEX5]], [[TMP17]]
67; DEFAULT-NEXT:    [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT6]], [[N_VEC3]]
68; DEFAULT-NEXT:    br i1 [[TMP21]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
69; DEFAULT:       vec.epilog.middle.block:
70; DEFAULT-NEXT:    [[CMP_N4:%.*]] = icmp eq i64 101, [[N_VEC3]]
71; DEFAULT-NEXT:    br i1 [[CMP_N4]], label [[EXIT]], label [[VEC_EPILOG_SCALAR_PH]]
72; DEFAULT:       vec.epilog.scalar.ph:
73; DEFAULT-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC3]], [[VEC_EPILOG_MIDDLE_BLOCK]] ], [ 0, [[ITER_CHECK:%.*]] ], [ [[N_VEC]], [[VEC_EPILOG_ITER_CHECK]] ]
74; DEFAULT-NEXT:    br label [[LOOP:%.*]]
75; DEFAULT:       loop:
76; DEFAULT-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[VEC_EPILOG_SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
77; DEFAULT-NEXT:    [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[IV]]
78; DEFAULT-NEXT:    store i8 0, ptr [[GEP]], align 1
79; DEFAULT-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
80; DEFAULT-NEXT:    [[EC:%.*]] = icmp eq i64 [[IV]], 100
81; DEFAULT-NEXT:    br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP4:![0-9]+]]
82; DEFAULT:       exit:
83; DEFAULT-NEXT:    ret void
84;
85; PRED-LABEL: define void @cost_store_i8(
86; PRED-SAME: ptr [[DST:%.*]]) #[[ATTR0:[0-9]+]] {
87; PRED-NEXT:  entry:
88; PRED-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
89; PRED:       vector.ph:
90; PRED-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
91; PRED-NEXT:    [[TMP1:%.*]] = mul i64 [[TMP0]], 16
92; PRED-NEXT:    [[TMP4:%.*]] = sub i64 [[TMP1]], 1
93; PRED-NEXT:    [[N_RND_UP:%.*]] = add i64 101, [[TMP4]]
94; PRED-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP1]]
95; PRED-NEXT:    [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
96; PRED-NEXT:    [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
97; PRED-NEXT:    [[TMP6:%.*]] = mul i64 [[TMP5]], 16
98; PRED-NEXT:    [[TMP7:%.*]] = call i64 @llvm.vscale.i64()
99; PRED-NEXT:    [[TMP8:%.*]] = mul i64 [[TMP7]], 16
100; PRED-NEXT:    [[TMP9:%.*]] = sub i64 101, [[TMP8]]
101; PRED-NEXT:    [[TMP10:%.*]] = icmp ugt i64 101, [[TMP8]]
102; PRED-NEXT:    [[TMP11:%.*]] = select i1 [[TMP10]], i64 [[TMP9]], i64 0
103; PRED-NEXT:    [[ACTIVE_LANE_MASK_ENTRY:%.*]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 0, i64 101)
104; PRED-NEXT:    br label [[VECTOR_BODY:%.*]]
105; PRED:       vector.body:
106; PRED-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
107; PRED-NEXT:    [[ACTIVE_LANE_MASK:%.*]] = phi <vscale x 16 x i1> [ [[ACTIVE_LANE_MASK_ENTRY]], [[VECTOR_PH]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], [[VECTOR_BODY]] ]
108; PRED-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 0
109; PRED-NEXT:    [[TMP13:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP12]]
110; PRED-NEXT:    [[TMP14:%.*]] = getelementptr i8, ptr [[TMP13]], i32 0
111; PRED-NEXT:    call void @llvm.masked.store.nxv16i8.p0(<vscale x 16 x i8> zeroinitializer, ptr [[TMP14]], i32 1, <vscale x 16 x i1> [[ACTIVE_LANE_MASK]])
112; PRED-NEXT:    [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP6]]
113; PRED-NEXT:    [[ACTIVE_LANE_MASK_NEXT]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 [[INDEX]], i64 [[TMP11]])
114; PRED-NEXT:    [[TMP15:%.*]] = xor <vscale x 16 x i1> [[ACTIVE_LANE_MASK_NEXT]], splat (i1 true)
115; PRED-NEXT:    [[TMP16:%.*]] = extractelement <vscale x 16 x i1> [[TMP15]], i32 0
116; PRED-NEXT:    br i1 [[TMP16]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
117; PRED:       middle.block:
118; PRED-NEXT:    br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]]
119; PRED:       scalar.ph:
120; PRED-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
121; PRED-NEXT:    br label [[LOOP:%.*]]
122; PRED:       loop:
123; PRED-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
124; PRED-NEXT:    [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[IV]]
125; PRED-NEXT:    store i8 0, ptr [[GEP]], align 1
126; PRED-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
127; PRED-NEXT:    [[EC:%.*]] = icmp eq i64 [[IV]], 100
128; PRED-NEXT:    br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
129; PRED:       exit:
130; PRED-NEXT:    ret void
131;
132entry:
133  br label %loop
134
135loop:
136  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
137  %gep = getelementptr i8, ptr %dst, i64 %iv
138  store i8 0, ptr %gep, align 1
139  %iv.next = add i64 %iv, 1
140  %ec = icmp eq i64 %iv, 100
141  br i1 %ec, label %exit, label %loop
142
143exit:
144  ret void
145}
146
147define void @trunc_store(ptr %dst, ptr %src, i16 %x) #1 {
148; DEFAULT-LABEL: define void @trunc_store(
149; DEFAULT-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]], i16 [[X:%.*]]) #[[ATTR1:[0-9]+]] {
150; DEFAULT-NEXT:  iter.check:
151; DEFAULT-NEXT:    br i1 false, label [[VEC_EPILOG_SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
152; DEFAULT:       vector.memcheck:
153; DEFAULT-NEXT:    [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[DST]], i64 1000
154; DEFAULT-NEXT:    [[SCEVGEP:%.*]] = getelementptr i8, ptr [[SRC]], i64 8
155; DEFAULT-NEXT:    [[BOUND0:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP]]
156; DEFAULT-NEXT:    [[BOUND1:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP1]]
157; DEFAULT-NEXT:    [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
158; DEFAULT-NEXT:    br i1 [[FOUND_CONFLICT]], label [[VEC_EPILOG_SCALAR_PH]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]
159; DEFAULT:       vector.main.loop.iter.check:
160; DEFAULT-NEXT:    br i1 false, label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]
161; DEFAULT:       vector.ph:
162; DEFAULT-NEXT:    [[BROADCAST_SPLATINSERT3:%.*]] = insertelement <16 x i16> poison, i16 [[X]], i64 0
163; DEFAULT-NEXT:    [[BROADCAST_SPLAT4:%.*]] = shufflevector <16 x i16> [[BROADCAST_SPLATINSERT3]], <16 x i16> poison, <16 x i32> zeroinitializer
164; DEFAULT-NEXT:    [[TMP7:%.*]] = trunc <16 x i16> [[BROADCAST_SPLAT4]] to <16 x i8>
165; DEFAULT-NEXT:    br label [[VECTOR_BODY:%.*]]
166; DEFAULT:       vector.body:
167; DEFAULT-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
168; DEFAULT-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 0
169; DEFAULT-NEXT:    [[TMP4:%.*]] = load i64, ptr [[SRC]], align 8, !alias.scope [[META5:![0-9]+]]
170; DEFAULT-NEXT:    [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <16 x i64> poison, i64 [[TMP4]], i64 0
171; DEFAULT-NEXT:    [[BROADCAST_SPLAT2:%.*]] = shufflevector <16 x i64> [[BROADCAST_SPLATINSERT1]], <16 x i64> poison, <16 x i32> zeroinitializer
172; DEFAULT-NEXT:    [[TMP5:%.*]] = trunc <16 x i64> [[BROADCAST_SPLAT2]] to <16 x i8>
173; DEFAULT-NEXT:    [[TMP8:%.*]] = and <16 x i8> [[TMP5]], [[TMP7]]
174; DEFAULT-NEXT:    [[TMP9:%.*]] = and <16 x i8> [[TMP5]], [[TMP7]]
175; DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP2]]
176; DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr i8, ptr [[TMP10]], i32 0
177; DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr i8, ptr [[TMP10]], i32 16
178; DEFAULT-NEXT:    store <16 x i8> [[TMP8]], ptr [[TMP12]], align 1, !alias.scope [[META8:![0-9]+]], !noalias [[META5]]
179; DEFAULT-NEXT:    store <16 x i8> [[TMP9]], ptr [[TMP13]], align 1, !alias.scope [[META8]], !noalias [[META5]]
180; DEFAULT-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 32
181; DEFAULT-NEXT:    [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], 992
182; DEFAULT-NEXT:    br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
183; DEFAULT:       middle.block:
184; DEFAULT-NEXT:    br i1 false, label [[EXIT:%.*]], label [[VEC_EPILOG_ITER_CHECK:%.*]]
185; DEFAULT:       vec.epilog.iter.check:
186; DEFAULT-NEXT:    br i1 false, label [[VEC_EPILOG_SCALAR_PH]], label [[VEC_EPILOG_PH]]
187; DEFAULT:       vec.epilog.ph:
188; DEFAULT-NEXT:    [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ 992, [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
189; DEFAULT-NEXT:    [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <8 x i16> poison, i16 [[X]], i64 0
190; DEFAULT-NEXT:    [[BROADCAST_SPLAT5:%.*]] = shufflevector <8 x i16> [[BROADCAST_SPLATINSERT4]], <8 x i16> poison, <8 x i32> zeroinitializer
191; DEFAULT-NEXT:    [[TMP15:%.*]] = trunc <8 x i16> [[BROADCAST_SPLAT5]] to <8 x i8>
192; DEFAULT-NEXT:    br label [[VEC_EPILOG_VECTOR_BODY:%.*]]
193; DEFAULT:       vec.epilog.vector.body:
194; DEFAULT-NEXT:    [[INDEX5:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], [[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT8:%.*]], [[VEC_EPILOG_VECTOR_BODY]] ]
195; DEFAULT-NEXT:    [[TMP21:%.*]] = add i64 [[INDEX5]], 0
196; DEFAULT-NEXT:    [[TMP16:%.*]] = load i64, ptr [[SRC]], align 8, !alias.scope [[META11:![0-9]+]]
197; DEFAULT-NEXT:    [[BROADCAST_SPLATINSERT7:%.*]] = insertelement <8 x i64> poison, i64 [[TMP16]], i64 0
198; DEFAULT-NEXT:    [[BROADCAST_SPLAT8:%.*]] = shufflevector <8 x i64> [[BROADCAST_SPLATINSERT7]], <8 x i64> poison, <8 x i32> zeroinitializer
199; DEFAULT-NEXT:    [[TMP18:%.*]] = trunc <8 x i64> [[BROADCAST_SPLAT8]] to <8 x i8>
200; DEFAULT-NEXT:    [[TMP14:%.*]] = and <8 x i8> [[TMP18]], [[TMP15]]
201; DEFAULT-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP21]]
202; DEFAULT-NEXT:    [[TMP27:%.*]] = getelementptr i8, ptr [[TMP26]], i32 0
203; DEFAULT-NEXT:    store <8 x i8> [[TMP14]], ptr [[TMP27]], align 1, !alias.scope [[META14:![0-9]+]], !noalias [[META11]]
204; DEFAULT-NEXT:    [[INDEX_NEXT8]] = add nuw i64 [[INDEX5]], 8
205; DEFAULT-NEXT:    [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT8]], 1000
206; DEFAULT-NEXT:    br i1 [[TMP17]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
207; DEFAULT:       vec.epilog.middle.block:
208; DEFAULT-NEXT:    br i1 true, label [[EXIT]], label [[VEC_EPILOG_SCALAR_PH]]
209; DEFAULT:       vec.epilog.scalar.ph:
210; DEFAULT-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ 1000, [[VEC_EPILOG_MIDDLE_BLOCK]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[ITER_CHECK:%.*]] ], [ 992, [[VEC_EPILOG_ITER_CHECK]] ]
211; DEFAULT-NEXT:    br label [[LOOP:%.*]]
212; DEFAULT:       loop:
213; DEFAULT-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[VEC_EPILOG_SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
214; DEFAULT-NEXT:    [[X_EXT:%.*]] = zext i16 [[X]] to i64
215; DEFAULT-NEXT:    [[L:%.*]] = load i64, ptr [[SRC]], align 8
216; DEFAULT-NEXT:    [[AND:%.*]] = and i64 [[L]], [[X_EXT]]
217; DEFAULT-NEXT:    [[TRUNC:%.*]] = trunc i64 [[AND]] to i8
218; DEFAULT-NEXT:    [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[IV]]
219; DEFAULT-NEXT:    store i8 [[TRUNC]], ptr [[GEP]], align 1
220; DEFAULT-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
221; DEFAULT-NEXT:    [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 1000
222; DEFAULT-NEXT:    br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP17:![0-9]+]]
223; DEFAULT:       exit:
224; DEFAULT-NEXT:    ret void
225;
226; PRED-LABEL: define void @trunc_store(
227; PRED-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]], i16 [[X:%.*]]) #[[ATTR1:[0-9]+]] {
228; PRED-NEXT:  entry:
229; PRED-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
230; PRED:       vector.memcheck:
231; PRED-NEXT:    [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[DST]], i64 1000
232; PRED-NEXT:    [[SCEVGEP:%.*]] = getelementptr i8, ptr [[SRC]], i64 8
233; PRED-NEXT:    [[BOUND0:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP]]
234; PRED-NEXT:    [[BOUND1:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP1]]
235; PRED-NEXT:    [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
236; PRED-NEXT:    br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
237; PRED:       vector.ph:
238; PRED-NEXT:    [[TMP10:%.*]] = call i64 @llvm.vscale.i64()
239; PRED-NEXT:    [[TMP1:%.*]] = mul i64 [[TMP10]], 2
240; PRED-NEXT:    [[TMP2:%.*]] = sub i64 [[TMP1]], 1
241; PRED-NEXT:    [[N_RND_UP:%.*]] = add i64 1000, [[TMP2]]
242; PRED-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP1]]
243; PRED-NEXT:    [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
244; PRED-NEXT:    [[TMP3:%.*]] = call i64 @llvm.vscale.i64()
245; PRED-NEXT:    [[TMP4:%.*]] = mul i64 [[TMP3]], 2
246; PRED-NEXT:    [[ACTIVE_LANE_MASK_ENTRY:%.*]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 0, i64 1000)
247; PRED-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i16> poison, i16 [[X]], i64 0
248; PRED-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i16> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
249; PRED-NEXT:    [[TMP11:%.*]] = trunc <vscale x 2 x i16> [[BROADCAST_SPLAT]] to <vscale x 2 x i8>
250; PRED-NEXT:    br label [[VECTOR_BODY:%.*]]
251; PRED:       vector.body:
252; PRED-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
253; PRED-NEXT:    [[ACTIVE_LANE_MASK:%.*]] = phi <vscale x 2 x i1> [ [[ACTIVE_LANE_MASK_ENTRY]], [[VECTOR_PH]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], [[VECTOR_BODY]] ]
254; PRED-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 0
255; PRED-NEXT:    [[TMP7:%.*]] = load i64, ptr [[SRC]], align 8, !alias.scope [[META4:![0-9]+]]
256; PRED-NEXT:    [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP7]], i64 0
257; PRED-NEXT:    [[BROADCAST_SPLAT3:%.*]] = shufflevector <vscale x 2 x i64> [[BROADCAST_SPLATINSERT2]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
258; PRED-NEXT:    [[TMP8:%.*]] = trunc <vscale x 2 x i64> [[BROADCAST_SPLAT3]] to <vscale x 2 x i8>
259; PRED-NEXT:    [[TMP9:%.*]] = and <vscale x 2 x i8> [[TMP8]], [[TMP11]]
260; PRED-NEXT:    [[TMP5:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP0]]
261; PRED-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[TMP5]], i32 0
262; PRED-NEXT:    call void @llvm.masked.store.nxv2i8.p0(<vscale x 2 x i8> [[TMP9]], ptr [[TMP6]], i32 1, <vscale x 2 x i1> [[ACTIVE_LANE_MASK]]), !alias.scope [[META7:![0-9]+]], !noalias [[META4]]
263; PRED-NEXT:    [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP4]]
264; PRED-NEXT:    [[ACTIVE_LANE_MASK_NEXT]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 [[INDEX_NEXT]], i64 1000)
265; PRED-NEXT:    [[TMP12:%.*]] = xor <vscale x 2 x i1> [[ACTIVE_LANE_MASK_NEXT]], splat (i1 true)
266; PRED-NEXT:    [[TMP13:%.*]] = extractelement <vscale x 2 x i1> [[TMP12]], i32 0
267; PRED-NEXT:    br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
268; PRED:       middle.block:
269; PRED-NEXT:    br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]]
270; PRED:       scalar.ph:
271; PRED-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[ENTRY:%.*]] ]
272; PRED-NEXT:    br label [[LOOP:%.*]]
273; PRED:       loop:
274; PRED-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
275; PRED-NEXT:    [[X_EXT:%.*]] = zext i16 [[X]] to i64
276; PRED-NEXT:    [[L:%.*]] = load i64, ptr [[SRC]], align 8
277; PRED-NEXT:    [[AND:%.*]] = and i64 [[L]], [[X_EXT]]
278; PRED-NEXT:    [[TRUNC:%.*]] = trunc i64 [[AND]] to i8
279; PRED-NEXT:    [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[IV]]
280; PRED-NEXT:    store i8 [[TRUNC]], ptr [[GEP]], align 1
281; PRED-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
282; PRED-NEXT:    [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 1000
283; PRED-NEXT:    br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP10:![0-9]+]]
284; PRED:       exit:
285; PRED-NEXT:    ret void
286;
287entry:
288  br label %loop
289
290loop:
291  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
292  %x.ext = zext i16 %x to i64
293  %l = load i64, ptr %src, align 8
294  %and = and i64 %l, %x.ext
295  %trunc = trunc i64 %and to i8
296  %gep = getelementptr i8, ptr %dst, i64 %iv
297  store i8 %trunc, ptr %gep, align 1
298  %iv.next = add i64 %iv, 1
299  %ec = icmp eq i64 %iv.next, 1000
300  br i1 %ec, label %exit, label %loop
301
302exit:
303  ret void
304}
305
306attributes #0 = { "target-features"="+sve" }
307attributes #1 = { vscale_range(1,16) "target-features"="+sve" }
308
309
310;.
311; DEFAULT: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
312; DEFAULT: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
313; DEFAULT: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
314; DEFAULT: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]}
315; DEFAULT: [[LOOP4]] = distinct !{[[LOOP4]], [[META2]], [[META1]]}
316; DEFAULT: [[META5]] = !{[[META6:![0-9]+]]}
317; DEFAULT: [[META6]] = distinct !{[[META6]], [[META7:![0-9]+]]}
318; DEFAULT: [[META7]] = distinct !{[[META7]], !"LVerDomain"}
319; DEFAULT: [[META8]] = !{[[META9:![0-9]+]]}
320; DEFAULT: [[META9]] = distinct !{[[META9]], [[META7]]}
321; DEFAULT: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]}
322; DEFAULT: [[META11]] = !{[[META12:![0-9]+]]}
323; DEFAULT: [[META12]] = distinct !{[[META12]], [[META13:![0-9]+]]}
324; DEFAULT: [[META13]] = distinct !{[[META13]], !"LVerDomain"}
325; DEFAULT: [[META14]] = !{[[META15:![0-9]+]]}
326; DEFAULT: [[META15]] = distinct !{[[META15]], [[META13]]}
327; DEFAULT: [[LOOP16]] = distinct !{[[LOOP16]], [[META1]], [[META2]]}
328; DEFAULT: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]]}
329;.
330; PRED: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
331; PRED: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
332; PRED: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
333; PRED: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
334; PRED: [[META4]] = !{[[META5:![0-9]+]]}
335; PRED: [[META5]] = distinct !{[[META5]], [[META6:![0-9]+]]}
336; PRED: [[META6]] = distinct !{[[META6]], !"LVerDomain"}
337; PRED: [[META7]] = !{[[META8:![0-9]+]]}
338; PRED: [[META8]] = distinct !{[[META8]], [[META6]]}
339; PRED: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]], [[META2]]}
340; PRED: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]]}
341;.
342