xref: /llvm-project/llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll (revision fe1b51ffee697642a8e636b597cba7ae9b809245)
1; RUN: opt < %s -passes=loop-vectorize -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue \
2; RUN:   -mtriple aarch64-unknown-linux-gnu -mattr=+sve -S | FileCheck %s
3
4define void @invariant_store_red_exit_is_phi(ptr %dst, ptr readonly %src, i64 %n) {
5; CHECK-LABEL: @invariant_store_red_exit_is_phi(
6; CHECK: vector.ph:
7; CHECK:      %[[N_MINUS_VF:.*]] = sub i64 %n, %[[VSCALE_X_4:.*]]
8; CHECK:      %[[CMP:.*]] = icmp ugt i64 %n, %[[VSCALE_X_4]]
9; CHECK:      %[[N2:.*]] = select i1 %[[CMP]], i64 %[[N_MINUS_VF]], i64 0
10; CHECK:      %[[ACTIVE_LANE_MASK_ENTRY:.*]] = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64 0, i64 %n)
11; CHECK: vector.body:
12; CHECK:      %[[ACTIVE_LANE_MASK:.*]] = phi <vscale x 4 x i1> [ %[[ACTIVE_LANE_MASK_ENTRY]], %vector.ph ], [ %[[ACTIVE_LANE_MASK_NEXT:.*]], %vector.body ]
13; CHECK:      %[[VEC_PHI:.*]] = phi <vscale x 4 x i32> [ zeroinitializer, %vector.ph ], [ %[[PREDPHI:.*]], %vector.body ]
14; CHECK:      %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0
15; CHECK-NEXT: %[[ADD:.*]] = add <vscale x 4 x i32> %[[VEC_PHI]], %[[LOAD]]
16; CHECK-NEXT: %[[SELECT:.*]] = select <vscale x 4 x i1> %[[ACTIVE_LANE_MASK]], <vscale x 4 x i32> %[[ADD]], <vscale x 4 x i32> %[[VEC_PHI]]
17; CHECK:      %[[ACTIVE_LANE_MASK_NEXT]] = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64 %{{.*}}, i64 %[[N2]])
18; CHECK: middle.block:
19; CHECK-NEXT: %[[SUM:.*]] = call i32 @llvm.vector.reduce.add.nxv4i32(<vscale x 4 x i32> %[[SELECT]])
20; CHECK-NEXT: store i32 %[[SUM]], ptr %dst, align 4
21entry:
22  br label %for.body
23
24for.body:                                         ; preds = %entry, %for.inc
25  %red = phi i32 [ 0, %entry ], [ %storemerge, %for.body ]
26  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
27  %arrayidx6 = getelementptr inbounds i32, ptr %src, i64 %indvars.iv
28  %load = load i32, ptr %arrayidx6, align 4
29  %storemerge = add i32 %red, %load
30  store i32 %storemerge, ptr %dst, align 4
31  %indvars.iv.next = add nsw i64 %indvars.iv, 1
32  %exitcond.not = icmp eq i64 %indvars.iv.next, %n
33  br i1 %exitcond.not, label %for.end.loopexit, label %for.body, !llvm.loop !0
34
35for.end.loopexit:                                 ; preds = %for.inc
36  br label %for.end
37
38for.end:                                          ; preds = %for.end.loopexit
39  ret void
40}
41
42!0 = distinct !{!0, !1, !2, !3, !4}
43!1 = !{!"llvm.loop.vectorize.width", i32 4}
44!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
45!3 = !{!"llvm.loop.interleave.count", i32 1}
46!4 = !{!"llvm.loop.vectorize.enable", i1 true}
47