1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -mtriple=aarch64 -passes=loop-vectorize --force-vector-interleave=1 -S | FileCheck %s 3 4target triple = "aarch64-unknown-linux-gnu" 5 6; The test checks that scalarized code is not generated for SVE. 7; It creates a scenario where the gep instruction is used outside 8; the loop, preventing the gep (and consequently the loop induction 9; update variable) from being classified as 'uniform'. 10 11define void @test_no_scalarization(ptr %a, ptr noalias %b, i32 %idx, i32 %n) #0 { 12; CHECK-LABEL: @test_no_scalarization( 13; CHECK-NEXT: L.entry: 14; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[IDX:%.*]], 1 15; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 [[TMP0]]) 16; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[SMAX]], [[IDX]] 17; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vscale.i32() 18; CHECK-NEXT: [[TMP3:%.*]] = mul i32 [[TMP2]], 2 19; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP1]], [[TMP3]] 20; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 21; CHECK: vector.ph: 22; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vscale.i32() 23; CHECK-NEXT: [[TMP5:%.*]] = mul i32 [[TMP4]], 2 24; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP1]], [[TMP5]] 25; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP1]], [[N_MOD_VF]] 26; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vscale.i32() 27; CHECK-NEXT: [[TMP7:%.*]] = mul i32 [[TMP6]], 2 28; CHECK-NEXT: [[IND_END:%.*]] = add i32 [[IDX]], [[N_VEC]] 29; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i32> poison, i32 [[IDX]], i64 0 30; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i32> [[DOTSPLATINSERT]], <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer 31; CHECK-NEXT: [[TMP8:%.*]] = call <vscale x 2 x i32> @llvm.stepvector.nxv2i32() 32; CHECK-NEXT: [[TMP10:%.*]] = mul <vscale x 2 x i32> [[TMP8]], splat (i32 1) 33; CHECK-NEXT: [[INDUCTION:%.*]] = add <vscale x 2 x i32> [[DOTSPLAT]], [[TMP10]] 34; CHECK-NEXT: [[TMP13:%.*]] = mul i32 1, [[TMP7]] 35; CHECK-NEXT: [[DOTSPLATINSERT1:%.*]] = insertelement <vscale x 2 x i32> poison, i32 [[TMP13]], i64 0 36; CHECK-NEXT: [[DOTSPLAT2:%.*]] = shufflevector <vscale x 2 x i32> [[DOTSPLATINSERT1]], <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer 37; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 38; CHECK: vector.body: 39; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 40; CHECK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i32> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] 41; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i32 [[IDX]], [[INDEX]] 42; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[OFFSET_IDX]], 0 43; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i64, ptr [[A:%.*]], <vscale x 2 x i32> [[VEC_IND]] 44; CHECK-NEXT: [[TMP16:%.*]] = extractelement <vscale x 2 x ptr> [[TMP15]], i32 0 45; CHECK-NEXT: [[TMP17:%.*]] = getelementptr double, ptr [[TMP16]], i32 0 46; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 2 x double>, ptr [[TMP17]], align 8 47; CHECK-NEXT: [[TMP18:%.*]] = getelementptr i64, ptr [[B:%.*]], i32 [[TMP14]] 48; CHECK-NEXT: [[TMP19:%.*]] = getelementptr double, ptr [[TMP18]], i32 0 49; CHECK-NEXT: store <vscale x 2 x double> [[WIDE_LOAD]], ptr [[TMP19]], align 8 50; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], [[TMP7]] 51; CHECK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 2 x i32> [[VEC_IND]], [[DOTSPLAT2]] 52; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 53; CHECK-NEXT: br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 54; CHECK: middle.block: 55; CHECK-NEXT: [[TMP21:%.*]] = call i32 @llvm.vscale.i32() 56; CHECK-NEXT: [[TMP22:%.*]] = mul i32 [[TMP21]], 2 57; CHECK-NEXT: [[TMP23:%.*]] = sub i32 [[TMP22]], 1 58; CHECK-NEXT: [[TMP24:%.*]] = extractelement <vscale x 2 x ptr> [[TMP15]], i32 [[TMP23]] 59; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP1]], [[N_VEC]] 60; CHECK-NEXT: br i1 [[CMP_N]], label [[L_EXIT:%.*]], label [[SCALAR_PH]] 61; CHECK: scalar.ph: 62; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[IDX]], [[L_ENTRY:%.*]] ] 63; CHECK-NEXT: br label [[L_LOOPBODY:%.*]] 64; CHECK: L.LoopBody: 65; CHECK-NEXT: [[INDVAR:%.*]] = phi i32 [ [[INDVAR_NEXT:%.*]], [[L_LOOPBODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 66; CHECK-NEXT: [[INDVAR_NEXT]] = add nsw i32 [[INDVAR]], 1 67; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i64, ptr [[A]], i32 [[INDVAR]] 68; CHECK-NEXT: [[TMP26:%.*]] = load double, ptr [[TMP25]], align 8 69; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr i64, ptr [[B]], i32 [[INDVAR]] 70; CHECK-NEXT: store double [[TMP26]], ptr [[GEP_B]], align 8 71; CHECK-NEXT: [[TMP27:%.*]] = icmp slt i32 [[INDVAR_NEXT]], [[N]] 72; CHECK-NEXT: br i1 [[TMP27]], label [[L_LOOPBODY]], label [[L_EXIT]], !llvm.loop [[LOOP3:![0-9]+]] 73; CHECK: L.exit: 74; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi ptr [ [[TMP25]], [[L_LOOPBODY]] ], [ [[TMP24]], [[MIDDLE_BLOCK]] ] 75; CHECK-NEXT: store i64 1, ptr [[DOTLCSSA]], align 8 76; CHECK-NEXT: ret void 77; 78L.entry: 79 br label %L.LoopBody 80 81L.LoopBody: ; preds = %L.LoopBody, %L.entry 82 %indvar = phi i32 [ %indvar.next, %L.LoopBody ], [ %idx, %L.entry ] 83 %indvar.next = add nsw i32 %indvar, 1 84 %0 = getelementptr i64, ptr %a, i32 %indvar 85 %1 = load double, ptr %0, align 8 86 %gep.b = getelementptr i64, ptr %b, i32 %indvar 87 store double %1, ptr %gep.b 88 %2 = icmp slt i32 %indvar.next, %n 89 br i1 %2, label %L.LoopBody, label %L.exit 90 91L.exit: ; preds = %L.LoopBody 92 store i64 1, ptr %0, align 8 93 ret void 94} 95 96attributes #0 = { nofree norecurse noreturn nosync nounwind "target-features"="+sve" } 97 98