xref: /llvm-project/llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll (revision 4ad0fdd1631eeae432714c03ede01a10dc00025d) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes=loop-vectorize -S -prefer-predicate-over-epilogue=scalar-epilogue < %s | FileCheck %s
3
4target triple = "aarch64-unknown-linux-gnu"
5
6; Test cases for PR60831.
7
8define void @test_invar_gep(ptr %dst) #0 {
9; CHECK-LABEL: @test_invar_gep(
10; CHECK-NEXT:  entry:
11; CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
12; CHECK-NEXT:    [[TMP1:%.*]] = mul i64 [[TMP0]], 4
13; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
14; CHECK:       vector.ph:
15; CHECK-NEXT:    [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
16; CHECK-NEXT:    [[TMP3:%.*]] = mul i64 [[TMP2]], 4
17; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 100, [[TMP3]]
18; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]]
19; CHECK-NEXT:    [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
20; CHECK-NEXT:    [[TMP5:%.*]] = mul i64 [[TMP4]], 4
21; CHECK-NEXT:    [[TMP14:%.*]] = getelementptr i8, ptr [[DST:%.*]], i64 0
22; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
23; CHECK:       vector.body:
24; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
25; CHECK-NEXT:    [[TMP6:%.*]] = call <vscale x 4 x i64> @llvm.stepvector.nxv4i64()
26; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[INDEX]], i64 0
27; CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i64> [[DOTSPLATINSERT]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
28; CHECK-NEXT:    [[TMP7:%.*]] = add <vscale x 4 x i64> zeroinitializer, [[TMP6]]
29; CHECK-NEXT:    [[TMP8:%.*]] = mul <vscale x 4 x i64> [[TMP7]], splat (i64 1)
30; CHECK-NEXT:    [[TMP9:%.*]] = add <vscale x 4 x i64> [[DOTSPLAT]], [[TMP8]]
31; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 0
32; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 1
33; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 2
34; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 3
35; CHECK-NEXT:    [[TMP15:%.*]] = call i32 @llvm.vscale.i32()
36; CHECK-NEXT:    [[TMP16:%.*]] = mul i32 [[TMP15]], 4
37; CHECK-NEXT:    [[TMP17:%.*]] = sub i32 [[TMP16]], 1
38; CHECK-NEXT:    [[TMP18:%.*]] = extractelement <vscale x 4 x i64> [[TMP9]], i32 [[TMP17]]
39; CHECK-NEXT:    store i64 [[TMP18]], ptr [[TMP14]], align 1
40; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP5]]
41; CHECK-NEXT:    [[TMP19:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
42; CHECK-NEXT:    br i1 [[TMP19]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
43; CHECK:       middle.block:
44; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]]
45; CHECK-NEXT:    br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
46; CHECK:       scalar.ph:
47; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
48; CHECK-NEXT:    br label [[LOOP:%.*]]
49; CHECK:       loop:
50; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
51; CHECK-NEXT:    [[GEP_INVAR:%.*]] = getelementptr i8, ptr [[DST]], i64 0
52; CHECK-NEXT:    store i64 [[IV]], ptr [[GEP_INVAR]], align 1
53; CHECK-NEXT:    [[IV_NEXT]] = add nsw i64 [[IV]], 1
54; CHECK-NEXT:    [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 100
55; CHECK-NEXT:    br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP4:![0-9]+]]
56; CHECK:       exit:
57; CHECK-NEXT:    ret void
58;
59entry:
60  br label %loop
61
62loop:
63  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
64  %gep.invar = getelementptr i8, ptr %dst, i64 0
65  store i64 %iv, ptr %gep.invar, align 1
66  %iv.next = add nsw i64 %iv, 1
67  %ec = icmp eq i64 %iv.next, 100
68  br i1 %ec, label %exit, label %loop, !llvm.loop !0
69
70exit:
71  ret void
72}
73
74define void @test_loop2(i64 %n, ptr %dst) {
75; CHECK-LABEL: @test_loop2(
76; CHECK-NEXT:  iter.check:
77; CHECK-NEXT:    br i1 false, label [[VEC_EPILOG_SCALAR_PH:%.*]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]
78; CHECK:       vector.main.loop.iter.check:
79; CHECK-NEXT:    br i1 false, label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]
80; CHECK:       vector.ph:
81; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
82; CHECK:       vector.body:
83; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
84; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 0
85; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[INDEX]], 1
86; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 2
87; CHECK-NEXT:    [[TMP3:%.*]] = add i64 [[INDEX]], 3
88; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 4
89; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[INDEX]], 5
90; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 6
91; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[INDEX]], 7
92; CHECK-NEXT:    [[TMP8:%.*]] = add i64 [[INDEX]], 8
93; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], 9
94; CHECK-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 10
95; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 11
96; CHECK-NEXT:    [[TMP12:%.*]] = add i64 [[INDEX]], 12
97; CHECK-NEXT:    [[TMP13:%.*]] = add i64 [[INDEX]], 13
98; CHECK-NEXT:    [[TMP14:%.*]] = add i64 [[INDEX]], 14
99; CHECK-NEXT:    [[TMP15:%.*]] = add i64 [[INDEX]], 15
100; CHECK-NEXT:    [[TMP16:%.*]] = sub nsw i64 [[N:%.*]], [[TMP0]]
101; CHECK-NEXT:    [[TMP17:%.*]] = sub nsw i64 [[N]], [[TMP1]]
102; CHECK-NEXT:    [[TMP18:%.*]] = sub nsw i64 [[N]], [[TMP2]]
103; CHECK-NEXT:    [[TMP19:%.*]] = sub nsw i64 [[N]], [[TMP3]]
104; CHECK-NEXT:    [[TMP20:%.*]] = sub nsw i64 [[N]], [[TMP4]]
105; CHECK-NEXT:    [[TMP21:%.*]] = sub nsw i64 [[N]], [[TMP5]]
106; CHECK-NEXT:    [[TMP22:%.*]] = sub nsw i64 [[N]], [[TMP6]]
107; CHECK-NEXT:    [[TMP23:%.*]] = sub nsw i64 [[N]], [[TMP7]]
108; CHECK-NEXT:    [[TMP24:%.*]] = sub nsw i64 [[N]], [[TMP8]]
109; CHECK-NEXT:    [[TMP25:%.*]] = sub nsw i64 [[N]], [[TMP9]]
110; CHECK-NEXT:    [[TMP26:%.*]] = sub nsw i64 [[N]], [[TMP10]]
111; CHECK-NEXT:    [[TMP27:%.*]] = sub nsw i64 [[N]], [[TMP11]]
112; CHECK-NEXT:    [[TMP28:%.*]] = sub nsw i64 [[N]], [[TMP12]]
113; CHECK-NEXT:    [[TMP29:%.*]] = sub nsw i64 [[N]], [[TMP13]]
114; CHECK-NEXT:    [[TMP30:%.*]] = sub nsw i64 [[N]], [[TMP14]]
115; CHECK-NEXT:    [[TMP31:%.*]] = sub nsw i64 [[N]], [[TMP15]]
116; CHECK-NEXT:    [[TMP32:%.*]] = insertelement <16 x i64> poison, i64 [[TMP16]], i32 0
117; CHECK-NEXT:    [[TMP33:%.*]] = insertelement <16 x i64> [[TMP32]], i64 [[TMP17]], i32 1
118; CHECK-NEXT:    [[TMP34:%.*]] = insertelement <16 x i64> [[TMP33]], i64 [[TMP18]], i32 2
119; CHECK-NEXT:    [[TMP35:%.*]] = insertelement <16 x i64> [[TMP34]], i64 [[TMP19]], i32 3
120; CHECK-NEXT:    [[TMP36:%.*]] = insertelement <16 x i64> [[TMP35]], i64 [[TMP20]], i32 4
121; CHECK-NEXT:    [[TMP37:%.*]] = insertelement <16 x i64> [[TMP36]], i64 [[TMP21]], i32 5
122; CHECK-NEXT:    [[TMP38:%.*]] = insertelement <16 x i64> [[TMP37]], i64 [[TMP22]], i32 6
123; CHECK-NEXT:    [[TMP39:%.*]] = insertelement <16 x i64> [[TMP38]], i64 [[TMP23]], i32 7
124; CHECK-NEXT:    [[TMP40:%.*]] = insertelement <16 x i64> [[TMP39]], i64 [[TMP24]], i32 8
125; CHECK-NEXT:    [[TMP41:%.*]] = insertelement <16 x i64> [[TMP40]], i64 [[TMP25]], i32 9
126; CHECK-NEXT:    [[TMP42:%.*]] = insertelement <16 x i64> [[TMP41]], i64 [[TMP26]], i32 10
127; CHECK-NEXT:    [[TMP43:%.*]] = insertelement <16 x i64> [[TMP42]], i64 [[TMP27]], i32 11
128; CHECK-NEXT:    [[TMP44:%.*]] = insertelement <16 x i64> [[TMP43]], i64 [[TMP28]], i32 12
129; CHECK-NEXT:    [[TMP45:%.*]] = insertelement <16 x i64> [[TMP44]], i64 [[TMP29]], i32 13
130; CHECK-NEXT:    [[TMP46:%.*]] = insertelement <16 x i64> [[TMP45]], i64 [[TMP30]], i32 14
131; CHECK-NEXT:    [[TMP47:%.*]] = insertelement <16 x i64> [[TMP46]], i64 [[TMP31]], i32 15
132; CHECK-NEXT:    [[TMP48:%.*]] = trunc <16 x i64> [[TMP47]] to <16 x i8>
133; CHECK-NEXT:    [[TMP49:%.*]] = add i64 [[TMP0]], [[TMP16]]
134; CHECK-NEXT:    [[TMP50:%.*]] = getelementptr i8, ptr [[DST:%.*]], i64 [[TMP49]]
135; CHECK-NEXT:    [[TMP51:%.*]] = extractelement <16 x i8> [[TMP48]], i32 15
136; CHECK-NEXT:    store i8 [[TMP51]], ptr [[TMP50]], align 1
137; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16
138; CHECK-NEXT:    [[TMP52:%.*]] = icmp eq i64 [[INDEX_NEXT]], 992
139; CHECK-NEXT:    br i1 [[TMP52]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
140; CHECK:       middle.block:
141; CHECK-NEXT:    br i1 false, label [[EXIT:%.*]], label [[VEC_EPILOG_ITER_CHECK:%.*]]
142; CHECK:       vec.epilog.iter.check:
143; CHECK-NEXT:    br i1 false, label [[VEC_EPILOG_SCALAR_PH]], label [[VEC_EPILOG_PH]]
144; CHECK:       vec.epilog.ph:
145; CHECK-NEXT:    [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ 992, [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MAIN_LOOP_ITER_CHECK]] ]
146; CHECK-NEXT:    br label [[VEC_EPILOG_VECTOR_BODY:%.*]]
147; CHECK:       vec.epilog.vector.body:
148; CHECK-NEXT:    [[INDEX2:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], [[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT3:%.*]], [[VEC_EPILOG_VECTOR_BODY]] ]
149; CHECK-NEXT:    [[TMP53:%.*]] = add i64 [[INDEX2]], 0
150; CHECK-NEXT:    [[TMP54:%.*]] = add i64 [[INDEX2]], 1
151; CHECK-NEXT:    [[TMP55:%.*]] = add i64 [[INDEX2]], 2
152; CHECK-NEXT:    [[TMP56:%.*]] = add i64 [[INDEX2]], 3
153; CHECK-NEXT:    [[TMP57:%.*]] = add i64 [[INDEX2]], 4
154; CHECK-NEXT:    [[TMP58:%.*]] = add i64 [[INDEX2]], 5
155; CHECK-NEXT:    [[TMP59:%.*]] = add i64 [[INDEX2]], 6
156; CHECK-NEXT:    [[TMP60:%.*]] = add i64 [[INDEX2]], 7
157; CHECK-NEXT:    [[TMP61:%.*]] = sub nsw i64 [[N]], [[TMP53]]
158; CHECK-NEXT:    [[TMP62:%.*]] = sub nsw i64 [[N]], [[TMP54]]
159; CHECK-NEXT:    [[TMP63:%.*]] = sub nsw i64 [[N]], [[TMP55]]
160; CHECK-NEXT:    [[TMP64:%.*]] = sub nsw i64 [[N]], [[TMP56]]
161; CHECK-NEXT:    [[TMP65:%.*]] = sub nsw i64 [[N]], [[TMP57]]
162; CHECK-NEXT:    [[TMP66:%.*]] = sub nsw i64 [[N]], [[TMP58]]
163; CHECK-NEXT:    [[TMP67:%.*]] = sub nsw i64 [[N]], [[TMP59]]
164; CHECK-NEXT:    [[TMP68:%.*]] = sub nsw i64 [[N]], [[TMP60]]
165; CHECK-NEXT:    [[TMP69:%.*]] = insertelement <8 x i64> poison, i64 [[TMP61]], i32 0
166; CHECK-NEXT:    [[TMP70:%.*]] = insertelement <8 x i64> [[TMP69]], i64 [[TMP62]], i32 1
167; CHECK-NEXT:    [[TMP71:%.*]] = insertelement <8 x i64> [[TMP70]], i64 [[TMP63]], i32 2
168; CHECK-NEXT:    [[TMP72:%.*]] = insertelement <8 x i64> [[TMP71]], i64 [[TMP64]], i32 3
169; CHECK-NEXT:    [[TMP73:%.*]] = insertelement <8 x i64> [[TMP72]], i64 [[TMP65]], i32 4
170; CHECK-NEXT:    [[TMP74:%.*]] = insertelement <8 x i64> [[TMP73]], i64 [[TMP66]], i32 5
171; CHECK-NEXT:    [[TMP75:%.*]] = insertelement <8 x i64> [[TMP74]], i64 [[TMP67]], i32 6
172; CHECK-NEXT:    [[TMP76:%.*]] = insertelement <8 x i64> [[TMP75]], i64 [[TMP68]], i32 7
173; CHECK-NEXT:    [[TMP77:%.*]] = trunc <8 x i64> [[TMP76]] to <8 x i8>
174; CHECK-NEXT:    [[TMP78:%.*]] = add i64 [[TMP53]], [[TMP61]]
175; CHECK-NEXT:    [[TMP79:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP78]]
176; CHECK-NEXT:    [[TMP80:%.*]] = extractelement <8 x i8> [[TMP77]], i32 7
177; CHECK-NEXT:    store i8 [[TMP80]], ptr [[TMP79]], align 1
178; CHECK-NEXT:    [[INDEX_NEXT3]] = add nuw i64 [[INDEX2]], 8
179; CHECK-NEXT:    [[TMP81:%.*]] = icmp eq i64 [[INDEX_NEXT3]], 1000
180; CHECK-NEXT:    br i1 [[TMP81]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
181; CHECK:       vec.epilog.middle.block:
182; CHECK-NEXT:    br i1 false, label [[EXIT]], label [[VEC_EPILOG_SCALAR_PH]]
183; CHECK:       vec.epilog.scalar.ph:
184; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ 1000, [[VEC_EPILOG_MIDDLE_BLOCK]] ], [ 0, [[ITER_CHECK:%.*]] ], [ 992, [[VEC_EPILOG_ITER_CHECK]] ]
185; CHECK-NEXT:    br label [[LOOP:%.*]]
186; CHECK:       loop:
187; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[VEC_EPILOG_SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
188; CHECK-NEXT:    [[SUB_N:%.*]] = sub nsw i64 [[N]], [[IV]]
189; CHECK-NEXT:    [[SUB_N_TRUNC:%.*]] = trunc i64 [[SUB_N]] to i8
190; CHECK-NEXT:    [[ADD:%.*]] = add i64 [[IV]], [[SUB_N]]
191; CHECK-NEXT:    [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[ADD]]
192; CHECK-NEXT:    store i8 [[SUB_N_TRUNC]], ptr [[GEP]], align 1
193; CHECK-NEXT:    [[IV_NEXT]] = add nsw i64 [[IV]], 1
194; CHECK-NEXT:    [[C:%.*]] = icmp sle i64 [[IV_NEXT]], 1000
195; CHECK-NEXT:    br i1 [[C]], label [[LOOP]], label [[EXIT]], !llvm.loop [[LOOP7:![0-9]+]]
196; CHECK:       exit:
197; CHECK-NEXT:    ret void
198;
199entry:
200  br label %loop
201
202loop:
203  %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
204  %sub.n = sub nsw i64 %n, %iv
205  %sub.n.trunc = trunc i64 %sub.n to i8
206  %add = add i64 %iv, %sub.n
207  %gep = getelementptr i8, ptr %dst, i64 %add
208  store i8 %sub.n.trunc, ptr %gep, align 1
209  %iv.next = add nsw i64 %iv, 1
210  %c = icmp sle i64 %iv.next, 1000
211  br i1 %c, label %loop, label %exit
212
213exit:
214  ret void
215}
216
217attributes #0 = { "target-features"="+neon,+sve" vscale_range(1, 16) }
218
219!0 = distinct !{!0, !1, !2, !3, !4, !5}
220!1 = !{!"llvm.loop.mustprogress"}
221!2 = !{!"llvm.loop.vectorize.width", i32 4}
222!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
223!4 = !{!"llvm.loop.vectorize.enable", i1 true}
224!5 = !{!"llvm.loop.interleave.count", i32 1}
225
226