1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt -p loop-vectorize -S %s | FileCheck --check-prefix=DEFAULT %s 3; RUN: opt -p loop-vectorize -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue -S %s | FileCheck --check-prefix=PRED %s 4 5target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" 6target triple = "arm64-apple-macosx14.0.0" 7 8define void @invar_cond_gep_store(ptr %dst, i32 %0) { 9; DEFAULT-LABEL: define void @invar_cond_gep_store( 10; DEFAULT-SAME: ptr [[DST:%.*]], i32 [[TMP0:%.*]]) { 11; DEFAULT-NEXT: entry: 12; DEFAULT-NEXT: br label [[LOOP_HEADER:%.*]] 13; DEFAULT: loop.header: 14; DEFAULT-NEXT: [[IV:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 15; DEFAULT-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 16; DEFAULT-NEXT: [[CMP9:%.*]] = icmp eq i32 [[TMP0]], 0 17; DEFAULT-NEXT: br i1 [[CMP9]], label [[THEN:%.*]], label [[LOOP_LATCH]] 18; DEFAULT: then: 19; DEFAULT-NEXT: [[GEP:%.*]] = getelementptr i32, ptr [[DST]], i64 [[IV_NEXT]] 20; DEFAULT-NEXT: store i32 1, ptr [[GEP]], align 4 21; DEFAULT-NEXT: br label [[LOOP_LATCH]] 22; DEFAULT: loop.latch: 23; DEFAULT-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 100 24; DEFAULT-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP_HEADER]] 25; DEFAULT: exit: 26; DEFAULT-NEXT: ret void 27; 28; PRED-LABEL: define void @invar_cond_gep_store( 29; PRED-SAME: ptr [[DST:%.*]], i32 [[TMP0:%.*]]) { 30; PRED-NEXT: entry: 31; PRED-NEXT: br label [[LOOP_HEADER:%.*]] 32; PRED: loop.header: 33; PRED-NEXT: [[IV:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 34; PRED-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 35; PRED-NEXT: [[CMP9:%.*]] = icmp eq i32 [[TMP0]], 0 36; PRED-NEXT: br i1 [[CMP9]], label [[THEN:%.*]], label [[LOOP_LATCH]] 37; PRED: then: 38; PRED-NEXT: [[GEP:%.*]] = getelementptr i32, ptr [[DST]], i64 [[IV_NEXT]] 39; PRED-NEXT: store i32 1, ptr [[GEP]], align 4 40; PRED-NEXT: br label [[LOOP_LATCH]] 41; PRED: loop.latch: 42; PRED-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 100 43; PRED-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP_HEADER]] 44; PRED: exit: 45; PRED-NEXT: ret void 46; 47entry: 48 br label %loop.header 49 50loop.header: 51 %iv = phi i64 [ 1, %entry ], [ %iv.next, %loop.latch ] 52 %iv.next = add i64 %iv, 1 53 %cmp9 = icmp eq i32 %0, 0 54 br i1 %cmp9, label %then, label %loop.latch 55 56then: 57 %gep = getelementptr i32, ptr %dst, i64 %iv.next 58 store i32 1, ptr %gep, align 4 59 br label %loop.latch 60 61loop.latch: 62 %ec = icmp eq i64 %iv, 100 63 br i1 %ec, label %exit, label %loop.header 64 65exit: 66 ret void 67} 68 69declare double @llvm.fabs.f64(double) #0 70 71define void @loop_dependent_cond(ptr %src, ptr noalias %dst, i64 %N) { 72; DEFAULT-LABEL: define void @loop_dependent_cond( 73; DEFAULT-SAME: ptr [[SRC:%.*]], ptr noalias [[DST:%.*]], i64 [[N:%.*]]) { 74; DEFAULT-NEXT: entry: 75; DEFAULT-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1 76; DEFAULT-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 4 77; DEFAULT-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 78; DEFAULT: vector.ph: 79; DEFAULT-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 4 80; DEFAULT-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] 81; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]] 82; DEFAULT: vector.body: 83; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE7:%.*]] ] 84; DEFAULT-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 0 85; DEFAULT-NEXT: [[TMP3:%.*]] = getelementptr double, ptr [[SRC]], i64 [[TMP1]] 86; DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr double, ptr [[TMP3]], i32 0 87; DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr double, ptr [[TMP3]], i32 2 88; DEFAULT-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP5]], align 8 89; DEFAULT-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x double>, ptr [[TMP6]], align 8 90; DEFAULT-NEXT: [[TMP7:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> [[WIDE_LOAD]]) 91; DEFAULT-NEXT: [[TMP8:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> [[WIDE_LOAD1]]) 92; DEFAULT-NEXT: [[TMP9:%.*]] = fcmp ogt <2 x double> [[TMP7]], splat (double 1.000000e+00) 93; DEFAULT-NEXT: [[TMP10:%.*]] = fcmp ogt <2 x double> [[TMP8]], splat (double 1.000000e+00) 94; DEFAULT-NEXT: [[TMP11:%.*]] = extractelement <2 x i1> [[TMP9]], i32 0 95; DEFAULT-NEXT: br i1 [[TMP11]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 96; DEFAULT: pred.store.if: 97; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 98; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE]] 99; DEFAULT: pred.store.continue: 100; DEFAULT-NEXT: [[TMP12:%.*]] = extractelement <2 x i1> [[TMP9]], i32 1 101; DEFAULT-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF2:%.*]], label [[PRED_STORE_CONTINUE3:%.*]] 102; DEFAULT: pred.store.if2: 103; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 104; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE3]] 105; DEFAULT: pred.store.continue3: 106; DEFAULT-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP10]], i32 0 107; DEFAULT-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF4:%.*]], label [[PRED_STORE_CONTINUE5:%.*]] 108; DEFAULT: pred.store.if4: 109; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 110; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE5]] 111; DEFAULT: pred.store.continue5: 112; DEFAULT-NEXT: [[TMP14:%.*]] = extractelement <2 x i1> [[TMP10]], i32 1 113; DEFAULT-NEXT: br i1 [[TMP14]], label [[PRED_STORE_IF6:%.*]], label [[PRED_STORE_CONTINUE7]] 114; DEFAULT: pred.store.if6: 115; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 116; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE7]] 117; DEFAULT: pred.store.continue7: 118; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 119; DEFAULT-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 120; DEFAULT-NEXT: br i1 [[TMP15]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 121; DEFAULT: middle.block: 122; DEFAULT-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] 123; DEFAULT-NEXT: br i1 [[CMP_N]], label [[FOR_END123:%.*]], label [[SCALAR_PH]] 124; DEFAULT: scalar.ph: 125; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 126; DEFAULT-NEXT: br label [[FOR_BODY112:%.*]] 127; DEFAULT: loop.header: 128; DEFAULT-NEXT: [[IV175:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT176:%.*]], [[FOR_INC121:%.*]] ] 129; DEFAULT-NEXT: [[ARRAYIDX114:%.*]] = getelementptr double, ptr [[SRC]], i64 [[IV175]] 130; DEFAULT-NEXT: [[TMP16:%.*]] = load double, ptr [[ARRAYIDX114]], align 8 131; DEFAULT-NEXT: [[TMP17:%.*]] = tail call double @llvm.fabs.f64(double [[TMP16]]) 132; DEFAULT-NEXT: [[CMP115:%.*]] = fcmp ogt double [[TMP17]], 1.000000e+00 133; DEFAULT-NEXT: br i1 [[CMP115]], label [[IF_THEN117:%.*]], label [[FOR_INC121]] 134; DEFAULT: then: 135; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 136; DEFAULT-NEXT: br label [[FOR_INC121]] 137; DEFAULT: loop.latch: 138; DEFAULT-NEXT: [[IV_NEXT176]] = add i64 [[IV175]], 1 139; DEFAULT-NEXT: [[EXITCOND180_NOT:%.*]] = icmp eq i64 [[IV175]], [[N]] 140; DEFAULT-NEXT: br i1 [[EXITCOND180_NOT]], label [[FOR_END123]], label [[FOR_BODY112]], !llvm.loop [[LOOP3:![0-9]+]] 141; DEFAULT: exit: 142; DEFAULT-NEXT: ret void 143; 144; PRED-LABEL: define void @loop_dependent_cond( 145; PRED-SAME: ptr [[SRC:%.*]], ptr noalias [[DST:%.*]], i64 [[N:%.*]]) { 146; PRED-NEXT: entry: 147; PRED-NEXT: br label [[FOR_BODY112:%.*]] 148; PRED: loop.header: 149; PRED-NEXT: [[IV175:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT176:%.*]], [[FOR_INC121:%.*]] ] 150; PRED-NEXT: [[ARRAYIDX114:%.*]] = getelementptr double, ptr [[SRC]], i64 [[IV175]] 151; PRED-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX114]], align 8 152; PRED-NEXT: [[TMP1:%.*]] = tail call double @llvm.fabs.f64(double [[TMP0]]) 153; PRED-NEXT: [[CMP115:%.*]] = fcmp ogt double [[TMP1]], 1.000000e+00 154; PRED-NEXT: br i1 [[CMP115]], label [[IF_THEN117:%.*]], label [[FOR_INC121]] 155; PRED: then: 156; PRED-NEXT: store i32 0, ptr [[DST]], align 4 157; PRED-NEXT: br label [[FOR_INC121]] 158; PRED: loop.latch: 159; PRED-NEXT: [[IV_NEXT176]] = add i64 [[IV175]], 1 160; PRED-NEXT: [[EXITCOND180_NOT:%.*]] = icmp eq i64 [[IV175]], [[N]] 161; PRED-NEXT: br i1 [[EXITCOND180_NOT]], label [[FOR_END123:%.*]], label [[FOR_BODY112]] 162; PRED: exit: 163; PRED-NEXT: ret void 164; 165entry: 166 br label %loop.header 167 168loop.header: 169 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] 170 %gep = getelementptr double, ptr %src, i64 %iv 171 %l = load double, ptr %gep, align 8 172 %abs = tail call double @llvm.fabs.f64(double %l) 173 %cmp = fcmp ogt double %abs, 1.000000e+00 174 br i1 %cmp, label %then, label %loop.latch 175 176then: 177 store i32 0, ptr %dst, align 4 178 br label %loop.latch 179 180loop.latch: 181 %iv.next = add i64 %iv, 1 182 %ec = icmp eq i64 %iv, %N 183 br i1 %ec, label %exit, label %loop.header 184 185exit: 186 ret void 187} 188 189define void @invar_cond_chain_1(ptr %I, ptr noalias %src, i1 %c) { 190; DEFAULT-LABEL: define void @invar_cond_chain_1( 191; DEFAULT-SAME: ptr [[I:%.*]], ptr noalias [[SRC:%.*]], i1 [[C:%.*]]) { 192; DEFAULT-NEXT: entry: 193; DEFAULT-NEXT: br label [[FOR_BODY313:%.*]] 194; DEFAULT: loop.header: 195; DEFAULT-NEXT: [[__BEGIN3_011973:%.*]] = phi ptr [ [[SRC]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR329:%.*]], [[IF_END327:%.*]] ] 196; DEFAULT-NEXT: [[TMP28:%.*]] = load i32, ptr [[__BEGIN3_011973]], align 4 197; DEFAULT-NEXT: br i1 true, label [[IF_ELSE321:%.*]], label [[IF_THEN316:%.*]] 198; DEFAULT: if: 199; DEFAULT-NEXT: br label [[IF_END327_SINK_SPLIT:%.*]] 200; DEFAULT: else.1: 201; DEFAULT-NEXT: br i1 [[C]], label [[IF_THEN323:%.*]], label [[IF_END327]] 202; DEFAULT: else.2: 203; DEFAULT-NEXT: br label [[IF_END327_SINK_SPLIT]] 204; DEFAULT: split: 205; DEFAULT-NEXT: store i32 [[TMP28]], ptr [[I]], align 4 206; DEFAULT-NEXT: br label [[IF_END327]] 207; DEFAULT: loop.latch: 208; DEFAULT-NEXT: [[INCDEC_PTR329]] = getelementptr inbounds i8, ptr [[__BEGIN3_011973]], i64 4 209; DEFAULT-NEXT: [[CMP311_NOT:%.*]] = icmp eq ptr [[__BEGIN3_011973]], [[I]] 210; DEFAULT-NEXT: br i1 [[CMP311_NOT]], label [[EXIT:%.*]], label [[FOR_BODY313]] 211; DEFAULT: exit: 212; DEFAULT-NEXT: ret void 213; 214; PRED-LABEL: define void @invar_cond_chain_1( 215; PRED-SAME: ptr [[I:%.*]], ptr noalias [[SRC:%.*]], i1 [[C:%.*]]) { 216; PRED-NEXT: entry: 217; PRED-NEXT: br label [[FOR_BODY313:%.*]] 218; PRED: loop.header: 219; PRED-NEXT: [[__BEGIN3_011973:%.*]] = phi ptr [ [[SRC]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR329:%.*]], [[IF_END327:%.*]] ] 220; PRED-NEXT: [[TMP0:%.*]] = load i32, ptr [[__BEGIN3_011973]], align 4 221; PRED-NEXT: br i1 true, label [[IF_ELSE321:%.*]], label [[IF_THEN316:%.*]] 222; PRED: if: 223; PRED-NEXT: br label [[IF_END327_SINK_SPLIT:%.*]] 224; PRED: else.1: 225; PRED-NEXT: br i1 [[C]], label [[IF_THEN323:%.*]], label [[IF_END327]] 226; PRED: else.2: 227; PRED-NEXT: br label [[IF_END327_SINK_SPLIT]] 228; PRED: split: 229; PRED-NEXT: store i32 [[TMP0]], ptr [[I]], align 4 230; PRED-NEXT: br label [[IF_END327]] 231; PRED: loop.latch: 232; PRED-NEXT: [[INCDEC_PTR329]] = getelementptr inbounds i8, ptr [[__BEGIN3_011973]], i64 4 233; PRED-NEXT: [[CMP311_NOT:%.*]] = icmp eq ptr [[__BEGIN3_011973]], [[I]] 234; PRED-NEXT: br i1 [[CMP311_NOT]], label [[FOR_COND_CLEANUP312_LOOPEXIT:%.*]], label [[FOR_BODY313]] 235; PRED: exit: 236; PRED-NEXT: ret void 237; 238entry: 239 br label %loop.header 240 241loop.header: 242 %ptr.iv = phi ptr [ %src, %entry ], [ %ptr.iv.next, %loop.latch ] 243 %l = load i32, ptr %ptr.iv, align 4 244 br i1 true, label %else.1, label %if 245 246if: 247 br label %split 248 249else.1: 250 br i1 %c, label %else.2, label %loop.latch 251 252else.2: 253 br label %split 254 255split: 256 store i32 %l, ptr %I, align 4 257 br label %loop.latch 258 259loop.latch: 260 %ptr.iv.next = getelementptr inbounds i8, ptr %ptr.iv, i64 4 261 %ec = icmp eq ptr %ptr.iv, %I 262 br i1 %ec, label %exit, label %loop.header 263 264exit: 265 ret void 266} 267 268define void @invar_cond_chain_2(ptr %I, ptr noalias %src, ptr noalias %dst, i32 %a) { 269; DEFAULT-LABEL: define void @invar_cond_chain_2( 270; DEFAULT-SAME: ptr [[I:%.*]], ptr noalias [[SRC:%.*]], ptr noalias [[DST:%.*]], i32 [[A:%.*]]) { 271; DEFAULT-NEXT: entry: 272; DEFAULT-NEXT: br label [[FOR_BODY313:%.*]] 273; DEFAULT: loop.header: 274; DEFAULT-NEXT: [[__BEGIN3_01197:%.*]] = phi ptr [ [[SRC]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR329:%.*]], [[IF_END327:%.*]] ] 275; DEFAULT-NEXT: [[CMP315_NOT:%.*]] = icmp sgt i32 [[A]], 0 276; DEFAULT-NEXT: br i1 [[CMP315_NOT]], label [[IF_END327]], label [[IF_THEN316:%.*]] 277; DEFAULT: if: 278; DEFAULT-NEXT: br label [[IF_END327_SINK_SPLIT:%.*]] 279; DEFAULT: else: 280; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 281; DEFAULT-NEXT: br label [[IF_END327]] 282; DEFAULT: loop.latch: 283; DEFAULT-NEXT: [[INCDEC_PTR329]] = getelementptr inbounds i8, ptr [[__BEGIN3_01197]], i64 4 284; DEFAULT-NEXT: [[CMP311_NOT:%.*]] = icmp eq ptr [[__BEGIN3_01197]], [[I]] 285; DEFAULT-NEXT: br i1 [[CMP311_NOT]], label [[EXIT:%.*]], label [[FOR_BODY313]] 286; DEFAULT: exit: 287; DEFAULT-NEXT: ret void 288; 289; PRED-LABEL: define void @invar_cond_chain_2( 290; PRED-SAME: ptr [[I:%.*]], ptr noalias [[SRC:%.*]], ptr noalias [[DST:%.*]], i32 [[A:%.*]]) { 291; PRED-NEXT: entry: 292; PRED-NEXT: br label [[FOR_BODY313:%.*]] 293; PRED: loop.header: 294; PRED-NEXT: [[__BEGIN3_01197:%.*]] = phi ptr [ [[SRC]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR329:%.*]], [[IF_END327:%.*]] ] 295; PRED-NEXT: [[CMP315_NOT:%.*]] = icmp sgt i32 [[A]], 0 296; PRED-NEXT: br i1 [[CMP315_NOT]], label [[IF_END327]], label [[IF_THEN316:%.*]] 297; PRED: if: 298; PRED-NEXT: br label [[IF_END327_SINK_SPLIT:%.*]] 299; PRED: else: 300; PRED-NEXT: store i32 0, ptr [[DST]], align 4 301; PRED-NEXT: br label [[IF_END327]] 302; PRED: loop.latch: 303; PRED-NEXT: [[INCDEC_PTR329]] = getelementptr inbounds i8, ptr [[__BEGIN3_01197]], i64 4 304; PRED-NEXT: [[CMP311_NOT:%.*]] = icmp eq ptr [[__BEGIN3_01197]], [[I]] 305; PRED-NEXT: br i1 [[CMP311_NOT]], label [[EXIT:%.*]], label [[FOR_BODY313]] 306; PRED: exit: 307; PRED-NEXT: ret void 308; 309entry: 310 br label %loop.header 311 312loop.header: 313 %ptr.iv = phi ptr [ %src, %entry ], [ %ptr.iv.next, %loop.latch ] 314 %cmp315.not = icmp sgt i32 %a, 0 315 br i1 %cmp315.not, label %loop.latch, label %if 316 317if: 318 br label %else 319 320else: 321 store i32 0, ptr %dst, align 4 322 br label %loop.latch 323 324loop.latch: 325 %ptr.iv.next = getelementptr inbounds i8, ptr %ptr.iv, i64 4 326 %cmp311.not = icmp eq ptr %ptr.iv, %I 327 br i1 %cmp311.not, label %exit, label %loop.header 328 329exit: 330 ret void 331} 332 333define void @latch_branch_cost(ptr %dst) { 334; DEFAULT-LABEL: define void @latch_branch_cost( 335; DEFAULT-SAME: ptr [[DST:%.*]]) { 336; DEFAULT-NEXT: iter.check: 337; DEFAULT-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 338; DEFAULT: vector.main.loop.iter.check: 339; DEFAULT-NEXT: br i1 false, label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH1:%.*]] 340; DEFAULT: vector.ph: 341; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]] 342; DEFAULT: vector.body: 343; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH1]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 344; DEFAULT-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 345; DEFAULT-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP0]] 346; DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP2]], i32 0 347; DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP2]], i32 16 348; DEFAULT-NEXT: store <16 x i8> zeroinitializer, ptr [[TMP6]], align 1 349; DEFAULT-NEXT: store <16 x i8> zeroinitializer, ptr [[TMP5]], align 1 350; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 32 351; DEFAULT-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 96 352; DEFAULT-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 353; DEFAULT: middle.block: 354; DEFAULT-NEXT: br i1 false, label [[FOR_END:%.*]], label [[VEC_EPILOG_ITER_CHECK:%.*]] 355; DEFAULT: vec.epilog.iter.check: 356; DEFAULT-NEXT: br i1 false, label [[SCALAR_PH]], label [[VEC_EPILOG_PH]] 357; DEFAULT: vec.epilog.ph: 358; DEFAULT-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ 96, [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_PH]] ] 359; DEFAULT-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]] 360; DEFAULT: vec.epilog.vector.body: 361; DEFAULT-NEXT: [[INDEX1:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], [[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT2:%.*]], [[VEC_EPILOG_VECTOR_BODY]] ] 362; DEFAULT-NEXT: [[TMP7:%.*]] = add i64 [[INDEX1]], 0 363; DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP7]] 364; DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP8]], i32 0 365; DEFAULT-NEXT: store <4 x i8> zeroinitializer, ptr [[TMP9]], align 1 366; DEFAULT-NEXT: [[INDEX_NEXT2]] = add nuw i64 [[INDEX1]], 4 367; DEFAULT-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT2]], 100 368; DEFAULT-NEXT: br i1 [[TMP10]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] 369; DEFAULT: vec.epilog.middle.block: 370; DEFAULT-NEXT: br i1 true, label [[FOR_END]], label [[SCALAR_PH]] 371; DEFAULT: vec.epilog.scalar.ph: 372; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, [[VEC_EPILOG_MIDDLE_BLOCK]] ], [ 0, [[ITER_CHECK:%.*]] ], [ 96, [[VEC_EPILOG_ITER_CHECK]] ] 373; DEFAULT-NEXT: br label [[FOR_BODY:%.*]] 374; DEFAULT: loop: 375; DEFAULT-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 376; DEFAULT-NEXT: [[ARRAYIDX:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDVARS_IV]] 377; DEFAULT-NEXT: store i8 0, ptr [[ARRAYIDX]], align 1 378; DEFAULT-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1 379; DEFAULT-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 100 380; DEFAULT-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] 381; DEFAULT: exit: 382; DEFAULT-NEXT: ret void 383; 384; PRED-LABEL: define void @latch_branch_cost( 385; PRED-SAME: ptr [[DST:%.*]]) { 386; PRED-NEXT: entry: 387; PRED-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 388; PRED: vector.ph: 389; PRED-NEXT: br label [[VECTOR_BODY:%.*]] 390; PRED: vector.body: 391; PRED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ] 392; PRED-NEXT: [[VEC_IND:%.*]] = phi <8 x i64> [ <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE6]] ] 393; PRED-NEXT: [[TMP0:%.*]] = icmp ule <8 x i64> [[VEC_IND]], splat (i64 99) 394; PRED-NEXT: [[TMP1:%.*]] = extractelement <8 x i1> [[TMP0]], i32 0 395; PRED-NEXT: br i1 [[TMP1]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 396; PRED: pred.store.if: 397; PRED-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 0 398; PRED-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP2]] 399; PRED-NEXT: store i8 0, ptr [[TMP3]], align 1 400; PRED-NEXT: br label [[PRED_STORE_CONTINUE]] 401; PRED: pred.store.continue: 402; PRED-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[TMP0]], i32 1 403; PRED-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] 404; PRED: pred.store.if1: 405; PRED-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 1 406; PRED-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP5]] 407; PRED-NEXT: store i8 0, ptr [[TMP6]], align 1 408; PRED-NEXT: br label [[PRED_STORE_CONTINUE2]] 409; PRED: pred.store.continue2: 410; PRED-NEXT: [[TMP7:%.*]] = extractelement <8 x i1> [[TMP0]], i32 2 411; PRED-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] 412; PRED: pred.store.if3: 413; PRED-NEXT: [[TMP8:%.*]] = add i64 [[INDEX]], 2 414; PRED-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP8]] 415; PRED-NEXT: store i8 0, ptr [[TMP9]], align 1 416; PRED-NEXT: br label [[PRED_STORE_CONTINUE4]] 417; PRED: pred.store.continue4: 418; PRED-NEXT: [[TMP10:%.*]] = extractelement <8 x i1> [[TMP0]], i32 3 419; PRED-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE7:%.*]] 420; PRED: pred.store.if5: 421; PRED-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 3 422; PRED-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP11]] 423; PRED-NEXT: store i8 0, ptr [[TMP12]], align 1 424; PRED-NEXT: br label [[PRED_STORE_CONTINUE7]] 425; PRED: pred.store.continue6: 426; PRED-NEXT: [[TMP13:%.*]] = extractelement <8 x i1> [[TMP0]], i32 4 427; PRED-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF7:%.*]], label [[PRED_STORE_CONTINUE8:%.*]] 428; PRED: pred.store.if7: 429; PRED-NEXT: [[TMP14:%.*]] = add i64 [[INDEX]], 4 430; PRED-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP14]] 431; PRED-NEXT: store i8 0, ptr [[TMP15]], align 1 432; PRED-NEXT: br label [[PRED_STORE_CONTINUE8]] 433; PRED: pred.store.continue8: 434; PRED-NEXT: [[TMP16:%.*]] = extractelement <8 x i1> [[TMP0]], i32 5 435; PRED-NEXT: br i1 [[TMP16]], label [[PRED_STORE_IF9:%.*]], label [[PRED_STORE_CONTINUE10:%.*]] 436; PRED: pred.store.if9: 437; PRED-NEXT: [[TMP17:%.*]] = add i64 [[INDEX]], 5 438; PRED-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP17]] 439; PRED-NEXT: store i8 0, ptr [[TMP18]], align 1 440; PRED-NEXT: br label [[PRED_STORE_CONTINUE10]] 441; PRED: pred.store.continue10: 442; PRED-NEXT: [[TMP19:%.*]] = extractelement <8 x i1> [[TMP0]], i32 6 443; PRED-NEXT: br i1 [[TMP19]], label [[PRED_STORE_IF11:%.*]], label [[PRED_STORE_CONTINUE12:%.*]] 444; PRED: pred.store.if11: 445; PRED-NEXT: [[TMP20:%.*]] = add i64 [[INDEX]], 6 446; PRED-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP20]] 447; PRED-NEXT: store i8 0, ptr [[TMP21]], align 1 448; PRED-NEXT: br label [[PRED_STORE_CONTINUE12]] 449; PRED: pred.store.continue12: 450; PRED-NEXT: [[TMP22:%.*]] = extractelement <8 x i1> [[TMP0]], i32 7 451; PRED-NEXT: br i1 [[TMP22]], label [[PRED_STORE_IF13:%.*]], label [[PRED_STORE_CONTINUE6]] 452; PRED: pred.store.if13: 453; PRED-NEXT: [[TMP23:%.*]] = add i64 [[INDEX]], 7 454; PRED-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP23]] 455; PRED-NEXT: store i8 0, ptr [[TMP24]], align 1 456; PRED-NEXT: br label [[PRED_STORE_CONTINUE6]] 457; PRED: pred.store.continue14: 458; PRED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 459; PRED-NEXT: [[VEC_IND_NEXT]] = add <8 x i64> [[VEC_IND]], splat (i64 8) 460; PRED-NEXT: [[TMP25:%.*]] = icmp eq i64 [[INDEX_NEXT]], 104 461; PRED-NEXT: br i1 [[TMP25]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 462; PRED: middle.block: 463; PRED-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] 464; PRED: scalar.ph: 465; PRED-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 104, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 466; PRED-NEXT: br label [[FOR_BODY:%.*]] 467; PRED: loop: 468; PRED-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 469; PRED-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[IV]] 470; PRED-NEXT: store i8 0, ptr [[GEP]], align 1 471; PRED-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[IV]], 1 472; PRED-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 100 473; PRED-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] 474; PRED: exit: 475; PRED-NEXT: ret void 476; 477entry: 478 br label %loop 479 480loop: 481 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] 482 %gep = getelementptr i8, ptr %dst, i64 %iv 483 store i8 0, ptr %gep, align 1 484 %iv.next = add i64 %iv, 1 485 %ec = icmp eq i64 %iv.next, 100 486 br i1 %ec, label %exit, label %loop 487 488exit: 489 ret void 490} 491 492define i32 @header_mask_and_invariant_compare(ptr %A, ptr %B, ptr %C, ptr %D, ptr %E, i64 %N) "target-features"="+sve" { 493; DEFAULT-LABEL: define i32 @header_mask_and_invariant_compare( 494; DEFAULT-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]], ptr [[D:%.*]], ptr [[E:%.*]], i64 [[N:%.*]]) #[[ATTR1:[0-9]+]] { 495; DEFAULT-NEXT: entry: 496; DEFAULT-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1 497; DEFAULT-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 60 498; DEFAULT-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] 499; DEFAULT: vector.memcheck: 500; DEFAULT-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[E]], i64 4 501; DEFAULT-NEXT: [[TMP4:%.*]] = shl i64 [[N]], 2 502; DEFAULT-NEXT: [[TMP5:%.*]] = add i64 [[TMP4]], 4 503; DEFAULT-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[D]], i64 [[TMP5]] 504; DEFAULT-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[A]], i64 4 505; DEFAULT-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[B]], i64 4 506; DEFAULT-NEXT: [[SCEVGEP4:%.*]] = getelementptr i8, ptr [[C]], i64 4 507; DEFAULT-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[E]], [[SCEVGEP1]] 508; DEFAULT-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[D]], [[SCEVGEP]] 509; DEFAULT-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] 510; DEFAULT-NEXT: [[BOUND05:%.*]] = icmp ult ptr [[E]], [[SCEVGEP2]] 511; DEFAULT-NEXT: [[BOUND16:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]] 512; DEFAULT-NEXT: [[FOUND_CONFLICT7:%.*]] = and i1 [[BOUND05]], [[BOUND16]] 513; DEFAULT-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT7]] 514; DEFAULT-NEXT: [[BOUND08:%.*]] = icmp ult ptr [[E]], [[SCEVGEP3]] 515; DEFAULT-NEXT: [[BOUND19:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]] 516; DEFAULT-NEXT: [[FOUND_CONFLICT10:%.*]] = and i1 [[BOUND08]], [[BOUND19]] 517; DEFAULT-NEXT: [[CONFLICT_RDX11:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT10]] 518; DEFAULT-NEXT: [[BOUND012:%.*]] = icmp ult ptr [[E]], [[SCEVGEP4]] 519; DEFAULT-NEXT: [[BOUND113:%.*]] = icmp ult ptr [[C]], [[SCEVGEP]] 520; DEFAULT-NEXT: [[FOUND_CONFLICT14:%.*]] = and i1 [[BOUND012]], [[BOUND113]] 521; DEFAULT-NEXT: [[CONFLICT_RDX15:%.*]] = or i1 [[CONFLICT_RDX11]], [[FOUND_CONFLICT14]] 522; DEFAULT-NEXT: [[BOUND016:%.*]] = icmp ult ptr [[D]], [[SCEVGEP2]] 523; DEFAULT-NEXT: [[BOUND117:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]] 524; DEFAULT-NEXT: [[FOUND_CONFLICT18:%.*]] = and i1 [[BOUND016]], [[BOUND117]] 525; DEFAULT-NEXT: [[CONFLICT_RDX19:%.*]] = or i1 [[CONFLICT_RDX15]], [[FOUND_CONFLICT18]] 526; DEFAULT-NEXT: [[BOUND020:%.*]] = icmp ult ptr [[D]], [[SCEVGEP3]] 527; DEFAULT-NEXT: [[BOUND121:%.*]] = icmp ult ptr [[B]], [[SCEVGEP1]] 528; DEFAULT-NEXT: [[FOUND_CONFLICT22:%.*]] = and i1 [[BOUND020]], [[BOUND121]] 529; DEFAULT-NEXT: [[CONFLICT_RDX23:%.*]] = or i1 [[CONFLICT_RDX19]], [[FOUND_CONFLICT22]] 530; DEFAULT-NEXT: [[BOUND024:%.*]] = icmp ult ptr [[D]], [[SCEVGEP4]] 531; DEFAULT-NEXT: [[BOUND125:%.*]] = icmp ult ptr [[C]], [[SCEVGEP1]] 532; DEFAULT-NEXT: [[FOUND_CONFLICT26:%.*]] = and i1 [[BOUND024]], [[BOUND125]] 533; DEFAULT-NEXT: [[CONFLICT_RDX27:%.*]] = or i1 [[CONFLICT_RDX23]], [[FOUND_CONFLICT26]] 534; DEFAULT-NEXT: br i1 [[CONFLICT_RDX27]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 535; DEFAULT: vector.ph: 536; DEFAULT-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 4 537; DEFAULT-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] 538; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]] 539; DEFAULT: vector.body: 540; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE37:%.*]] ] 541; DEFAULT-NEXT: [[TMP10:%.*]] = add i64 [[INDEX]], 0 542; DEFAULT-NEXT: [[TMP9:%.*]] = load i32, ptr [[A]], align 4, !alias.scope [[META7:![0-9]+]] 543; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT28:%.*]] = insertelement <4 x i32> poison, i32 [[TMP9]], i64 0 544; DEFAULT-NEXT: [[BROADCAST_SPLAT29:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT28]], <4 x i32> poison, <4 x i32> zeroinitializer 545; DEFAULT-NEXT: [[TMP19:%.*]] = load i32, ptr [[B]], align 4, !alias.scope [[META10:![0-9]+]] 546; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP19]], i64 0 547; DEFAULT-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer 548; DEFAULT-NEXT: [[TMP6:%.*]] = or <4 x i32> [[BROADCAST_SPLAT]], [[BROADCAST_SPLAT29]] 549; DEFAULT-NEXT: [[TMP7:%.*]] = load i32, ptr [[C]], align 4, !alias.scope [[META12:![0-9]+]] 550; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT30:%.*]] = insertelement <4 x i32> poison, i32 [[TMP7]], i64 0 551; DEFAULT-NEXT: [[BROADCAST_SPLAT31:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT30]], <4 x i32> poison, <4 x i32> zeroinitializer 552; DEFAULT-NEXT: [[TMP8:%.*]] = icmp ugt <4 x i32> [[BROADCAST_SPLAT31]], [[TMP6]] 553; DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr i32, ptr [[D]], i64 [[TMP10]] 554; DEFAULT-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP8]], i32 0 555; DEFAULT-NEXT: br i1 [[TMP20]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 556; DEFAULT: pred.store.if: 557; DEFAULT-NEXT: [[TMP11:%.*]] = extractelement <4 x i32> [[TMP6]], i32 0 558; DEFAULT-NEXT: store i32 [[TMP11]], ptr [[E]], align 4, !alias.scope [[META14:![0-9]+]], !noalias [[META16:![0-9]+]] 559; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE]] 560; DEFAULT: pred.store.continue: 561; DEFAULT-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP8]], i32 1 562; DEFAULT-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF32:%.*]], label [[PRED_STORE_CONTINUE33:%.*]] 563; DEFAULT: pred.store.if32: 564; DEFAULT-NEXT: [[TMP13:%.*]] = extractelement <4 x i32> [[TMP6]], i32 1 565; DEFAULT-NEXT: store i32 [[TMP13]], ptr [[E]], align 4, !alias.scope [[META14]], !noalias [[META16]] 566; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE33]] 567; DEFAULT: pred.store.continue33: 568; DEFAULT-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP8]], i32 2 569; DEFAULT-NEXT: br i1 [[TMP14]], label [[PRED_STORE_IF34:%.*]], label [[PRED_STORE_CONTINUE35:%.*]] 570; DEFAULT: pred.store.if34: 571; DEFAULT-NEXT: [[TMP15:%.*]] = extractelement <4 x i32> [[TMP6]], i32 2 572; DEFAULT-NEXT: store i32 [[TMP15]], ptr [[E]], align 4, !alias.scope [[META14]], !noalias [[META16]] 573; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE35]] 574; DEFAULT: pred.store.continue35: 575; DEFAULT-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP8]], i32 3 576; DEFAULT-NEXT: br i1 [[TMP21]], label [[PRED_STORE_IF36:%.*]], label [[PRED_STORE_CONTINUE37]] 577; DEFAULT: pred.store.if36: 578; DEFAULT-NEXT: [[TMP22:%.*]] = extractelement <4 x i32> [[TMP6]], i32 3 579; DEFAULT-NEXT: store i32 [[TMP22]], ptr [[E]], align 4, !alias.scope [[META14]], !noalias [[META16]] 580; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE37]] 581; DEFAULT: pred.store.continue37: 582; DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr i32, ptr [[TMP16]], i32 0 583; DEFAULT-NEXT: call void @llvm.masked.store.v4i32.p0(<4 x i32> zeroinitializer, ptr [[TMP17]], i32 4, <4 x i1> [[TMP8]]), !alias.scope [[META18:![0-9]+]], !noalias [[META19:![0-9]+]] 584; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 585; DEFAULT-NEXT: [[TMP18:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 586; DEFAULT-NEXT: br i1 [[TMP18]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP20:![0-9]+]] 587; DEFAULT: middle.block: 588; DEFAULT-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] 589; DEFAULT-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 590; DEFAULT: scalar.ph: 591; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[ENTRY:%.*]] ] 592; DEFAULT-NEXT: br label [[LOOP_HEADER:%.*]] 593; DEFAULT: loop.header: 594; DEFAULT-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 595; DEFAULT-NEXT: [[L_A:%.*]] = load i32, ptr [[A]], align 4 596; DEFAULT-NEXT: [[L_B:%.*]] = load i32, ptr [[B]], align 4 597; DEFAULT-NEXT: [[OR:%.*]] = or i32 [[L_B]], [[L_A]] 598; DEFAULT-NEXT: [[L_C:%.*]] = load i32, ptr [[C]], align 4 599; DEFAULT-NEXT: [[C_0:%.*]] = icmp ugt i32 [[L_C]], [[OR]] 600; DEFAULT-NEXT: br i1 [[C_0]], label [[IF_THEN:%.*]], label [[LOOP_LATCH]] 601; DEFAULT: if.then: 602; DEFAULT-NEXT: [[GEP_D:%.*]] = getelementptr i32, ptr [[D]], i64 [[IV]] 603; DEFAULT-NEXT: store i32 [[OR]], ptr [[E]], align 4 604; DEFAULT-NEXT: store i32 0, ptr [[GEP_D]], align 4 605; DEFAULT-NEXT: br label [[LOOP_LATCH]] 606; DEFAULT: loop.latch: 607; DEFAULT-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 608; DEFAULT-NEXT: [[C_1:%.*]] = icmp eq i64 [[IV]], [[N]] 609; DEFAULT-NEXT: br i1 [[C_1]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP21:![0-9]+]] 610; DEFAULT: exit: 611; DEFAULT-NEXT: ret i32 0 612; 613; PRED-LABEL: define i32 @header_mask_and_invariant_compare( 614; PRED-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]], ptr [[D:%.*]], ptr [[E:%.*]], i64 [[N:%.*]]) #[[ATTR1:[0-9]+]] { 615; PRED-NEXT: entry: 616; PRED-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1 617; PRED-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] 618; PRED: vector.memcheck: 619; PRED-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[E]], i64 4 620; PRED-NEXT: [[TMP1:%.*]] = shl i64 [[N]], 2 621; PRED-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 4 622; PRED-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[D]], i64 [[TMP2]] 623; PRED-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[A]], i64 4 624; PRED-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[B]], i64 4 625; PRED-NEXT: [[SCEVGEP4:%.*]] = getelementptr i8, ptr [[C]], i64 4 626; PRED-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[E]], [[SCEVGEP1]] 627; PRED-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[D]], [[SCEVGEP]] 628; PRED-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] 629; PRED-NEXT: [[BOUND05:%.*]] = icmp ult ptr [[E]], [[SCEVGEP2]] 630; PRED-NEXT: [[BOUND16:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]] 631; PRED-NEXT: [[FOUND_CONFLICT7:%.*]] = and i1 [[BOUND05]], [[BOUND16]] 632; PRED-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT7]] 633; PRED-NEXT: [[BOUND08:%.*]] = icmp ult ptr [[E]], [[SCEVGEP3]] 634; PRED-NEXT: [[BOUND19:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]] 635; PRED-NEXT: [[FOUND_CONFLICT10:%.*]] = and i1 [[BOUND08]], [[BOUND19]] 636; PRED-NEXT: [[CONFLICT_RDX11:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT10]] 637; PRED-NEXT: [[BOUND012:%.*]] = icmp ult ptr [[E]], [[SCEVGEP4]] 638; PRED-NEXT: [[BOUND113:%.*]] = icmp ult ptr [[C]], [[SCEVGEP]] 639; PRED-NEXT: [[FOUND_CONFLICT14:%.*]] = and i1 [[BOUND012]], [[BOUND113]] 640; PRED-NEXT: [[CONFLICT_RDX15:%.*]] = or i1 [[CONFLICT_RDX11]], [[FOUND_CONFLICT14]] 641; PRED-NEXT: [[BOUND016:%.*]] = icmp ult ptr [[D]], [[SCEVGEP2]] 642; PRED-NEXT: [[BOUND117:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]] 643; PRED-NEXT: [[FOUND_CONFLICT18:%.*]] = and i1 [[BOUND016]], [[BOUND117]] 644; PRED-NEXT: [[CONFLICT_RDX19:%.*]] = or i1 [[CONFLICT_RDX15]], [[FOUND_CONFLICT18]] 645; PRED-NEXT: [[BOUND020:%.*]] = icmp ult ptr [[D]], [[SCEVGEP3]] 646; PRED-NEXT: [[BOUND121:%.*]] = icmp ult ptr [[B]], [[SCEVGEP1]] 647; PRED-NEXT: [[FOUND_CONFLICT22:%.*]] = and i1 [[BOUND020]], [[BOUND121]] 648; PRED-NEXT: [[CONFLICT_RDX23:%.*]] = or i1 [[CONFLICT_RDX19]], [[FOUND_CONFLICT22]] 649; PRED-NEXT: [[BOUND024:%.*]] = icmp ult ptr [[D]], [[SCEVGEP4]] 650; PRED-NEXT: [[BOUND125:%.*]] = icmp ult ptr [[C]], [[SCEVGEP1]] 651; PRED-NEXT: [[FOUND_CONFLICT26:%.*]] = and i1 [[BOUND024]], [[BOUND125]] 652; PRED-NEXT: [[CONFLICT_RDX27:%.*]] = or i1 [[CONFLICT_RDX23]], [[FOUND_CONFLICT26]] 653; PRED-NEXT: br i1 [[CONFLICT_RDX27]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 654; PRED: vector.ph: 655; PRED-NEXT: [[N_RND_UP:%.*]] = add i64 [[TMP0]], 3 656; PRED-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], 4 657; PRED-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]] 658; PRED-NEXT: [[TMP12:%.*]] = sub i64 [[TMP0]], 4 659; PRED-NEXT: [[TMP13:%.*]] = icmp ugt i64 [[TMP0]], 4 660; PRED-NEXT: [[TMP14:%.*]] = select i1 [[TMP13]], i64 [[TMP12]], i64 0 661; PRED-NEXT: [[ACTIVE_LANE_MASK_ENTRY:%.*]] = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i64(i64 0, i64 [[TMP0]]) 662; PRED-NEXT: br label [[VECTOR_BODY:%.*]] 663; PRED: vector.body: 664; PRED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE37:%.*]] ] 665; PRED-NEXT: [[ACTIVE_LANE_MASK:%.*]] = phi <4 x i1> [ [[ACTIVE_LANE_MASK_ENTRY]], [[VECTOR_PH]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], [[PRED_STORE_CONTINUE37]] ] 666; PRED-NEXT: [[TMP15:%.*]] = add i64 [[INDEX]], 0 667; PRED-NEXT: [[TMP7:%.*]] = load i32, ptr [[A]], align 4, !alias.scope [[META4:![0-9]+]] 668; PRED-NEXT: [[BROADCAST_SPLATINSERT28:%.*]] = insertelement <4 x i32> poison, i32 [[TMP7]], i64 0 669; PRED-NEXT: [[BROADCAST_SPLAT29:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT28]], <4 x i32> poison, <4 x i32> zeroinitializer 670; PRED-NEXT: [[TMP8:%.*]] = load i32, ptr [[B]], align 4, !alias.scope [[META7:![0-9]+]] 671; PRED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP8]], i64 0 672; PRED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer 673; PRED-NEXT: [[TMP9:%.*]] = or <4 x i32> [[BROADCAST_SPLAT]], [[BROADCAST_SPLAT29]] 674; PRED-NEXT: [[TMP10:%.*]] = load i32, ptr [[C]], align 4, !alias.scope [[META9:![0-9]+]] 675; PRED-NEXT: [[BROADCAST_SPLATINSERT30:%.*]] = insertelement <4 x i32> poison, i32 [[TMP10]], i64 0 676; PRED-NEXT: [[BROADCAST_SPLAT31:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT30]], <4 x i32> poison, <4 x i32> zeroinitializer 677; PRED-NEXT: [[TMP11:%.*]] = icmp ugt <4 x i32> [[BROADCAST_SPLAT31]], [[TMP9]] 678; PRED-NEXT: [[TMP25:%.*]] = select <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i1> [[TMP11]], <4 x i1> zeroinitializer 679; PRED-NEXT: [[TMP22:%.*]] = getelementptr i32, ptr [[D]], i64 [[TMP15]] 680; PRED-NEXT: [[TMP26:%.*]] = extractelement <4 x i1> [[TMP25]], i32 0 681; PRED-NEXT: br i1 [[TMP26]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 682; PRED: pred.store.if: 683; PRED-NEXT: [[TMP27:%.*]] = extractelement <4 x i32> [[TMP9]], i32 0 684; PRED-NEXT: store i32 [[TMP27]], ptr [[E]], align 4, !alias.scope [[META11:![0-9]+]], !noalias [[META13:![0-9]+]] 685; PRED-NEXT: br label [[PRED_STORE_CONTINUE]] 686; PRED: pred.store.continue: 687; PRED-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP25]], i32 1 688; PRED-NEXT: br i1 [[TMP16]], label [[PRED_STORE_IF32:%.*]], label [[PRED_STORE_CONTINUE33:%.*]] 689; PRED: pred.store.if32: 690; PRED-NEXT: [[TMP17:%.*]] = extractelement <4 x i32> [[TMP9]], i32 1 691; PRED-NEXT: store i32 [[TMP17]], ptr [[E]], align 4, !alias.scope [[META11]], !noalias [[META13]] 692; PRED-NEXT: br label [[PRED_STORE_CONTINUE33]] 693; PRED: pred.store.continue33: 694; PRED-NEXT: [[TMP18:%.*]] = extractelement <4 x i1> [[TMP25]], i32 2 695; PRED-NEXT: br i1 [[TMP18]], label [[PRED_STORE_IF34:%.*]], label [[PRED_STORE_CONTINUE35:%.*]] 696; PRED: pred.store.if34: 697; PRED-NEXT: [[TMP19:%.*]] = extractelement <4 x i32> [[TMP9]], i32 2 698; PRED-NEXT: store i32 [[TMP19]], ptr [[E]], align 4, !alias.scope [[META11]], !noalias [[META13]] 699; PRED-NEXT: br label [[PRED_STORE_CONTINUE35]] 700; PRED: pred.store.continue35: 701; PRED-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP25]], i32 3 702; PRED-NEXT: br i1 [[TMP20]], label [[PRED_STORE_IF36:%.*]], label [[PRED_STORE_CONTINUE37]] 703; PRED: pred.store.if36: 704; PRED-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[TMP9]], i32 3 705; PRED-NEXT: store i32 [[TMP21]], ptr [[E]], align 4, !alias.scope [[META11]], !noalias [[META13]] 706; PRED-NEXT: br label [[PRED_STORE_CONTINUE37]] 707; PRED: pred.store.continue37: 708; PRED-NEXT: [[TMP23:%.*]] = getelementptr i32, ptr [[TMP22]], i32 0 709; PRED-NEXT: call void @llvm.masked.store.v4i32.p0(<4 x i32> zeroinitializer, ptr [[TMP23]], i32 4, <4 x i1> [[TMP25]]), !alias.scope [[META15:![0-9]+]], !noalias [[META16:![0-9]+]] 710; PRED-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 711; PRED-NEXT: [[ACTIVE_LANE_MASK_NEXT]] = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i64(i64 [[INDEX]], i64 [[TMP14]]) 712; PRED-NEXT: [[TMP28:%.*]] = xor <4 x i1> [[ACTIVE_LANE_MASK_NEXT]], splat (i1 true) 713; PRED-NEXT: [[TMP24:%.*]] = extractelement <4 x i1> [[TMP28]], i32 0 714; PRED-NEXT: br i1 [[TMP24]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP17:![0-9]+]] 715; PRED: middle.block: 716; PRED-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] 717; PRED: scalar.ph: 718; PRED-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[ENTRY:%.*]] ] 719; PRED-NEXT: br label [[LOOP_HEADER:%.*]] 720; PRED: loop.header: 721; PRED-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 722; PRED-NEXT: [[L_A:%.*]] = load i32, ptr [[A]], align 4 723; PRED-NEXT: [[L_B:%.*]] = load i32, ptr [[B]], align 4 724; PRED-NEXT: [[OR:%.*]] = or i32 [[L_B]], [[L_A]] 725; PRED-NEXT: [[L_C:%.*]] = load i32, ptr [[C]], align 4 726; PRED-NEXT: [[C_0:%.*]] = icmp ugt i32 [[L_C]], [[OR]] 727; PRED-NEXT: br i1 [[C_0]], label [[IF_THEN:%.*]], label [[LOOP_LATCH]] 728; PRED: if.then: 729; PRED-NEXT: [[GEP_D:%.*]] = getelementptr i32, ptr [[D]], i64 [[IV]] 730; PRED-NEXT: store i32 [[OR]], ptr [[E]], align 4 731; PRED-NEXT: store i32 0, ptr [[GEP_D]], align 4 732; PRED-NEXT: br label [[LOOP_LATCH]] 733; PRED: loop.latch: 734; PRED-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 735; PRED-NEXT: [[C_1:%.*]] = icmp eq i64 [[IV]], [[N]] 736; PRED-NEXT: br i1 [[C_1]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP18:![0-9]+]] 737; PRED: exit: 738; PRED-NEXT: ret i32 0 739; 740entry: 741 br label %loop.header 742 743loop.header: 744 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] 745 %l.A = load i32, ptr %A, align 4 746 %l.B = load i32, ptr %B, align 4 747 %or = or i32 %l.B, %l.A 748 %l.C = load i32, ptr %C, align 4 749 %c.0 = icmp ugt i32 %l.C, %or 750 br i1 %c.0, label %if.then, label %loop.latch 751 752if.then: 753 %gep.D = getelementptr i32, ptr %D, i64 %iv 754 store i32 %or, ptr %E, align 4 755 store i32 0, ptr %gep.D, align 4 756 br label %loop.latch 757 758loop.latch: 759 %iv.next = add i64 %iv, 1 760 %c.1 = icmp eq i64 %iv, %N 761 br i1 %c.1, label %exit, label %loop.header 762 763exit: 764 ret i32 0 765} 766 767define void @multiple_exit_conditions(ptr %src, ptr noalias %dst) #1 { 768; DEFAULT-LABEL: define void @multiple_exit_conditions( 769; DEFAULT-SAME: ptr [[SRC:%.*]], ptr noalias [[DST:%.*]]) #[[ATTR2:[0-9]+]] { 770; DEFAULT-NEXT: entry: 771; DEFAULT-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 772; DEFAULT: vector.ph: 773; DEFAULT-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[DST]], i64 2048 774; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]] 775; DEFAULT: vector.body: 776; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 777; DEFAULT-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 8 778; DEFAULT-NEXT: [[TMP0:%.*]] = add i64 [[OFFSET_IDX]], 0 779; DEFAULT-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP0]] 780; DEFAULT-NEXT: [[TMP1:%.*]] = load i16, ptr [[SRC]], align 2 781; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i16> poison, i16 [[TMP1]], i64 0 782; DEFAULT-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i16> [[BROADCAST_SPLATINSERT]], <8 x i16> poison, <8 x i32> zeroinitializer 783; DEFAULT-NEXT: [[TMP2:%.*]] = or <8 x i16> [[BROADCAST_SPLAT]], splat (i16 1) 784; DEFAULT-NEXT: [[TMP3:%.*]] = uitofp <8 x i16> [[TMP2]] to <8 x double> 785; DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr double, ptr [[NEXT_GEP]], i32 0 786; DEFAULT-NEXT: store <8 x double> [[TMP3]], ptr [[TMP4]], align 8 787; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 788; DEFAULT-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 789; DEFAULT-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP22:![0-9]+]] 790; DEFAULT: middle.block: 791; DEFAULT-NEXT: br i1 false, label [[EXIT:%.*]], label [[SCALAR_PH]] 792; DEFAULT: scalar.ph: 793; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[DST]], [[ENTRY:%.*]] ] 794; DEFAULT-NEXT: [[BC_RESUME_VAL1:%.*]] = phi i64 [ 512, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ] 795; DEFAULT-NEXT: br label [[LOOP:%.*]] 796; DEFAULT: vector.scevcheck: 797; DEFAULT-NEXT: unreachable 798; DEFAULT: loop: 799; DEFAULT-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ] 800; DEFAULT-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 801; DEFAULT-NEXT: [[L:%.*]] = load i16, ptr [[SRC]], align 2 802; DEFAULT-NEXT: [[O:%.*]] = or i16 [[L]], 1 803; DEFAULT-NEXT: [[CONV:%.*]] = uitofp i16 [[O]] to double 804; DEFAULT-NEXT: store double [[CONV]], ptr [[PTR_IV]], align 8 805; DEFAULT-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 2 806; DEFAULT-NEXT: [[PTR_IV_NEXT]] = getelementptr i8, ptr [[PTR_IV]], i64 8 807; DEFAULT-NEXT: [[IV_CLAMP:%.*]] = and i64 [[IV]], 4294967294 808; DEFAULT-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_CLAMP]], 512 809; DEFAULT-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP23:![0-9]+]] 810; DEFAULT: exit: 811; DEFAULT-NEXT: ret void 812; 813; PRED-LABEL: define void @multiple_exit_conditions( 814; PRED-SAME: ptr [[SRC:%.*]], ptr noalias [[DST:%.*]]) #[[ATTR2:[0-9]+]] { 815; PRED-NEXT: entry: 816; PRED-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 817; PRED: vector.ph: 818; PRED-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() 819; PRED-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], 2 820; PRED-NEXT: [[TMP2:%.*]] = sub i64 [[TMP1]], 1 821; PRED-NEXT: [[N_RND_UP:%.*]] = add i64 257, [[TMP2]] 822; PRED-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP1]] 823; PRED-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]] 824; PRED-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64() 825; PRED-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 2 826; PRED-NEXT: [[TMP3:%.*]] = mul i64 [[N_VEC]], 8 827; PRED-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP3]] 828; PRED-NEXT: [[IND_END1:%.*]] = mul i64 [[N_VEC]], 2 829; PRED-NEXT: [[TMP6:%.*]] = call i64 @llvm.vscale.i64() 830; PRED-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 2 831; PRED-NEXT: [[TMP8:%.*]] = sub i64 257, [[TMP7]] 832; PRED-NEXT: [[TMP9:%.*]] = icmp ugt i64 257, [[TMP7]] 833; PRED-NEXT: [[TMP10:%.*]] = select i1 [[TMP9]], i64 [[TMP8]], i64 0 834; PRED-NEXT: [[ACTIVE_LANE_MASK_ENTRY:%.*]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 0, i64 257) 835; PRED-NEXT: br label [[VECTOR_BODY:%.*]] 836; PRED: vector.body: 837; PRED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 838; PRED-NEXT: [[ACTIVE_LANE_MASK:%.*]] = phi <vscale x 2 x i1> [ [[ACTIVE_LANE_MASK_ENTRY]], [[VECTOR_PH]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], [[VECTOR_BODY]] ] 839; PRED-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 8 840; PRED-NEXT: [[TMP11:%.*]] = add i64 [[OFFSET_IDX]], 0 841; PRED-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP11]] 842; PRED-NEXT: [[TMP12:%.*]] = load i16, ptr [[SRC]], align 2 843; PRED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i16> poison, i16 [[TMP12]], i64 0 844; PRED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i16> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer 845; PRED-NEXT: [[TMP13:%.*]] = or <vscale x 2 x i16> [[BROADCAST_SPLAT]], splat (i16 1) 846; PRED-NEXT: [[TMP14:%.*]] = uitofp <vscale x 2 x i16> [[TMP13]] to <vscale x 2 x double> 847; PRED-NEXT: [[TMP15:%.*]] = getelementptr double, ptr [[NEXT_GEP]], i32 0 848; PRED-NEXT: call void @llvm.masked.store.nxv2f64.p0(<vscale x 2 x double> [[TMP14]], ptr [[TMP15]], i32 8, <vscale x 2 x i1> [[ACTIVE_LANE_MASK]]) 849; PRED-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP5]] 850; PRED-NEXT: [[ACTIVE_LANE_MASK_NEXT]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i64(i64 [[INDEX]], i64 [[TMP10]]) 851; PRED-NEXT: [[TMP16:%.*]] = xor <vscale x 2 x i1> [[ACTIVE_LANE_MASK_NEXT]], splat (i1 true) 852; PRED-NEXT: [[TMP17:%.*]] = extractelement <vscale x 2 x i1> [[TMP16]], i32 0 853; PRED-NEXT: br i1 [[TMP17]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP19:![0-9]+]] 854; PRED: middle.block: 855; PRED-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] 856; PRED: scalar.ph: 857; PRED-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[DST]], [[ENTRY:%.*]] ] 858; PRED-NEXT: [[BC_RESUME_VAL2:%.*]] = phi i64 [ [[IND_END1]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ] 859; PRED-NEXT: br label [[LOOP:%.*]] 860; PRED: vector.scevcheck: 861; PRED-NEXT: unreachable 862; PRED: loop: 863; PRED-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ] 864; PRED-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL2]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 865; PRED-NEXT: [[L:%.*]] = load i16, ptr [[SRC]], align 2 866; PRED-NEXT: [[O:%.*]] = or i16 [[L]], 1 867; PRED-NEXT: [[CONV:%.*]] = uitofp i16 [[O]] to double 868; PRED-NEXT: store double [[CONV]], ptr [[PTR_IV]], align 8 869; PRED-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 2 870; PRED-NEXT: [[PTR_IV_NEXT]] = getelementptr i8, ptr [[PTR_IV]], i64 8 871; PRED-NEXT: [[IV_CLAMP:%.*]] = and i64 [[IV]], 4294967294 872; PRED-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_CLAMP]], 512 873; PRED-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP20:![0-9]+]] 874; PRED: exit: 875; PRED-NEXT: ret void 876; 877entry: 878 br label %loop 879 880loop: 881 %ptr.iv = phi ptr [ %dst, %entry ], [ %ptr.iv.next, %loop ] 882 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] 883 %l = load i16, ptr %src, align 2 884 %o = or i16 %l, 1 885 %conv = uitofp i16 %o to double 886 store double %conv, ptr %ptr.iv, align 8 887 %iv.next = add nsw i64 %iv, 2 888 %ptr.iv.next = getelementptr i8, ptr %ptr.iv, i64 8 889 %iv.clamp = and i64 %iv, 4294967294 890 %ec = icmp eq i64 %iv.clamp, 512 891 br i1 %ec, label %exit, label %loop 892 893exit: 894 ret void 895} 896 897define void @low_trip_count_fold_tail_scalarized_store(ptr %dst) { 898; DEFAULT-LABEL: define void @low_trip_count_fold_tail_scalarized_store( 899; DEFAULT-SAME: ptr [[DST:%.*]]) { 900; DEFAULT-NEXT: entry: 901; DEFAULT-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 902; DEFAULT: vector.ph: 903; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]] 904; DEFAULT: vector.body: 905; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE14:%.*]] ] 906; DEFAULT-NEXT: [[VEC_IND:%.*]] = phi <8 x i64> [ <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE14]] ] 907; DEFAULT-NEXT: [[TMP0:%.*]] = trunc i64 [[INDEX]] to i8 908; DEFAULT-NEXT: [[TMP1:%.*]] = icmp ule <8 x i64> [[VEC_IND]], splat (i64 6) 909; DEFAULT-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP1]], i32 0 910; DEFAULT-NEXT: br i1 [[TMP2]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 911; DEFAULT: pred.store.if: 912; DEFAULT-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 0 913; DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP3]] 914; DEFAULT-NEXT: [[TMP5:%.*]] = add i8 [[TMP0]], 0 915; DEFAULT-NEXT: store i8 [[TMP5]], ptr [[TMP4]], align 1 916; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE]] 917; DEFAULT: pred.store.continue: 918; DEFAULT-NEXT: [[TMP6:%.*]] = extractelement <8 x i1> [[TMP1]], i32 1 919; DEFAULT-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] 920; DEFAULT: pred.store.if1: 921; DEFAULT-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 1 922; DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP7]] 923; DEFAULT-NEXT: [[TMP9:%.*]] = add i8 [[TMP0]], 1 924; DEFAULT-NEXT: store i8 [[TMP9]], ptr [[TMP8]], align 1 925; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE2]] 926; DEFAULT: pred.store.continue2: 927; DEFAULT-NEXT: [[TMP10:%.*]] = extractelement <8 x i1> [[TMP1]], i32 2 928; DEFAULT-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] 929; DEFAULT: pred.store.if3: 930; DEFAULT-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 2 931; DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP11]] 932; DEFAULT-NEXT: [[TMP13:%.*]] = add i8 [[TMP0]], 2 933; DEFAULT-NEXT: store i8 [[TMP13]], ptr [[TMP12]], align 1 934; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE4]] 935; DEFAULT: pred.store.continue4: 936; DEFAULT-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP1]], i32 3 937; DEFAULT-NEXT: br i1 [[TMP14]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6:%.*]] 938; DEFAULT: pred.store.if5: 939; DEFAULT-NEXT: [[TMP15:%.*]] = add i64 [[INDEX]], 3 940; DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP15]] 941; DEFAULT-NEXT: [[TMP17:%.*]] = add i8 [[TMP0]], 3 942; DEFAULT-NEXT: store i8 [[TMP17]], ptr [[TMP16]], align 1 943; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE6]] 944; DEFAULT: pred.store.continue6: 945; DEFAULT-NEXT: [[TMP18:%.*]] = extractelement <8 x i1> [[TMP1]], i32 4 946; DEFAULT-NEXT: br i1 [[TMP18]], label [[PRED_STORE_IF7:%.*]], label [[PRED_STORE_CONTINUE8:%.*]] 947; DEFAULT: pred.store.if7: 948; DEFAULT-NEXT: [[TMP19:%.*]] = add i64 [[INDEX]], 4 949; DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP19]] 950; DEFAULT-NEXT: [[TMP21:%.*]] = add i8 [[TMP0]], 4 951; DEFAULT-NEXT: store i8 [[TMP21]], ptr [[TMP20]], align 1 952; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE8]] 953; DEFAULT: pred.store.continue8: 954; DEFAULT-NEXT: [[TMP22:%.*]] = extractelement <8 x i1> [[TMP1]], i32 5 955; DEFAULT-NEXT: br i1 [[TMP22]], label [[PRED_STORE_IF9:%.*]], label [[PRED_STORE_CONTINUE10:%.*]] 956; DEFAULT: pred.store.if9: 957; DEFAULT-NEXT: [[TMP23:%.*]] = add i64 [[INDEX]], 5 958; DEFAULT-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP23]] 959; DEFAULT-NEXT: [[TMP25:%.*]] = add i8 [[TMP0]], 5 960; DEFAULT-NEXT: store i8 [[TMP25]], ptr [[TMP24]], align 1 961; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE10]] 962; DEFAULT: pred.store.continue10: 963; DEFAULT-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP1]], i32 6 964; DEFAULT-NEXT: br i1 [[TMP26]], label [[PRED_STORE_IF11:%.*]], label [[PRED_STORE_CONTINUE12:%.*]] 965; DEFAULT: pred.store.if11: 966; DEFAULT-NEXT: [[TMP27:%.*]] = add i64 [[INDEX]], 6 967; DEFAULT-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP27]] 968; DEFAULT-NEXT: [[TMP29:%.*]] = add i8 [[TMP0]], 6 969; DEFAULT-NEXT: store i8 [[TMP29]], ptr [[TMP28]], align 1 970; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE12]] 971; DEFAULT: pred.store.continue12: 972; DEFAULT-NEXT: [[TMP30:%.*]] = extractelement <8 x i1> [[TMP1]], i32 7 973; DEFAULT-NEXT: br i1 [[TMP30]], label [[PRED_STORE_IF13:%.*]], label [[PRED_STORE_CONTINUE14]] 974; DEFAULT: pred.store.if13: 975; DEFAULT-NEXT: [[TMP31:%.*]] = add i64 [[INDEX]], 7 976; DEFAULT-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP31]] 977; DEFAULT-NEXT: [[TMP33:%.*]] = add i8 [[TMP0]], 7 978; DEFAULT-NEXT: store i8 [[TMP33]], ptr [[TMP32]], align 1 979; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE14]] 980; DEFAULT: pred.store.continue14: 981; DEFAULT-NEXT: [[VEC_IND_NEXT]] = add <8 x i64> [[VEC_IND]], splat (i64 8) 982; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 983; DEFAULT-NEXT: br i1 true, label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]] 984; DEFAULT: middle.block: 985; DEFAULT-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] 986; DEFAULT: scalar.ph: 987; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 8, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 988; DEFAULT-NEXT: br label [[LOOP:%.*]] 989; DEFAULT: loop: 990; DEFAULT-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 991; DEFAULT-NEXT: [[IV_TRUNC:%.*]] = trunc i64 [[IV]] to i8 992; DEFAULT-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[IV]] 993; DEFAULT-NEXT: store i8 [[IV_TRUNC]], ptr [[GEP]], align 1 994; DEFAULT-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 995; DEFAULT-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 7 996; DEFAULT-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP25:![0-9]+]] 997; DEFAULT: exit: 998; DEFAULT-NEXT: ret void 999; 1000; PRED-LABEL: define void @low_trip_count_fold_tail_scalarized_store( 1001; PRED-SAME: ptr [[DST:%.*]]) { 1002; PRED-NEXT: entry: 1003; PRED-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 1004; PRED: vector.ph: 1005; PRED-NEXT: br label [[VECTOR_BODY:%.*]] 1006; PRED: vector.body: 1007; PRED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE14:%.*]] ] 1008; PRED-NEXT: [[VEC_IND:%.*]] = phi <8 x i64> [ <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE14]] ] 1009; PRED-NEXT: [[TMP0:%.*]] = trunc i64 [[INDEX]] to i8 1010; PRED-NEXT: [[TMP1:%.*]] = icmp ule <8 x i64> [[VEC_IND]], splat (i64 6) 1011; PRED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP1]], i32 0 1012; PRED-NEXT: br i1 [[TMP2]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 1013; PRED: pred.store.if: 1014; PRED-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 0 1015; PRED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP3]] 1016; PRED-NEXT: [[TMP5:%.*]] = add i8 [[TMP0]], 0 1017; PRED-NEXT: store i8 [[TMP5]], ptr [[TMP4]], align 1 1018; PRED-NEXT: br label [[PRED_STORE_CONTINUE]] 1019; PRED: pred.store.continue: 1020; PRED-NEXT: [[TMP6:%.*]] = extractelement <8 x i1> [[TMP1]], i32 1 1021; PRED-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] 1022; PRED: pred.store.if1: 1023; PRED-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 1 1024; PRED-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP7]] 1025; PRED-NEXT: [[TMP9:%.*]] = add i8 [[TMP0]], 1 1026; PRED-NEXT: store i8 [[TMP9]], ptr [[TMP8]], align 1 1027; PRED-NEXT: br label [[PRED_STORE_CONTINUE2]] 1028; PRED: pred.store.continue2: 1029; PRED-NEXT: [[TMP10:%.*]] = extractelement <8 x i1> [[TMP1]], i32 2 1030; PRED-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] 1031; PRED: pred.store.if3: 1032; PRED-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 2 1033; PRED-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP11]] 1034; PRED-NEXT: [[TMP13:%.*]] = add i8 [[TMP0]], 2 1035; PRED-NEXT: store i8 [[TMP13]], ptr [[TMP12]], align 1 1036; PRED-NEXT: br label [[PRED_STORE_CONTINUE4]] 1037; PRED: pred.store.continue4: 1038; PRED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP1]], i32 3 1039; PRED-NEXT: br i1 [[TMP14]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6:%.*]] 1040; PRED: pred.store.if5: 1041; PRED-NEXT: [[TMP15:%.*]] = add i64 [[INDEX]], 3 1042; PRED-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP15]] 1043; PRED-NEXT: [[TMP17:%.*]] = add i8 [[TMP0]], 3 1044; PRED-NEXT: store i8 [[TMP17]], ptr [[TMP16]], align 1 1045; PRED-NEXT: br label [[PRED_STORE_CONTINUE6]] 1046; PRED: pred.store.continue6: 1047; PRED-NEXT: [[TMP18:%.*]] = extractelement <8 x i1> [[TMP1]], i32 4 1048; PRED-NEXT: br i1 [[TMP18]], label [[PRED_STORE_IF7:%.*]], label [[PRED_STORE_CONTINUE8:%.*]] 1049; PRED: pred.store.if7: 1050; PRED-NEXT: [[TMP19:%.*]] = add i64 [[INDEX]], 4 1051; PRED-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP19]] 1052; PRED-NEXT: [[TMP21:%.*]] = add i8 [[TMP0]], 4 1053; PRED-NEXT: store i8 [[TMP21]], ptr [[TMP20]], align 1 1054; PRED-NEXT: br label [[PRED_STORE_CONTINUE8]] 1055; PRED: pred.store.continue8: 1056; PRED-NEXT: [[TMP22:%.*]] = extractelement <8 x i1> [[TMP1]], i32 5 1057; PRED-NEXT: br i1 [[TMP22]], label [[PRED_STORE_IF9:%.*]], label [[PRED_STORE_CONTINUE10:%.*]] 1058; PRED: pred.store.if9: 1059; PRED-NEXT: [[TMP23:%.*]] = add i64 [[INDEX]], 5 1060; PRED-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP23]] 1061; PRED-NEXT: [[TMP25:%.*]] = add i8 [[TMP0]], 5 1062; PRED-NEXT: store i8 [[TMP25]], ptr [[TMP24]], align 1 1063; PRED-NEXT: br label [[PRED_STORE_CONTINUE10]] 1064; PRED: pred.store.continue10: 1065; PRED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP1]], i32 6 1066; PRED-NEXT: br i1 [[TMP26]], label [[PRED_STORE_IF11:%.*]], label [[PRED_STORE_CONTINUE12:%.*]] 1067; PRED: pred.store.if11: 1068; PRED-NEXT: [[TMP27:%.*]] = add i64 [[INDEX]], 6 1069; PRED-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP27]] 1070; PRED-NEXT: [[TMP29:%.*]] = add i8 [[TMP0]], 6 1071; PRED-NEXT: store i8 [[TMP29]], ptr [[TMP28]], align 1 1072; PRED-NEXT: br label [[PRED_STORE_CONTINUE12]] 1073; PRED: pred.store.continue12: 1074; PRED-NEXT: [[TMP30:%.*]] = extractelement <8 x i1> [[TMP1]], i32 7 1075; PRED-NEXT: br i1 [[TMP30]], label [[PRED_STORE_IF13:%.*]], label [[PRED_STORE_CONTINUE14]] 1076; PRED: pred.store.if13: 1077; PRED-NEXT: [[TMP31:%.*]] = add i64 [[INDEX]], 7 1078; PRED-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP31]] 1079; PRED-NEXT: [[TMP33:%.*]] = add i8 [[TMP0]], 7 1080; PRED-NEXT: store i8 [[TMP33]], ptr [[TMP32]], align 1 1081; PRED-NEXT: br label [[PRED_STORE_CONTINUE14]] 1082; PRED: pred.store.continue14: 1083; PRED-NEXT: [[VEC_IND_NEXT]] = add <8 x i64> [[VEC_IND]], splat (i64 8) 1084; PRED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 1085; PRED-NEXT: br i1 true, label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP21:![0-9]+]] 1086; PRED: middle.block: 1087; PRED-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] 1088; PRED: scalar.ph: 1089; PRED-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 8, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 1090; PRED-NEXT: br label [[LOOP:%.*]] 1091; PRED: loop: 1092; PRED-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 1093; PRED-NEXT: [[IV_TRUNC:%.*]] = trunc i64 [[IV]] to i8 1094; PRED-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[IV]] 1095; PRED-NEXT: store i8 [[IV_TRUNC]], ptr [[GEP]], align 1 1096; PRED-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 1097; PRED-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 7 1098; PRED-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP22:![0-9]+]] 1099; PRED: exit: 1100; PRED-NEXT: ret void 1101; 1102entry: 1103 br label %loop 1104 1105loop: 1106 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] 1107 %iv.trunc = trunc i64 %iv to i8 1108 %gep = getelementptr i8, ptr %dst, i64 %iv 1109 store i8 %iv.trunc, ptr %gep, align 1 1110 %iv.next = add i64 %iv, 1 1111 %ec = icmp eq i64 %iv.next, 7 1112 br i1 %ec, label %exit, label %loop 1113 1114exit: 1115 ret void 1116} 1117 1118define void @test_conditional_interleave_group (ptr noalias %src.1, ptr noalias %src.2, ptr noalias %src.3, ptr noalias %src.4, ptr noalias %dst, i64 %N) #2 { 1119; DEFAULT-LABEL: define void @test_conditional_interleave_group( 1120; DEFAULT-SAME: ptr noalias [[SRC_1:%.*]], ptr noalias [[SRC_2:%.*]], ptr noalias [[SRC_3:%.*]], ptr noalias [[SRC_4:%.*]], ptr noalias [[DST:%.*]], i64 [[N:%.*]]) #[[ATTR3:[0-9]+]] { 1121; DEFAULT-NEXT: entry: 1122; DEFAULT-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1 1123; DEFAULT-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 32 1124; DEFAULT-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]] 1125; DEFAULT: vector.scevcheck: 1126; DEFAULT-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 4 1127; DEFAULT-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]]) 1128; DEFAULT-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i64, i1 } [[MUL]], 0 1129; DEFAULT-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i64, i1 } [[MUL]], 1 1130; DEFAULT-NEXT: [[TMP1:%.*]] = sub i64 0, [[MUL_RESULT]] 1131; DEFAULT-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[SCEVGEP]], i64 [[MUL_RESULT]] 1132; DEFAULT-NEXT: [[TMP3:%.*]] = icmp ult ptr [[TMP2]], [[SCEVGEP]] 1133; DEFAULT-NEXT: [[TMP4:%.*]] = or i1 [[TMP3]], [[MUL_OVERFLOW]] 1134; DEFAULT-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[DST]], i64 8 1135; DEFAULT-NEXT: [[MUL2:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]]) 1136; DEFAULT-NEXT: [[MUL_RESULT3:%.*]] = extractvalue { i64, i1 } [[MUL2]], 0 1137; DEFAULT-NEXT: [[MUL_OVERFLOW4:%.*]] = extractvalue { i64, i1 } [[MUL2]], 1 1138; DEFAULT-NEXT: [[TMP5:%.*]] = sub i64 0, [[MUL_RESULT3]] 1139; DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[SCEVGEP1]], i64 [[MUL_RESULT3]] 1140; DEFAULT-NEXT: [[TMP7:%.*]] = icmp ult ptr [[TMP6]], [[SCEVGEP1]] 1141; DEFAULT-NEXT: [[TMP8:%.*]] = or i1 [[TMP7]], [[MUL_OVERFLOW4]] 1142; DEFAULT-NEXT: [[MUL5:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]]) 1143; DEFAULT-NEXT: [[MUL_RESULT6:%.*]] = extractvalue { i64, i1 } [[MUL5]], 0 1144; DEFAULT-NEXT: [[MUL_OVERFLOW7:%.*]] = extractvalue { i64, i1 } [[MUL5]], 1 1145; DEFAULT-NEXT: [[TMP9:%.*]] = sub i64 0, [[MUL_RESULT6]] 1146; DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[DST]], i64 [[MUL_RESULT6]] 1147; DEFAULT-NEXT: [[TMP11:%.*]] = icmp ult ptr [[TMP10]], [[DST]] 1148; DEFAULT-NEXT: [[TMP12:%.*]] = or i1 [[TMP11]], [[MUL_OVERFLOW7]] 1149; DEFAULT-NEXT: [[TMP13:%.*]] = or i1 [[TMP4]], [[TMP8]] 1150; DEFAULT-NEXT: [[TMP14:%.*]] = or i1 [[TMP13]], [[TMP12]] 1151; DEFAULT-NEXT: br i1 [[TMP14]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 1152; DEFAULT: vector.ph: 1153; DEFAULT-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 8 1154; DEFAULT-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] 1155; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]] 1156; DEFAULT: vector.body: 1157; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE27:%.*]] ] 1158; DEFAULT-NEXT: [[VEC_IND:%.*]] = phi <8 x i64> [ <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE27]] ] 1159; DEFAULT-NEXT: [[TMP15:%.*]] = load float, ptr [[SRC_1]], align 4 1160; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <8 x float> poison, float [[TMP15]], i64 0 1161; DEFAULT-NEXT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT8]], <8 x float> poison, <8 x i32> zeroinitializer 1162; DEFAULT-NEXT: [[TMP16:%.*]] = load float, ptr [[SRC_2]], align 4 1163; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x float> poison, float [[TMP16]], i64 0 1164; DEFAULT-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT]], <8 x float> poison, <8 x i32> zeroinitializer 1165; DEFAULT-NEXT: [[TMP17:%.*]] = fmul <8 x float> [[BROADCAST_SPLAT]], zeroinitializer 1166; DEFAULT-NEXT: [[TMP18:%.*]] = call <8 x float> @llvm.fmuladd.v8f32(<8 x float> [[BROADCAST_SPLAT9]], <8 x float> zeroinitializer, <8 x float> [[TMP17]]) 1167; DEFAULT-NEXT: [[TMP19:%.*]] = load float, ptr [[SRC_3]], align 4 1168; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT10:%.*]] = insertelement <8 x float> poison, float [[TMP19]], i64 0 1169; DEFAULT-NEXT: [[BROADCAST_SPLAT11:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT10]], <8 x float> poison, <8 x i32> zeroinitializer 1170; DEFAULT-NEXT: [[TMP20:%.*]] = call <8 x float> @llvm.fmuladd.v8f32(<8 x float> [[BROADCAST_SPLAT11]], <8 x float> zeroinitializer, <8 x float> [[TMP18]]) 1171; DEFAULT-NEXT: [[TMP21:%.*]] = load float, ptr [[SRC_3]], align 4 1172; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT12:%.*]] = insertelement <8 x float> poison, float [[TMP21]], i64 0 1173; DEFAULT-NEXT: [[BROADCAST_SPLAT13:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT12]], <8 x float> poison, <8 x i32> zeroinitializer 1174; DEFAULT-NEXT: [[TMP22:%.*]] = fcmp ogt <8 x float> [[TMP20]], [[BROADCAST_SPLAT13]] 1175; DEFAULT-NEXT: [[TMP23:%.*]] = getelementptr { [4 x float] }, ptr [[DST]], <8 x i64> [[VEC_IND]] 1176; DEFAULT-NEXT: [[TMP24:%.*]] = extractelement <8 x i1> [[TMP22]], i32 0 1177; DEFAULT-NEXT: br i1 [[TMP24]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 1178; DEFAULT: pred.store.if: 1179; DEFAULT-NEXT: [[TMP25:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 0 1180; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP25]], align 4 1181; DEFAULT-NEXT: [[TMP26:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 0 1182; DEFAULT-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP26]], i64 4 1183; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP27]], align 4 1184; DEFAULT-NEXT: [[TMP28:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 0 1185; DEFAULT-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP28]], i64 8 1186; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP29]], align 4 1187; DEFAULT-NEXT: [[TMP30:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 0 1188; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP30]], align 4 1189; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE]] 1190; DEFAULT: pred.store.continue: 1191; DEFAULT-NEXT: [[TMP31:%.*]] = extractelement <8 x i1> [[TMP22]], i32 1 1192; DEFAULT-NEXT: br i1 [[TMP31]], label [[PRED_STORE_IF14:%.*]], label [[PRED_STORE_CONTINUE15:%.*]] 1193; DEFAULT: pred.store.if14: 1194; DEFAULT-NEXT: [[TMP32:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 1 1195; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP32]], align 4 1196; DEFAULT-NEXT: [[TMP33:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 1 1197; DEFAULT-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP33]], i64 4 1198; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP34]], align 4 1199; DEFAULT-NEXT: [[TMP35:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 1 1200; DEFAULT-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP35]], i64 8 1201; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP36]], align 4 1202; DEFAULT-NEXT: [[TMP37:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 1 1203; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP37]], align 4 1204; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE15]] 1205; DEFAULT: pred.store.continue15: 1206; DEFAULT-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP22]], i32 2 1207; DEFAULT-NEXT: br i1 [[TMP38]], label [[PRED_STORE_IF16:%.*]], label [[PRED_STORE_CONTINUE17:%.*]] 1208; DEFAULT: pred.store.if16: 1209; DEFAULT-NEXT: [[TMP39:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 2 1210; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP39]], align 4 1211; DEFAULT-NEXT: [[TMP40:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 2 1212; DEFAULT-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr [[TMP40]], i64 4 1213; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP41]], align 4 1214; DEFAULT-NEXT: [[TMP42:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 2 1215; DEFAULT-NEXT: [[TMP43:%.*]] = getelementptr i8, ptr [[TMP42]], i64 8 1216; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP43]], align 4 1217; DEFAULT-NEXT: [[TMP44:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 2 1218; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP44]], align 4 1219; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE17]] 1220; DEFAULT: pred.store.continue17: 1221; DEFAULT-NEXT: [[TMP45:%.*]] = extractelement <8 x i1> [[TMP22]], i32 3 1222; DEFAULT-NEXT: br i1 [[TMP45]], label [[PRED_STORE_IF18:%.*]], label [[PRED_STORE_CONTINUE19:%.*]] 1223; DEFAULT: pred.store.if18: 1224; DEFAULT-NEXT: [[TMP46:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 3 1225; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP46]], align 4 1226; DEFAULT-NEXT: [[TMP47:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 3 1227; DEFAULT-NEXT: [[TMP48:%.*]] = getelementptr i8, ptr [[TMP47]], i64 4 1228; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP48]], align 4 1229; DEFAULT-NEXT: [[TMP49:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 3 1230; DEFAULT-NEXT: [[TMP50:%.*]] = getelementptr i8, ptr [[TMP49]], i64 8 1231; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP50]], align 4 1232; DEFAULT-NEXT: [[TMP51:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 3 1233; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP51]], align 4 1234; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE19]] 1235; DEFAULT: pred.store.continue19: 1236; DEFAULT-NEXT: [[TMP52:%.*]] = extractelement <8 x i1> [[TMP22]], i32 4 1237; DEFAULT-NEXT: br i1 [[TMP52]], label [[PRED_STORE_IF20:%.*]], label [[PRED_STORE_CONTINUE21:%.*]] 1238; DEFAULT: pred.store.if20: 1239; DEFAULT-NEXT: [[TMP53:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 4 1240; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP53]], align 4 1241; DEFAULT-NEXT: [[TMP54:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 4 1242; DEFAULT-NEXT: [[TMP55:%.*]] = getelementptr i8, ptr [[TMP54]], i64 4 1243; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP55]], align 4 1244; DEFAULT-NEXT: [[TMP56:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 4 1245; DEFAULT-NEXT: [[TMP57:%.*]] = getelementptr i8, ptr [[TMP56]], i64 8 1246; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP57]], align 4 1247; DEFAULT-NEXT: [[TMP58:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 4 1248; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP58]], align 4 1249; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE21]] 1250; DEFAULT: pred.store.continue21: 1251; DEFAULT-NEXT: [[TMP59:%.*]] = extractelement <8 x i1> [[TMP22]], i32 5 1252; DEFAULT-NEXT: br i1 [[TMP59]], label [[PRED_STORE_IF22:%.*]], label [[PRED_STORE_CONTINUE23:%.*]] 1253; DEFAULT: pred.store.if22: 1254; DEFAULT-NEXT: [[TMP60:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 5 1255; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP60]], align 4 1256; DEFAULT-NEXT: [[TMP61:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 5 1257; DEFAULT-NEXT: [[TMP62:%.*]] = getelementptr i8, ptr [[TMP61]], i64 4 1258; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP62]], align 4 1259; DEFAULT-NEXT: [[TMP63:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 5 1260; DEFAULT-NEXT: [[TMP64:%.*]] = getelementptr i8, ptr [[TMP63]], i64 8 1261; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP64]], align 4 1262; DEFAULT-NEXT: [[TMP65:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 5 1263; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP65]], align 4 1264; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE23]] 1265; DEFAULT: pred.store.continue23: 1266; DEFAULT-NEXT: [[TMP66:%.*]] = extractelement <8 x i1> [[TMP22]], i32 6 1267; DEFAULT-NEXT: br i1 [[TMP66]], label [[PRED_STORE_IF24:%.*]], label [[PRED_STORE_CONTINUE25:%.*]] 1268; DEFAULT: pred.store.if24: 1269; DEFAULT-NEXT: [[TMP67:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 6 1270; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP67]], align 4 1271; DEFAULT-NEXT: [[TMP68:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 6 1272; DEFAULT-NEXT: [[TMP69:%.*]] = getelementptr i8, ptr [[TMP68]], i64 4 1273; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP69]], align 4 1274; DEFAULT-NEXT: [[TMP70:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 6 1275; DEFAULT-NEXT: [[TMP71:%.*]] = getelementptr i8, ptr [[TMP70]], i64 8 1276; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP71]], align 4 1277; DEFAULT-NEXT: [[TMP72:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 6 1278; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP72]], align 4 1279; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE25]] 1280; DEFAULT: pred.store.continue25: 1281; DEFAULT-NEXT: [[TMP73:%.*]] = extractelement <8 x i1> [[TMP22]], i32 7 1282; DEFAULT-NEXT: br i1 [[TMP73]], label [[PRED_STORE_IF26:%.*]], label [[PRED_STORE_CONTINUE27]] 1283; DEFAULT: pred.store.if26: 1284; DEFAULT-NEXT: [[TMP74:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 7 1285; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP74]], align 4 1286; DEFAULT-NEXT: [[TMP75:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 7 1287; DEFAULT-NEXT: [[TMP76:%.*]] = getelementptr i8, ptr [[TMP75]], i64 4 1288; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP76]], align 4 1289; DEFAULT-NEXT: [[TMP77:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 7 1290; DEFAULT-NEXT: [[TMP78:%.*]] = getelementptr i8, ptr [[TMP77]], i64 8 1291; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP78]], align 4 1292; DEFAULT-NEXT: [[TMP79:%.*]] = extractelement <8 x ptr> [[TMP23]], i32 7 1293; DEFAULT-NEXT: store float 0.000000e+00, ptr [[TMP79]], align 4 1294; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE27]] 1295; DEFAULT: pred.store.continue27: 1296; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 1297; DEFAULT-NEXT: [[VEC_IND_NEXT]] = add <8 x i64> [[VEC_IND]], splat (i64 8) 1298; DEFAULT-NEXT: [[TMP80:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 1299; DEFAULT-NEXT: br i1 [[TMP80]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP26:![0-9]+]] 1300; DEFAULT: middle.block: 1301; DEFAULT-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] 1302; DEFAULT-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 1303; DEFAULT: scalar.ph: 1304; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[ENTRY:%.*]] ] 1305; DEFAULT-NEXT: br label [[LOOP_HEADER:%.*]] 1306; DEFAULT: loop.header: 1307; DEFAULT-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 1308; DEFAULT-NEXT: [[TMP81:%.*]] = load float, ptr [[SRC_1]], align 4 1309; DEFAULT-NEXT: [[TMP82:%.*]] = load float, ptr [[SRC_2]], align 4 1310; DEFAULT-NEXT: [[MUL8_I_US:%.*]] = fmul float [[TMP82]], 0.000000e+00 1311; DEFAULT-NEXT: [[TMP83:%.*]] = tail call float @llvm.fmuladd.f32(float [[TMP81]], float 0.000000e+00, float [[MUL8_I_US]]) 1312; DEFAULT-NEXT: [[TMP84:%.*]] = load float, ptr [[SRC_3]], align 4 1313; DEFAULT-NEXT: [[TMP85:%.*]] = tail call float @llvm.fmuladd.f32(float [[TMP84]], float 0.000000e+00, float [[TMP83]]) 1314; DEFAULT-NEXT: [[TMP86:%.*]] = load float, ptr [[SRC_3]], align 4 1315; DEFAULT-NEXT: [[C:%.*]] = fcmp ogt float [[TMP85]], [[TMP86]] 1316; DEFAULT-NEXT: br i1 [[C]], label [[IF_THEN:%.*]], label [[LOOP_LATCH]] 1317; DEFAULT: if.then: 1318; DEFAULT-NEXT: [[DST_0:%.*]] = getelementptr { [4 x float] }, ptr [[DST]], i64 [[IV]] 1319; DEFAULT-NEXT: store float 0.000000e+00, ptr [[DST_0]], align 4 1320; DEFAULT-NEXT: [[DST_1:%.*]] = getelementptr i8, ptr [[DST_0]], i64 4 1321; DEFAULT-NEXT: store float 0.000000e+00, ptr [[DST_1]], align 4 1322; DEFAULT-NEXT: [[DST_2:%.*]] = getelementptr i8, ptr [[DST_0]], i64 8 1323; DEFAULT-NEXT: store float 0.000000e+00, ptr [[DST_2]], align 4 1324; DEFAULT-NEXT: [[DST_3:%.*]] = getelementptr i8, ptr [[DST_0]], i64 16 1325; DEFAULT-NEXT: store float 0.000000e+00, ptr [[DST_0]], align 4 1326; DEFAULT-NEXT: br label [[LOOP_LATCH]] 1327; DEFAULT: loop.latch: 1328; DEFAULT-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 1329; DEFAULT-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[N]] 1330; DEFAULT-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP27:![0-9]+]] 1331; DEFAULT: exit: 1332; DEFAULT-NEXT: ret void 1333; 1334; PRED-LABEL: define void @test_conditional_interleave_group( 1335; PRED-SAME: ptr noalias [[SRC_1:%.*]], ptr noalias [[SRC_2:%.*]], ptr noalias [[SRC_3:%.*]], ptr noalias [[SRC_4:%.*]], ptr noalias [[DST:%.*]], i64 [[N:%.*]]) #[[ATTR3:[0-9]+]] { 1336; PRED-NEXT: entry: 1337; PRED-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1 1338; PRED-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]] 1339; PRED: vector.scevcheck: 1340; PRED-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 4 1341; PRED-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]]) 1342; PRED-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i64, i1 } [[MUL]], 0 1343; PRED-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i64, i1 } [[MUL]], 1 1344; PRED-NEXT: [[TMP1:%.*]] = sub i64 0, [[MUL_RESULT]] 1345; PRED-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[SCEVGEP]], i64 [[MUL_RESULT]] 1346; PRED-NEXT: [[TMP3:%.*]] = icmp ult ptr [[TMP2]], [[SCEVGEP]] 1347; PRED-NEXT: [[TMP4:%.*]] = or i1 [[TMP3]], [[MUL_OVERFLOW]] 1348; PRED-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[DST]], i64 8 1349; PRED-NEXT: [[MUL2:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]]) 1350; PRED-NEXT: [[MUL_RESULT3:%.*]] = extractvalue { i64, i1 } [[MUL2]], 0 1351; PRED-NEXT: [[MUL_OVERFLOW4:%.*]] = extractvalue { i64, i1 } [[MUL2]], 1 1352; PRED-NEXT: [[TMP5:%.*]] = sub i64 0, [[MUL_RESULT3]] 1353; PRED-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[SCEVGEP1]], i64 [[MUL_RESULT3]] 1354; PRED-NEXT: [[TMP7:%.*]] = icmp ult ptr [[TMP6]], [[SCEVGEP1]] 1355; PRED-NEXT: [[TMP8:%.*]] = or i1 [[TMP7]], [[MUL_OVERFLOW4]] 1356; PRED-NEXT: [[MUL5:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 16, i64 [[N]]) 1357; PRED-NEXT: [[MUL_RESULT6:%.*]] = extractvalue { i64, i1 } [[MUL5]], 0 1358; PRED-NEXT: [[MUL_OVERFLOW7:%.*]] = extractvalue { i64, i1 } [[MUL5]], 1 1359; PRED-NEXT: [[TMP9:%.*]] = sub i64 0, [[MUL_RESULT6]] 1360; PRED-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[DST]], i64 [[MUL_RESULT6]] 1361; PRED-NEXT: [[TMP11:%.*]] = icmp ult ptr [[TMP10]], [[DST]] 1362; PRED-NEXT: [[TMP12:%.*]] = or i1 [[TMP11]], [[MUL_OVERFLOW7]] 1363; PRED-NEXT: [[TMP13:%.*]] = or i1 [[TMP4]], [[TMP8]] 1364; PRED-NEXT: [[TMP14:%.*]] = or i1 [[TMP13]], [[TMP12]] 1365; PRED-NEXT: br i1 [[TMP14]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] 1366; PRED: vector.ph: 1367; PRED-NEXT: [[N_RND_UP:%.*]] = add i64 [[TMP0]], 7 1368; PRED-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], 8 1369; PRED-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]] 1370; PRED-NEXT: [[TMP15:%.*]] = sub i64 [[TMP0]], 8 1371; PRED-NEXT: [[TMP16:%.*]] = icmp ugt i64 [[TMP0]], 8 1372; PRED-NEXT: [[TMP17:%.*]] = select i1 [[TMP16]], i64 [[TMP15]], i64 0 1373; PRED-NEXT: [[ACTIVE_LANE_MASK_ENTRY:%.*]] = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i64(i64 0, i64 [[TMP0]]) 1374; PRED-NEXT: br label [[VECTOR_BODY:%.*]] 1375; PRED: vector.body: 1376; PRED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE27:%.*]] ] 1377; PRED-NEXT: [[ACTIVE_LANE_MASK:%.*]] = phi <8 x i1> [ [[ACTIVE_LANE_MASK_ENTRY]], [[VECTOR_PH]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], [[PRED_STORE_CONTINUE27]] ] 1378; PRED-NEXT: [[VEC_IND:%.*]] = phi <8 x i64> [ <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE27]] ] 1379; PRED-NEXT: [[TMP18:%.*]] = load float, ptr [[SRC_1]], align 4 1380; PRED-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <8 x float> poison, float [[TMP18]], i64 0 1381; PRED-NEXT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT8]], <8 x float> poison, <8 x i32> zeroinitializer 1382; PRED-NEXT: [[TMP19:%.*]] = load float, ptr [[SRC_2]], align 4 1383; PRED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x float> poison, float [[TMP19]], i64 0 1384; PRED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT]], <8 x float> poison, <8 x i32> zeroinitializer 1385; PRED-NEXT: [[TMP20:%.*]] = fmul <8 x float> [[BROADCAST_SPLAT]], zeroinitializer 1386; PRED-NEXT: [[TMP21:%.*]] = call <8 x float> @llvm.fmuladd.v8f32(<8 x float> [[BROADCAST_SPLAT9]], <8 x float> zeroinitializer, <8 x float> [[TMP20]]) 1387; PRED-NEXT: [[TMP22:%.*]] = load float, ptr [[SRC_3]], align 4 1388; PRED-NEXT: [[BROADCAST_SPLATINSERT10:%.*]] = insertelement <8 x float> poison, float [[TMP22]], i64 0 1389; PRED-NEXT: [[BROADCAST_SPLAT11:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT10]], <8 x float> poison, <8 x i32> zeroinitializer 1390; PRED-NEXT: [[TMP23:%.*]] = call <8 x float> @llvm.fmuladd.v8f32(<8 x float> [[BROADCAST_SPLAT11]], <8 x float> zeroinitializer, <8 x float> [[TMP21]]) 1391; PRED-NEXT: [[TMP24:%.*]] = load float, ptr [[SRC_3]], align 4 1392; PRED-NEXT: [[BROADCAST_SPLATINSERT12:%.*]] = insertelement <8 x float> poison, float [[TMP24]], i64 0 1393; PRED-NEXT: [[BROADCAST_SPLAT13:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT12]], <8 x float> poison, <8 x i32> zeroinitializer 1394; PRED-NEXT: [[TMP25:%.*]] = fcmp ogt <8 x float> [[TMP23]], [[BROADCAST_SPLAT13]] 1395; PRED-NEXT: [[TMP26:%.*]] = select <8 x i1> [[ACTIVE_LANE_MASK]], <8 x i1> [[TMP25]], <8 x i1> zeroinitializer 1396; PRED-NEXT: [[TMP27:%.*]] = getelementptr { [4 x float] }, ptr [[DST]], <8 x i64> [[VEC_IND]] 1397; PRED-NEXT: [[TMP28:%.*]] = extractelement <8 x i1> [[TMP26]], i32 0 1398; PRED-NEXT: br i1 [[TMP28]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 1399; PRED: pred.store.if: 1400; PRED-NEXT: [[TMP29:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 0 1401; PRED-NEXT: store float 0.000000e+00, ptr [[TMP29]], align 4 1402; PRED-NEXT: [[TMP30:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 0 1403; PRED-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP30]], i64 4 1404; PRED-NEXT: store float 0.000000e+00, ptr [[TMP31]], align 4 1405; PRED-NEXT: [[TMP32:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 0 1406; PRED-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr [[TMP32]], i64 8 1407; PRED-NEXT: store float 0.000000e+00, ptr [[TMP33]], align 4 1408; PRED-NEXT: [[TMP34:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 0 1409; PRED-NEXT: store float 0.000000e+00, ptr [[TMP34]], align 4 1410; PRED-NEXT: br label [[PRED_STORE_CONTINUE]] 1411; PRED: pred.store.continue: 1412; PRED-NEXT: [[TMP35:%.*]] = extractelement <8 x i1> [[TMP26]], i32 1 1413; PRED-NEXT: br i1 [[TMP35]], label [[PRED_STORE_IF14:%.*]], label [[PRED_STORE_CONTINUE15:%.*]] 1414; PRED: pred.store.if14: 1415; PRED-NEXT: [[TMP36:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 1 1416; PRED-NEXT: store float 0.000000e+00, ptr [[TMP36]], align 4 1417; PRED-NEXT: [[TMP37:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 1 1418; PRED-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP37]], i64 4 1419; PRED-NEXT: store float 0.000000e+00, ptr [[TMP38]], align 4 1420; PRED-NEXT: [[TMP39:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 1 1421; PRED-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr [[TMP39]], i64 8 1422; PRED-NEXT: store float 0.000000e+00, ptr [[TMP40]], align 4 1423; PRED-NEXT: [[TMP41:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 1 1424; PRED-NEXT: store float 0.000000e+00, ptr [[TMP41]], align 4 1425; PRED-NEXT: br label [[PRED_STORE_CONTINUE15]] 1426; PRED: pred.store.continue15: 1427; PRED-NEXT: [[TMP42:%.*]] = extractelement <8 x i1> [[TMP26]], i32 2 1428; PRED-NEXT: br i1 [[TMP42]], label [[PRED_STORE_IF16:%.*]], label [[PRED_STORE_CONTINUE17:%.*]] 1429; PRED: pred.store.if16: 1430; PRED-NEXT: [[TMP43:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 2 1431; PRED-NEXT: store float 0.000000e+00, ptr [[TMP43]], align 4 1432; PRED-NEXT: [[TMP44:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 2 1433; PRED-NEXT: [[TMP45:%.*]] = getelementptr i8, ptr [[TMP44]], i64 4 1434; PRED-NEXT: store float 0.000000e+00, ptr [[TMP45]], align 4 1435; PRED-NEXT: [[TMP46:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 2 1436; PRED-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr [[TMP46]], i64 8 1437; PRED-NEXT: store float 0.000000e+00, ptr [[TMP47]], align 4 1438; PRED-NEXT: [[TMP48:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 2 1439; PRED-NEXT: store float 0.000000e+00, ptr [[TMP48]], align 4 1440; PRED-NEXT: br label [[PRED_STORE_CONTINUE17]] 1441; PRED: pred.store.continue17: 1442; PRED-NEXT: [[TMP49:%.*]] = extractelement <8 x i1> [[TMP26]], i32 3 1443; PRED-NEXT: br i1 [[TMP49]], label [[PRED_STORE_IF18:%.*]], label [[PRED_STORE_CONTINUE19:%.*]] 1444; PRED: pred.store.if18: 1445; PRED-NEXT: [[TMP50:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 3 1446; PRED-NEXT: store float 0.000000e+00, ptr [[TMP50]], align 4 1447; PRED-NEXT: [[TMP51:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 3 1448; PRED-NEXT: [[TMP52:%.*]] = getelementptr i8, ptr [[TMP51]], i64 4 1449; PRED-NEXT: store float 0.000000e+00, ptr [[TMP52]], align 4 1450; PRED-NEXT: [[TMP53:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 3 1451; PRED-NEXT: [[TMP54:%.*]] = getelementptr i8, ptr [[TMP53]], i64 8 1452; PRED-NEXT: store float 0.000000e+00, ptr [[TMP54]], align 4 1453; PRED-NEXT: [[TMP55:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 3 1454; PRED-NEXT: store float 0.000000e+00, ptr [[TMP55]], align 4 1455; PRED-NEXT: br label [[PRED_STORE_CONTINUE19]] 1456; PRED: pred.store.continue19: 1457; PRED-NEXT: [[TMP56:%.*]] = extractelement <8 x i1> [[TMP26]], i32 4 1458; PRED-NEXT: br i1 [[TMP56]], label [[PRED_STORE_IF20:%.*]], label [[PRED_STORE_CONTINUE21:%.*]] 1459; PRED: pred.store.if20: 1460; PRED-NEXT: [[TMP57:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 4 1461; PRED-NEXT: store float 0.000000e+00, ptr [[TMP57]], align 4 1462; PRED-NEXT: [[TMP58:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 4 1463; PRED-NEXT: [[TMP59:%.*]] = getelementptr i8, ptr [[TMP58]], i64 4 1464; PRED-NEXT: store float 0.000000e+00, ptr [[TMP59]], align 4 1465; PRED-NEXT: [[TMP60:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 4 1466; PRED-NEXT: [[TMP61:%.*]] = getelementptr i8, ptr [[TMP60]], i64 8 1467; PRED-NEXT: store float 0.000000e+00, ptr [[TMP61]], align 4 1468; PRED-NEXT: [[TMP62:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 4 1469; PRED-NEXT: store float 0.000000e+00, ptr [[TMP62]], align 4 1470; PRED-NEXT: br label [[PRED_STORE_CONTINUE21]] 1471; PRED: pred.store.continue21: 1472; PRED-NEXT: [[TMP63:%.*]] = extractelement <8 x i1> [[TMP26]], i32 5 1473; PRED-NEXT: br i1 [[TMP63]], label [[PRED_STORE_IF22:%.*]], label [[PRED_STORE_CONTINUE23:%.*]] 1474; PRED: pred.store.if22: 1475; PRED-NEXT: [[TMP64:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 5 1476; PRED-NEXT: store float 0.000000e+00, ptr [[TMP64]], align 4 1477; PRED-NEXT: [[TMP65:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 5 1478; PRED-NEXT: [[TMP66:%.*]] = getelementptr i8, ptr [[TMP65]], i64 4 1479; PRED-NEXT: store float 0.000000e+00, ptr [[TMP66]], align 4 1480; PRED-NEXT: [[TMP67:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 5 1481; PRED-NEXT: [[TMP68:%.*]] = getelementptr i8, ptr [[TMP67]], i64 8 1482; PRED-NEXT: store float 0.000000e+00, ptr [[TMP68]], align 4 1483; PRED-NEXT: [[TMP69:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 5 1484; PRED-NEXT: store float 0.000000e+00, ptr [[TMP69]], align 4 1485; PRED-NEXT: br label [[PRED_STORE_CONTINUE23]] 1486; PRED: pred.store.continue23: 1487; PRED-NEXT: [[TMP70:%.*]] = extractelement <8 x i1> [[TMP26]], i32 6 1488; PRED-NEXT: br i1 [[TMP70]], label [[PRED_STORE_IF24:%.*]], label [[PRED_STORE_CONTINUE25:%.*]] 1489; PRED: pred.store.if24: 1490; PRED-NEXT: [[TMP71:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 6 1491; PRED-NEXT: store float 0.000000e+00, ptr [[TMP71]], align 4 1492; PRED-NEXT: [[TMP72:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 6 1493; PRED-NEXT: [[TMP73:%.*]] = getelementptr i8, ptr [[TMP72]], i64 4 1494; PRED-NEXT: store float 0.000000e+00, ptr [[TMP73]], align 4 1495; PRED-NEXT: [[TMP74:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 6 1496; PRED-NEXT: [[TMP75:%.*]] = getelementptr i8, ptr [[TMP74]], i64 8 1497; PRED-NEXT: store float 0.000000e+00, ptr [[TMP75]], align 4 1498; PRED-NEXT: [[TMP76:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 6 1499; PRED-NEXT: store float 0.000000e+00, ptr [[TMP76]], align 4 1500; PRED-NEXT: br label [[PRED_STORE_CONTINUE25]] 1501; PRED: pred.store.continue25: 1502; PRED-NEXT: [[TMP77:%.*]] = extractelement <8 x i1> [[TMP26]], i32 7 1503; PRED-NEXT: br i1 [[TMP77]], label [[PRED_STORE_IF26:%.*]], label [[PRED_STORE_CONTINUE27]] 1504; PRED: pred.store.if26: 1505; PRED-NEXT: [[TMP78:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 7 1506; PRED-NEXT: store float 0.000000e+00, ptr [[TMP78]], align 4 1507; PRED-NEXT: [[TMP79:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 7 1508; PRED-NEXT: [[TMP80:%.*]] = getelementptr i8, ptr [[TMP79]], i64 4 1509; PRED-NEXT: store float 0.000000e+00, ptr [[TMP80]], align 4 1510; PRED-NEXT: [[TMP81:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 7 1511; PRED-NEXT: [[TMP82:%.*]] = getelementptr i8, ptr [[TMP81]], i64 8 1512; PRED-NEXT: store float 0.000000e+00, ptr [[TMP82]], align 4 1513; PRED-NEXT: [[TMP83:%.*]] = extractelement <8 x ptr> [[TMP27]], i32 7 1514; PRED-NEXT: store float 0.000000e+00, ptr [[TMP83]], align 4 1515; PRED-NEXT: br label [[PRED_STORE_CONTINUE27]] 1516; PRED: pred.store.continue27: 1517; PRED-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 8 1518; PRED-NEXT: [[ACTIVE_LANE_MASK_NEXT]] = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i64(i64 [[INDEX]], i64 [[TMP17]]) 1519; PRED-NEXT: [[TMP84:%.*]] = xor <8 x i1> [[ACTIVE_LANE_MASK_NEXT]], splat (i1 true) 1520; PRED-NEXT: [[VEC_IND_NEXT]] = add <8 x i64> [[VEC_IND]], splat (i64 8) 1521; PRED-NEXT: [[TMP85:%.*]] = extractelement <8 x i1> [[TMP84]], i32 0 1522; PRED-NEXT: br i1 [[TMP85]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP23:![0-9]+]] 1523; PRED: middle.block: 1524; PRED-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] 1525; PRED: scalar.ph: 1526; PRED-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[ENTRY:%.*]] ] 1527; PRED-NEXT: br label [[LOOP_HEADER:%.*]] 1528; PRED: loop.header: 1529; PRED-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 1530; PRED-NEXT: [[TMP86:%.*]] = load float, ptr [[SRC_1]], align 4 1531; PRED-NEXT: [[TMP87:%.*]] = load float, ptr [[SRC_2]], align 4 1532; PRED-NEXT: [[MUL8_I_US:%.*]] = fmul float [[TMP87]], 0.000000e+00 1533; PRED-NEXT: [[TMP88:%.*]] = tail call float @llvm.fmuladd.f32(float [[TMP86]], float 0.000000e+00, float [[MUL8_I_US]]) 1534; PRED-NEXT: [[TMP89:%.*]] = load float, ptr [[SRC_3]], align 4 1535; PRED-NEXT: [[TMP90:%.*]] = tail call float @llvm.fmuladd.f32(float [[TMP89]], float 0.000000e+00, float [[TMP88]]) 1536; PRED-NEXT: [[TMP91:%.*]] = load float, ptr [[SRC_3]], align 4 1537; PRED-NEXT: [[C:%.*]] = fcmp ogt float [[TMP90]], [[TMP91]] 1538; PRED-NEXT: br i1 [[C]], label [[IF_THEN:%.*]], label [[LOOP_LATCH]] 1539; PRED: if.then: 1540; PRED-NEXT: [[DST_0:%.*]] = getelementptr { [4 x float] }, ptr [[DST]], i64 [[IV]] 1541; PRED-NEXT: store float 0.000000e+00, ptr [[DST_0]], align 4 1542; PRED-NEXT: [[DST_1:%.*]] = getelementptr i8, ptr [[DST_0]], i64 4 1543; PRED-NEXT: store float 0.000000e+00, ptr [[DST_1]], align 4 1544; PRED-NEXT: [[DST_2:%.*]] = getelementptr i8, ptr [[DST_0]], i64 8 1545; PRED-NEXT: store float 0.000000e+00, ptr [[DST_2]], align 4 1546; PRED-NEXT: [[DST_3:%.*]] = getelementptr i8, ptr [[DST_0]], i64 16 1547; PRED-NEXT: store float 0.000000e+00, ptr [[DST_0]], align 4 1548; PRED-NEXT: br label [[LOOP_LATCH]] 1549; PRED: loop.latch: 1550; PRED-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 1551; PRED-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[N]] 1552; PRED-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP24:![0-9]+]] 1553; PRED: exit: 1554; PRED-NEXT: ret void 1555; 1556entry: 1557 br label %loop.header 1558 1559loop.header: 1560 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] 1561 %0 = load float, ptr %src.1, align 4 1562 %1 = load float, ptr %src.2, align 4 1563 %mul8.i.us = fmul float %1, 0.000000e+00 1564 %2 = tail call float @llvm.fmuladd.f32(float %0, float 0.000000e+00, float %mul8.i.us) 1565 %3 = load float, ptr %src.3, align 4 1566 %4 = tail call float @llvm.fmuladd.f32(float %3, float 0.000000e+00, float %2) 1567 %5 = load float, ptr %src.3, align 4 1568 %c = fcmp ogt float %4, %5 1569 br i1 %c, label %if.then, label %loop.latch 1570 1571if.then: 1572 %dst.0 = getelementptr { [4 x float] }, ptr %dst, i64 %iv 1573 store float 0.000000e+00, ptr %dst.0, align 4 1574 %dst.1 = getelementptr i8, ptr %dst.0, i64 4 1575 store float 0.000000e+00, ptr %dst.1, align 4 1576 %dst.2 = getelementptr i8, ptr %dst.0, i64 8 1577 store float 0.000000e+00, ptr %dst.2, align 4 1578 %dst.3 = getelementptr i8, ptr %dst.0, i64 16 1579 store float 0.000000e+00, ptr %dst.0, align 4 1580 br label %loop.latch 1581 1582loop.latch: 1583 %iv.next = add i64 %iv, 1 1584 %ec = icmp eq i64 %iv, %N 1585 br i1 %ec, label %exit, label %loop.header 1586 1587exit: 1588 ret void 1589} 1590 1591define void @redundant_branch_and_tail_folding(ptr %dst, i1 %c) optsize { 1592; DEFAULT-LABEL: define void @redundant_branch_and_tail_folding( 1593; DEFAULT-SAME: ptr [[DST:%.*]], i1 [[C:%.*]]) #[[ATTR4:[0-9]+]] { 1594; DEFAULT-NEXT: entry: 1595; DEFAULT-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 1596; DEFAULT: vector.ph: 1597; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]] 1598; DEFAULT: vector.body: 1599; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ] 1600; DEFAULT-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE6]] ] 1601; DEFAULT-NEXT: [[TMP0:%.*]] = icmp ule <4 x i64> [[VEC_IND]], splat (i64 20) 1602; DEFAULT-NEXT: [[TMP1:%.*]] = add nuw nsw <4 x i64> [[VEC_IND]], splat (i64 1) 1603; DEFAULT-NEXT: [[TMP2:%.*]] = trunc <4 x i64> [[TMP1]] to <4 x i32> 1604; DEFAULT-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 1605; DEFAULT-NEXT: br i1 [[TMP3]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 1606; DEFAULT: pred.store.if: 1607; DEFAULT-NEXT: [[TMP4:%.*]] = extractelement <4 x i32> [[TMP2]], i32 0 1608; DEFAULT-NEXT: store i32 [[TMP4]], ptr [[DST]], align 4 1609; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE]] 1610; DEFAULT: pred.store.continue: 1611; DEFAULT-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 1612; DEFAULT-NEXT: br i1 [[TMP5]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] 1613; DEFAULT: pred.store.if1: 1614; DEFAULT-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP2]], i32 1 1615; DEFAULT-NEXT: store i32 [[TMP6]], ptr [[DST]], align 4 1616; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE2]] 1617; DEFAULT: pred.store.continue2: 1618; DEFAULT-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 1619; DEFAULT-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] 1620; DEFAULT: pred.store.if3: 1621; DEFAULT-NEXT: [[TMP8:%.*]] = extractelement <4 x i32> [[TMP2]], i32 2 1622; DEFAULT-NEXT: store i32 [[TMP8]], ptr [[DST]], align 4 1623; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE4]] 1624; DEFAULT: pred.store.continue4: 1625; DEFAULT-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 1626; DEFAULT-NEXT: br i1 [[TMP9]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] 1627; DEFAULT: pred.store.if5: 1628; DEFAULT-NEXT: [[TMP10:%.*]] = extractelement <4 x i32> [[TMP2]], i32 3 1629; DEFAULT-NEXT: store i32 [[TMP10]], ptr [[DST]], align 4 1630; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE6]] 1631; DEFAULT: pred.store.continue6: 1632; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 1633; DEFAULT-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], splat (i64 4) 1634; DEFAULT-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], 24 1635; DEFAULT-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP28:![0-9]+]] 1636; DEFAULT: middle.block: 1637; DEFAULT-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] 1638; DEFAULT: scalar.ph: 1639; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 24, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 1640; DEFAULT-NEXT: br label [[LOOP_HEADER:%.*]] 1641; DEFAULT: loop.header: 1642; DEFAULT-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 1643; DEFAULT-NEXT: br i1 [[C]], label [[LOOP_LATCH]], label [[THEN:%.*]] 1644; DEFAULT: then: 1645; DEFAULT-NEXT: br label [[LOOP_LATCH]] 1646; DEFAULT: loop.latch: 1647; DEFAULT-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 1648; DEFAULT-NEXT: [[T:%.*]] = trunc nuw nsw i64 [[IV_NEXT]] to i32 1649; DEFAULT-NEXT: store i32 [[T]], ptr [[DST]], align 4 1650; DEFAULT-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 21 1651; DEFAULT-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP29:![0-9]+]] 1652; DEFAULT: exit: 1653; DEFAULT-NEXT: ret void 1654; 1655; PRED-LABEL: define void @redundant_branch_and_tail_folding( 1656; PRED-SAME: ptr [[DST:%.*]], i1 [[C:%.*]]) #[[ATTR4:[0-9]+]] { 1657; PRED-NEXT: entry: 1658; PRED-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 1659; PRED: vector.ph: 1660; PRED-NEXT: br label [[VECTOR_BODY:%.*]] 1661; PRED: vector.body: 1662; PRED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ] 1663; PRED-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE6]] ] 1664; PRED-NEXT: [[TMP0:%.*]] = icmp ule <4 x i64> [[VEC_IND]], splat (i64 20) 1665; PRED-NEXT: [[TMP1:%.*]] = add nuw nsw <4 x i64> [[VEC_IND]], splat (i64 1) 1666; PRED-NEXT: [[TMP2:%.*]] = trunc <4 x i64> [[TMP1]] to <4 x i32> 1667; PRED-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 1668; PRED-NEXT: br i1 [[TMP3]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 1669; PRED: pred.store.if: 1670; PRED-NEXT: [[TMP4:%.*]] = extractelement <4 x i32> [[TMP2]], i32 0 1671; PRED-NEXT: store i32 [[TMP4]], ptr [[DST]], align 4 1672; PRED-NEXT: br label [[PRED_STORE_CONTINUE]] 1673; PRED: pred.store.continue: 1674; PRED-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 1675; PRED-NEXT: br i1 [[TMP5]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] 1676; PRED: pred.store.if1: 1677; PRED-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP2]], i32 1 1678; PRED-NEXT: store i32 [[TMP6]], ptr [[DST]], align 4 1679; PRED-NEXT: br label [[PRED_STORE_CONTINUE2]] 1680; PRED: pred.store.continue2: 1681; PRED-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 1682; PRED-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] 1683; PRED: pred.store.if3: 1684; PRED-NEXT: [[TMP8:%.*]] = extractelement <4 x i32> [[TMP2]], i32 2 1685; PRED-NEXT: store i32 [[TMP8]], ptr [[DST]], align 4 1686; PRED-NEXT: br label [[PRED_STORE_CONTINUE4]] 1687; PRED: pred.store.continue4: 1688; PRED-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 1689; PRED-NEXT: br i1 [[TMP9]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] 1690; PRED: pred.store.if5: 1691; PRED-NEXT: [[TMP10:%.*]] = extractelement <4 x i32> [[TMP2]], i32 3 1692; PRED-NEXT: store i32 [[TMP10]], ptr [[DST]], align 4 1693; PRED-NEXT: br label [[PRED_STORE_CONTINUE6]] 1694; PRED: pred.store.continue6: 1695; PRED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 1696; PRED-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], splat (i64 4) 1697; PRED-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], 24 1698; PRED-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]] 1699; PRED: middle.block: 1700; PRED-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] 1701; PRED: scalar.ph: 1702; PRED-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 24, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 1703; PRED-NEXT: br label [[LOOP_HEADER:%.*]] 1704; PRED: loop.header: 1705; PRED-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 1706; PRED-NEXT: br i1 [[C]], label [[LOOP_LATCH]], label [[THEN:%.*]] 1707; PRED: then: 1708; PRED-NEXT: br label [[LOOP_LATCH]] 1709; PRED: loop.latch: 1710; PRED-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 1711; PRED-NEXT: [[T:%.*]] = trunc nuw nsw i64 [[IV_NEXT]] to i32 1712; PRED-NEXT: store i32 [[T]], ptr [[DST]], align 4 1713; PRED-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 21 1714; PRED-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP26:![0-9]+]] 1715; PRED: exit: 1716; PRED-NEXT: ret void 1717; 1718entry: 1719 br label %loop.header 1720 1721loop.header: 1722 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] 1723 br i1 %c, label %loop.latch, label %then 1724 1725then: 1726 br label %loop.latch 1727 1728loop.latch: 1729 %iv.next = add nuw nsw i64 %iv, 1 1730 %t = trunc nuw nsw i64 %iv.next to i32 1731 store i32 %t, ptr %dst, align 4 1732 %ec = icmp eq i64 %iv.next, 21 1733 br i1 %ec, label %exit, label %loop.header 1734 1735exit: 1736 ret void 1737} 1738 1739; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) 1740declare float @llvm.fmuladd.f32(float, float, float) #1 1741 1742attributes #1 = { "target-cpu"="neoverse-512tvb" } 1743attributes #2 = { vscale_range(2,2) "target-cpu"="neoverse-512tvb" } 1744 1745;. 1746; DEFAULT: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} 1747; DEFAULT: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} 1748; DEFAULT: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} 1749; DEFAULT: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} 1750; DEFAULT: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]} 1751; DEFAULT: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]} 1752; DEFAULT: [[LOOP6]] = distinct !{[[LOOP6]], [[META2]], [[META1]]} 1753; DEFAULT: [[META7]] = !{[[META8:![0-9]+]]} 1754; DEFAULT: [[META8]] = distinct !{[[META8]], [[META9:![0-9]+]]} 1755; DEFAULT: [[META9]] = distinct !{[[META9]], !"LVerDomain"} 1756; DEFAULT: [[META10]] = !{[[META11:![0-9]+]]} 1757; DEFAULT: [[META11]] = distinct !{[[META11]], [[META9]]} 1758; DEFAULT: [[META12]] = !{[[META13:![0-9]+]]} 1759; DEFAULT: [[META13]] = distinct !{[[META13]], [[META9]]} 1760; DEFAULT: [[META14]] = !{[[META15:![0-9]+]]} 1761; DEFAULT: [[META15]] = distinct !{[[META15]], [[META9]]} 1762; DEFAULT: [[META16]] = !{[[META17:![0-9]+]], [[META8]], [[META11]], [[META13]]} 1763; DEFAULT: [[META17]] = distinct !{[[META17]], [[META9]]} 1764; DEFAULT: [[META18]] = !{[[META17]]} 1765; DEFAULT: [[META19]] = !{[[META8]], [[META11]], [[META13]]} 1766; DEFAULT: [[LOOP20]] = distinct !{[[LOOP20]], [[META1]], [[META2]]} 1767; DEFAULT: [[LOOP21]] = distinct !{[[LOOP21]], [[META1]]} 1768; DEFAULT: [[LOOP22]] = distinct !{[[LOOP22]], [[META1]], [[META2]]} 1769; DEFAULT: [[LOOP23]] = distinct !{[[LOOP23]], [[META2]], [[META1]]} 1770; DEFAULT: [[LOOP24]] = distinct !{[[LOOP24]], [[META1]], [[META2]]} 1771; DEFAULT: [[LOOP25]] = distinct !{[[LOOP25]], [[META2]], [[META1]]} 1772; DEFAULT: [[LOOP26]] = distinct !{[[LOOP26]], [[META1]], [[META2]]} 1773; DEFAULT: [[LOOP27]] = distinct !{[[LOOP27]], [[META1]]} 1774; DEFAULT: [[LOOP28]] = distinct !{[[LOOP28]], [[META1]], [[META2]]} 1775; DEFAULT: [[LOOP29]] = distinct !{[[LOOP29]], [[META2]], [[META1]]} 1776;. 1777; PRED: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} 1778; PRED: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} 1779; PRED: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} 1780; PRED: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} 1781; PRED: [[META4]] = !{[[META5:![0-9]+]]} 1782; PRED: [[META5]] = distinct !{[[META5]], [[META6:![0-9]+]]} 1783; PRED: [[META6]] = distinct !{[[META6]], !"LVerDomain"} 1784; PRED: [[META7]] = !{[[META8:![0-9]+]]} 1785; PRED: [[META8]] = distinct !{[[META8]], [[META6]]} 1786; PRED: [[META9]] = !{[[META10:![0-9]+]]} 1787; PRED: [[META10]] = distinct !{[[META10]], [[META6]]} 1788; PRED: [[META11]] = !{[[META12:![0-9]+]]} 1789; PRED: [[META12]] = distinct !{[[META12]], [[META6]]} 1790; PRED: [[META13]] = !{[[META14:![0-9]+]], [[META5]], [[META8]], [[META10]]} 1791; PRED: [[META14]] = distinct !{[[META14]], [[META6]]} 1792; PRED: [[META15]] = !{[[META14]]} 1793; PRED: [[META16]] = !{[[META5]], [[META8]], [[META10]]} 1794; PRED: [[LOOP17]] = distinct !{[[LOOP17]], [[META1]], [[META2]]} 1795; PRED: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]]} 1796; PRED: [[LOOP19]] = distinct !{[[LOOP19]], [[META1]], [[META2]]} 1797; PRED: [[LOOP20]] = distinct !{[[LOOP20]], [[META2]], [[META1]]} 1798; PRED: [[LOOP21]] = distinct !{[[LOOP21]], [[META1]], [[META2]]} 1799; PRED: [[LOOP22]] = distinct !{[[LOOP22]], [[META2]], [[META1]]} 1800; PRED: [[LOOP23]] = distinct !{[[LOOP23]], [[META1]], [[META2]]} 1801; PRED: [[LOOP24]] = distinct !{[[LOOP24]], [[META1]]} 1802; PRED: [[LOOP25]] = distinct !{[[LOOP25]], [[META1]], [[META2]]} 1803; PRED: [[LOOP26]] = distinct !{[[LOOP26]], [[META2]], [[META1]]} 1804;. 1805