1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2; RUN: opt -p loop-vectorize -S %s | FileCheck %s 3 4target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" 5target triple = "arm64-apple-macosx14.0.0" 6 7define void @test_blend_feeding_replicated_store_1(i64 %N, ptr noalias %src, ptr %dst) { 8; CHECK-LABEL: define void @test_blend_feeding_replicated_store_1( 9; CHECK-SAME: i64 [[N:%.*]], ptr noalias [[SRC:%.*]], ptr [[DST:%.*]]) { 10; CHECK-NEXT: [[ENTRY:.*]]: 11; CHECK-NEXT: [[TMP43:%.*]] = add i64 [[N]], 1 12; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i64 [[TMP43]], 16 13; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] 14; CHECK: [[VECTOR_PH]]: 15; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP43]], 16 16; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 17; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i64 16, i64 [[N_MOD_VF]] 18; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP43]], [[TMP2]] 19; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x ptr> poison, ptr [[DST]], i64 0 20; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <16 x ptr> [[BROADCAST_SPLATINSERT]], <16 x ptr> poison, <16 x i32> zeroinitializer 21; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] 22; CHECK: [[VECTOR_BODY]]: 23; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE30:.*]] ] 24; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 0 25; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i64 [[TMP3]] 26; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 0 27; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i32>, ptr [[TMP5]], align 4 28; CHECK-NEXT: [[TMP6:%.*]] = icmp slt <16 x i32> [[WIDE_LOAD]], zeroinitializer 29; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i1> zeroinitializer, <16 x i1> zeroinitializer 30; CHECK-NEXT: [[TMP8:%.*]] = xor <16 x i1> [[TMP6]], splat (i1 true) 31; CHECK-NEXT: [[TMP9:%.*]] = or <16 x i1> [[TMP7]], [[TMP8]] 32; CHECK-NEXT: [[PREDPHI:%.*]] = select <16 x i1> [[TMP7]], <16 x ptr> [[BROADCAST_SPLAT]], <16 x ptr> zeroinitializer 33; CHECK-NEXT: [[TMP10:%.*]] = extractelement <16 x i1> [[TMP9]], i32 0 34; CHECK-NEXT: br i1 [[TMP10]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] 35; CHECK: [[PRED_STORE_IF]]: 36; CHECK-NEXT: [[TMP11:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 0 37; CHECK-NEXT: store i8 0, ptr [[TMP11]], align 1 38; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]] 39; CHECK: [[PRED_STORE_CONTINUE]]: 40; CHECK-NEXT: [[TMP12:%.*]] = extractelement <16 x i1> [[TMP9]], i32 1 41; CHECK-NEXT: br i1 [[TMP12]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2:.*]] 42; CHECK: [[PRED_STORE_IF1]]: 43; CHECK-NEXT: [[TMP13:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 1 44; CHECK-NEXT: store i8 0, ptr [[TMP13]], align 1 45; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE2]] 46; CHECK: [[PRED_STORE_CONTINUE2]]: 47; CHECK-NEXT: [[TMP14:%.*]] = extractelement <16 x i1> [[TMP9]], i32 2 48; CHECK-NEXT: br i1 [[TMP14]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]] 49; CHECK: [[PRED_STORE_IF3]]: 50; CHECK-NEXT: [[TMP15:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 2 51; CHECK-NEXT: store i8 0, ptr [[TMP15]], align 1 52; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE4]] 53; CHECK: [[PRED_STORE_CONTINUE4]]: 54; CHECK-NEXT: [[TMP16:%.*]] = extractelement <16 x i1> [[TMP9]], i32 3 55; CHECK-NEXT: br i1 [[TMP16]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6:.*]] 56; CHECK: [[PRED_STORE_IF5]]: 57; CHECK-NEXT: [[TMP17:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 3 58; CHECK-NEXT: store i8 0, ptr [[TMP17]], align 1 59; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE6]] 60; CHECK: [[PRED_STORE_CONTINUE6]]: 61; CHECK-NEXT: [[TMP18:%.*]] = extractelement <16 x i1> [[TMP9]], i32 4 62; CHECK-NEXT: br i1 [[TMP18]], label %[[PRED_STORE_IF7:.*]], label %[[PRED_STORE_CONTINUE8:.*]] 63; CHECK: [[PRED_STORE_IF7]]: 64; CHECK-NEXT: [[TMP19:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 4 65; CHECK-NEXT: store i8 0, ptr [[TMP19]], align 1 66; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE8]] 67; CHECK: [[PRED_STORE_CONTINUE8]]: 68; CHECK-NEXT: [[TMP20:%.*]] = extractelement <16 x i1> [[TMP9]], i32 5 69; CHECK-NEXT: br i1 [[TMP20]], label %[[PRED_STORE_IF9:.*]], label %[[PRED_STORE_CONTINUE10:.*]] 70; CHECK: [[PRED_STORE_IF9]]: 71; CHECK-NEXT: [[TMP21:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 5 72; CHECK-NEXT: store i8 0, ptr [[TMP21]], align 1 73; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE10]] 74; CHECK: [[PRED_STORE_CONTINUE10]]: 75; CHECK-NEXT: [[TMP22:%.*]] = extractelement <16 x i1> [[TMP9]], i32 6 76; CHECK-NEXT: br i1 [[TMP22]], label %[[PRED_STORE_IF11:.*]], label %[[PRED_STORE_CONTINUE12:.*]] 77; CHECK: [[PRED_STORE_IF11]]: 78; CHECK-NEXT: [[TMP23:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 6 79; CHECK-NEXT: store i8 0, ptr [[TMP23]], align 1 80; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE12]] 81; CHECK: [[PRED_STORE_CONTINUE12]]: 82; CHECK-NEXT: [[TMP24:%.*]] = extractelement <16 x i1> [[TMP9]], i32 7 83; CHECK-NEXT: br i1 [[TMP24]], label %[[PRED_STORE_IF13:.*]], label %[[PRED_STORE_CONTINUE14:.*]] 84; CHECK: [[PRED_STORE_IF13]]: 85; CHECK-NEXT: [[TMP25:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 7 86; CHECK-NEXT: store i8 0, ptr [[TMP25]], align 1 87; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE14]] 88; CHECK: [[PRED_STORE_CONTINUE14]]: 89; CHECK-NEXT: [[TMP26:%.*]] = extractelement <16 x i1> [[TMP9]], i32 8 90; CHECK-NEXT: br i1 [[TMP26]], label %[[PRED_STORE_IF15:.*]], label %[[PRED_STORE_CONTINUE16:.*]] 91; CHECK: [[PRED_STORE_IF15]]: 92; CHECK-NEXT: [[TMP27:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 8 93; CHECK-NEXT: store i8 0, ptr [[TMP27]], align 1 94; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE16]] 95; CHECK: [[PRED_STORE_CONTINUE16]]: 96; CHECK-NEXT: [[TMP28:%.*]] = extractelement <16 x i1> [[TMP9]], i32 9 97; CHECK-NEXT: br i1 [[TMP28]], label %[[PRED_STORE_IF17:.*]], label %[[PRED_STORE_CONTINUE18:.*]] 98; CHECK: [[PRED_STORE_IF17]]: 99; CHECK-NEXT: [[TMP29:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 9 100; CHECK-NEXT: store i8 0, ptr [[TMP29]], align 1 101; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE18]] 102; CHECK: [[PRED_STORE_CONTINUE18]]: 103; CHECK-NEXT: [[TMP30:%.*]] = extractelement <16 x i1> [[TMP9]], i32 10 104; CHECK-NEXT: br i1 [[TMP30]], label %[[PRED_STORE_IF19:.*]], label %[[PRED_STORE_CONTINUE20:.*]] 105; CHECK: [[PRED_STORE_IF19]]: 106; CHECK-NEXT: [[TMP31:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 10 107; CHECK-NEXT: store i8 0, ptr [[TMP31]], align 1 108; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE20]] 109; CHECK: [[PRED_STORE_CONTINUE20]]: 110; CHECK-NEXT: [[TMP32:%.*]] = extractelement <16 x i1> [[TMP9]], i32 11 111; CHECK-NEXT: br i1 [[TMP32]], label %[[PRED_STORE_IF21:.*]], label %[[PRED_STORE_CONTINUE22:.*]] 112; CHECK: [[PRED_STORE_IF21]]: 113; CHECK-NEXT: [[TMP33:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 11 114; CHECK-NEXT: store i8 0, ptr [[TMP33]], align 1 115; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE22]] 116; CHECK: [[PRED_STORE_CONTINUE22]]: 117; CHECK-NEXT: [[TMP34:%.*]] = extractelement <16 x i1> [[TMP9]], i32 12 118; CHECK-NEXT: br i1 [[TMP34]], label %[[PRED_STORE_IF23:.*]], label %[[PRED_STORE_CONTINUE24:.*]] 119; CHECK: [[PRED_STORE_IF23]]: 120; CHECK-NEXT: [[TMP35:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 12 121; CHECK-NEXT: store i8 0, ptr [[TMP35]], align 1 122; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE24]] 123; CHECK: [[PRED_STORE_CONTINUE24]]: 124; CHECK-NEXT: [[TMP36:%.*]] = extractelement <16 x i1> [[TMP9]], i32 13 125; CHECK-NEXT: br i1 [[TMP36]], label %[[PRED_STORE_IF25:.*]], label %[[PRED_STORE_CONTINUE26:.*]] 126; CHECK: [[PRED_STORE_IF25]]: 127; CHECK-NEXT: [[TMP37:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 13 128; CHECK-NEXT: store i8 0, ptr [[TMP37]], align 1 129; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE26]] 130; CHECK: [[PRED_STORE_CONTINUE26]]: 131; CHECK-NEXT: [[TMP38:%.*]] = extractelement <16 x i1> [[TMP9]], i32 14 132; CHECK-NEXT: br i1 [[TMP38]], label %[[PRED_STORE_IF27:.*]], label %[[PRED_STORE_CONTINUE28:.*]] 133; CHECK: [[PRED_STORE_IF27]]: 134; CHECK-NEXT: [[TMP39:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 14 135; CHECK-NEXT: store i8 0, ptr [[TMP39]], align 1 136; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE28]] 137; CHECK: [[PRED_STORE_CONTINUE28]]: 138; CHECK-NEXT: [[TMP40:%.*]] = extractelement <16 x i1> [[TMP9]], i32 15 139; CHECK-NEXT: br i1 [[TMP40]], label %[[PRED_STORE_IF29:.*]], label %[[PRED_STORE_CONTINUE30]] 140; CHECK: [[PRED_STORE_IF29]]: 141; CHECK-NEXT: [[TMP41:%.*]] = extractelement <16 x ptr> [[PREDPHI]], i32 15 142; CHECK-NEXT: store i8 0, ptr [[TMP41]], align 1 143; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE30]] 144; CHECK: [[PRED_STORE_CONTINUE30]]: 145; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16 146; CHECK-NEXT: [[TMP42:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 147; CHECK-NEXT: br i1 [[TMP42]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 148; CHECK: [[MIDDLE_BLOCK]]: 149; CHECK-NEXT: br label %[[SCALAR_PH]] 150; CHECK: [[SCALAR_PH]]: 151; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] 152; CHECK-NEXT: br label %[[LOOP_HEADER:.*]] 153; CHECK: [[LOOP_HEADER]]: 154; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] 155; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[N]] 156; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[CONTINUE:.*]] 157; CHECK: [[CONTINUE]]: 158; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i64 [[IV]] 159; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[GEP_SRC]], align 4 160; CHECK-NEXT: [[CMP2_NOT:%.*]] = icmp slt i32 [[TMP0]], 0 161; CHECK-NEXT: br i1 [[CMP2_NOT]], label %[[THEN:.*]], label %[[THEN_2:.*]] 162; CHECK: [[THEN]]: 163; CHECK-NEXT: br i1 false, label %[[THEN_2]], label %[[LOOP_LATCH]] 164; CHECK: [[THEN_2]]: 165; CHECK-NEXT: [[P:%.*]] = phi ptr [ null, %[[CONTINUE]] ], [ [[DST]], %[[THEN]] ] 166; CHECK-NEXT: store i8 0, ptr [[P]], align 1 167; CHECK-NEXT: br label %[[LOOP_LATCH]] 168; CHECK: [[LOOP_LATCH]]: 169; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 170; CHECK-NEXT: br label %[[LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]] 171; CHECK: [[EXIT]]: 172; CHECK-NEXT: ret void 173; 174entry: 175 br label %loop.header 176 177loop.header: ; preds = %loop.latch, %entry 178 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] 179 %ec = icmp eq i64 %iv, %N 180 br i1 %ec, label %exit, label %continue 181 182continue: 183 %gep.src = getelementptr inbounds i32, ptr %src, i64 %iv 184 %0 = load i32, ptr %gep.src, align 4 185 %cmp2.not = icmp slt i32 %0, 0 186 br i1 %cmp2.not, label %then, label %then.2 187 188then: 189 br i1 false, label %then.2, label %loop.latch 190 191then.2: 192 %p = phi ptr [ null, %continue ], [ %dst, %then ] 193 store i8 0, ptr %p, align 1 194 br label %loop.latch 195 196loop.latch: 197 %iv.next = add i64 %iv, 1 198 br label %loop.header 199 200exit: 201 ret void 202} 203 204define void @test_blend_feeding_replicated_store_2(ptr noalias %src, ptr %dst, i1 %c.0) { 205; CHECK-LABEL: define void @test_blend_feeding_replicated_store_2( 206; CHECK-SAME: ptr noalias [[SRC:%.*]], ptr [[DST:%.*]], i1 [[C_0:%.*]]) { 207; CHECK-NEXT: [[ENTRY:.*]]: 208; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] 209; CHECK: [[VECTOR_PH]]: 210; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i1> poison, i1 [[C_0]], i64 0 211; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <16 x i1> [[BROADCAST_SPLATINSERT]], <16 x i1> poison, <16 x i32> zeroinitializer 212; CHECK-NEXT: [[TMP5:%.*]] = xor <16 x i1> [[BROADCAST_SPLAT]], splat (i1 true) 213; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] 214; CHECK: [[VECTOR_BODY]]: 215; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE30:.*]] ] 216; CHECK-NEXT: [[IV:%.*]] = add i32 [[INDEX]], 0 217; CHECK-NEXT: [[GEP_SRC:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i32 [[IV]] 218; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[GEP_SRC]], i32 0 219; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP2]], align 1 220; CHECK-NEXT: [[TMP3:%.*]] = icmp eq <16 x i8> [[WIDE_LOAD]], zeroinitializer 221; CHECK-NEXT: [[TMP4:%.*]] = xor <16 x i1> [[TMP3]], splat (i1 true) 222; CHECK-NEXT: [[TMP6:%.*]] = select <16 x i1> [[TMP4]], <16 x i1> [[TMP5]], <16 x i1> zeroinitializer 223; CHECK-NEXT: [[TMP7:%.*]] = or <16 x i1> [[TMP6]], [[TMP3]] 224; CHECK-NEXT: [[PREDPHI:%.*]] = select <16 x i1> [[TMP6]], <16 x i8> zeroinitializer, <16 x i8> splat (i8 1) 225; CHECK-NEXT: [[TMP8:%.*]] = extractelement <16 x i1> [[TMP7]], i32 0 226; CHECK-NEXT: br i1 [[TMP8]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]] 227; CHECK: [[PRED_STORE_IF]]: 228; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[IV]] 229; CHECK-NEXT: [[TMP10:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 0 230; CHECK-NEXT: store i8 [[TMP10]], ptr [[TMP9]], align 1 231; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE]] 232; CHECK: [[PRED_STORE_CONTINUE]]: 233; CHECK-NEXT: [[TMP11:%.*]] = extractelement <16 x i1> [[TMP7]], i32 1 234; CHECK-NEXT: br i1 [[TMP11]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2:.*]] 235; CHECK: [[PRED_STORE_IF1]]: 236; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[INDEX]], 1 237; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP12]] 238; CHECK-NEXT: [[TMP14:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 1 239; CHECK-NEXT: store i8 [[TMP14]], ptr [[TMP13]], align 1 240; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE2]] 241; CHECK: [[PRED_STORE_CONTINUE2]]: 242; CHECK-NEXT: [[TMP15:%.*]] = extractelement <16 x i1> [[TMP7]], i32 2 243; CHECK-NEXT: br i1 [[TMP15]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]] 244; CHECK: [[PRED_STORE_IF3]]: 245; CHECK-NEXT: [[TMP16:%.*]] = add i32 [[INDEX]], 2 246; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP16]] 247; CHECK-NEXT: [[TMP18:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 2 248; CHECK-NEXT: store i8 [[TMP18]], ptr [[TMP17]], align 1 249; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE4]] 250; CHECK: [[PRED_STORE_CONTINUE4]]: 251; CHECK-NEXT: [[TMP19:%.*]] = extractelement <16 x i1> [[TMP7]], i32 3 252; CHECK-NEXT: br i1 [[TMP19]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6:.*]] 253; CHECK: [[PRED_STORE_IF5]]: 254; CHECK-NEXT: [[TMP20:%.*]] = add i32 [[INDEX]], 3 255; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP20]] 256; CHECK-NEXT: [[TMP22:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 3 257; CHECK-NEXT: store i8 [[TMP22]], ptr [[TMP21]], align 1 258; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE6]] 259; CHECK: [[PRED_STORE_CONTINUE6]]: 260; CHECK-NEXT: [[TMP23:%.*]] = extractelement <16 x i1> [[TMP7]], i32 4 261; CHECK-NEXT: br i1 [[TMP23]], label %[[PRED_STORE_IF7:.*]], label %[[PRED_STORE_CONTINUE8:.*]] 262; CHECK: [[PRED_STORE_IF7]]: 263; CHECK-NEXT: [[TMP24:%.*]] = add i32 [[INDEX]], 4 264; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP24]] 265; CHECK-NEXT: [[TMP26:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 4 266; CHECK-NEXT: store i8 [[TMP26]], ptr [[TMP25]], align 1 267; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE8]] 268; CHECK: [[PRED_STORE_CONTINUE8]]: 269; CHECK-NEXT: [[TMP27:%.*]] = extractelement <16 x i1> [[TMP7]], i32 5 270; CHECK-NEXT: br i1 [[TMP27]], label %[[PRED_STORE_IF9:.*]], label %[[PRED_STORE_CONTINUE10:.*]] 271; CHECK: [[PRED_STORE_IF9]]: 272; CHECK-NEXT: [[TMP28:%.*]] = add i32 [[INDEX]], 5 273; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP28]] 274; CHECK-NEXT: [[TMP30:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 5 275; CHECK-NEXT: store i8 [[TMP30]], ptr [[TMP29]], align 1 276; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE10]] 277; CHECK: [[PRED_STORE_CONTINUE10]]: 278; CHECK-NEXT: [[TMP31:%.*]] = extractelement <16 x i1> [[TMP7]], i32 6 279; CHECK-NEXT: br i1 [[TMP31]], label %[[PRED_STORE_IF11:.*]], label %[[PRED_STORE_CONTINUE12:.*]] 280; CHECK: [[PRED_STORE_IF11]]: 281; CHECK-NEXT: [[TMP32:%.*]] = add i32 [[INDEX]], 6 282; CHECK-NEXT: [[TMP33:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP32]] 283; CHECK-NEXT: [[TMP34:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 6 284; CHECK-NEXT: store i8 [[TMP34]], ptr [[TMP33]], align 1 285; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE12]] 286; CHECK: [[PRED_STORE_CONTINUE12]]: 287; CHECK-NEXT: [[TMP35:%.*]] = extractelement <16 x i1> [[TMP7]], i32 7 288; CHECK-NEXT: br i1 [[TMP35]], label %[[PRED_STORE_IF13:.*]], label %[[PRED_STORE_CONTINUE14:.*]] 289; CHECK: [[PRED_STORE_IF13]]: 290; CHECK-NEXT: [[TMP36:%.*]] = add i32 [[INDEX]], 7 291; CHECK-NEXT: [[TMP37:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP36]] 292; CHECK-NEXT: [[TMP38:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 7 293; CHECK-NEXT: store i8 [[TMP38]], ptr [[TMP37]], align 1 294; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE14]] 295; CHECK: [[PRED_STORE_CONTINUE14]]: 296; CHECK-NEXT: [[TMP39:%.*]] = extractelement <16 x i1> [[TMP7]], i32 8 297; CHECK-NEXT: br i1 [[TMP39]], label %[[PRED_STORE_IF15:.*]], label %[[PRED_STORE_CONTINUE16:.*]] 298; CHECK: [[PRED_STORE_IF15]]: 299; CHECK-NEXT: [[TMP40:%.*]] = add i32 [[INDEX]], 8 300; CHECK-NEXT: [[TMP41:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP40]] 301; CHECK-NEXT: [[TMP42:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 8 302; CHECK-NEXT: store i8 [[TMP42]], ptr [[TMP41]], align 1 303; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE16]] 304; CHECK: [[PRED_STORE_CONTINUE16]]: 305; CHECK-NEXT: [[TMP43:%.*]] = extractelement <16 x i1> [[TMP7]], i32 9 306; CHECK-NEXT: br i1 [[TMP43]], label %[[PRED_STORE_IF17:.*]], label %[[PRED_STORE_CONTINUE18:.*]] 307; CHECK: [[PRED_STORE_IF17]]: 308; CHECK-NEXT: [[TMP44:%.*]] = add i32 [[INDEX]], 9 309; CHECK-NEXT: [[TMP45:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP44]] 310; CHECK-NEXT: [[TMP46:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 9 311; CHECK-NEXT: store i8 [[TMP46]], ptr [[TMP45]], align 1 312; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE18]] 313; CHECK: [[PRED_STORE_CONTINUE18]]: 314; CHECK-NEXT: [[TMP47:%.*]] = extractelement <16 x i1> [[TMP7]], i32 10 315; CHECK-NEXT: br i1 [[TMP47]], label %[[PRED_STORE_IF19:.*]], label %[[PRED_STORE_CONTINUE20:.*]] 316; CHECK: [[PRED_STORE_IF19]]: 317; CHECK-NEXT: [[TMP48:%.*]] = add i32 [[INDEX]], 10 318; CHECK-NEXT: [[TMP49:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP48]] 319; CHECK-NEXT: [[TMP50:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 10 320; CHECK-NEXT: store i8 [[TMP50]], ptr [[TMP49]], align 1 321; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE20]] 322; CHECK: [[PRED_STORE_CONTINUE20]]: 323; CHECK-NEXT: [[TMP51:%.*]] = extractelement <16 x i1> [[TMP7]], i32 11 324; CHECK-NEXT: br i1 [[TMP51]], label %[[PRED_STORE_IF21:.*]], label %[[PRED_STORE_CONTINUE22:.*]] 325; CHECK: [[PRED_STORE_IF21]]: 326; CHECK-NEXT: [[TMP52:%.*]] = add i32 [[INDEX]], 11 327; CHECK-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP52]] 328; CHECK-NEXT: [[TMP54:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 11 329; CHECK-NEXT: store i8 [[TMP54]], ptr [[TMP53]], align 1 330; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE22]] 331; CHECK: [[PRED_STORE_CONTINUE22]]: 332; CHECK-NEXT: [[TMP55:%.*]] = extractelement <16 x i1> [[TMP7]], i32 12 333; CHECK-NEXT: br i1 [[TMP55]], label %[[PRED_STORE_IF23:.*]], label %[[PRED_STORE_CONTINUE24:.*]] 334; CHECK: [[PRED_STORE_IF23]]: 335; CHECK-NEXT: [[TMP56:%.*]] = add i32 [[INDEX]], 12 336; CHECK-NEXT: [[TMP57:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP56]] 337; CHECK-NEXT: [[TMP58:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 12 338; CHECK-NEXT: store i8 [[TMP58]], ptr [[TMP57]], align 1 339; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE24]] 340; CHECK: [[PRED_STORE_CONTINUE24]]: 341; CHECK-NEXT: [[TMP59:%.*]] = extractelement <16 x i1> [[TMP7]], i32 13 342; CHECK-NEXT: br i1 [[TMP59]], label %[[PRED_STORE_IF25:.*]], label %[[PRED_STORE_CONTINUE26:.*]] 343; CHECK: [[PRED_STORE_IF25]]: 344; CHECK-NEXT: [[TMP60:%.*]] = add i32 [[INDEX]], 13 345; CHECK-NEXT: [[TMP61:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP60]] 346; CHECK-NEXT: [[TMP62:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 13 347; CHECK-NEXT: store i8 [[TMP62]], ptr [[TMP61]], align 1 348; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE26]] 349; CHECK: [[PRED_STORE_CONTINUE26]]: 350; CHECK-NEXT: [[TMP63:%.*]] = extractelement <16 x i1> [[TMP7]], i32 14 351; CHECK-NEXT: br i1 [[TMP63]], label %[[PRED_STORE_IF27:.*]], label %[[PRED_STORE_CONTINUE28:.*]] 352; CHECK: [[PRED_STORE_IF27]]: 353; CHECK-NEXT: [[TMP64:%.*]] = add i32 [[INDEX]], 14 354; CHECK-NEXT: [[TMP65:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP64]] 355; CHECK-NEXT: [[TMP66:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 14 356; CHECK-NEXT: store i8 [[TMP66]], ptr [[TMP65]], align 1 357; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE28]] 358; CHECK: [[PRED_STORE_CONTINUE28]]: 359; CHECK-NEXT: [[TMP67:%.*]] = extractelement <16 x i1> [[TMP7]], i32 15 360; CHECK-NEXT: br i1 [[TMP67]], label %[[PRED_STORE_IF29:.*]], label %[[PRED_STORE_CONTINUE30]] 361; CHECK: [[PRED_STORE_IF29]]: 362; CHECK-NEXT: [[TMP68:%.*]] = add i32 [[INDEX]], 15 363; CHECK-NEXT: [[TMP69:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[TMP68]] 364; CHECK-NEXT: [[TMP70:%.*]] = extractelement <16 x i8> [[PREDPHI]], i32 15 365; CHECK-NEXT: store i8 [[TMP70]], ptr [[TMP69]], align 1 366; CHECK-NEXT: br label %[[PRED_STORE_CONTINUE30]] 367; CHECK: [[PRED_STORE_CONTINUE30]]: 368; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 16 369; CHECK-NEXT: [[TMP71:%.*]] = icmp eq i32 [[INDEX_NEXT]], 96 370; CHECK-NEXT: br i1 [[TMP71]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 371; CHECK: [[MIDDLE_BLOCK]]: 372; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[SCALAR_PH]] 373; CHECK: [[SCALAR_PH]]: 374; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 96, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] 375; CHECK-NEXT: br label %[[LOOP_HEADER:.*]] 376; CHECK: [[LOOP_HEADER]]: 377; CHECK-NEXT: [[IV1:%.*]] = phi i32 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ] 378; CHECK-NEXT: [[GEP_SRC1:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i32 [[IV1]] 379; CHECK-NEXT: [[L:%.*]] = load i8, ptr [[GEP_SRC1]], align 1 380; CHECK-NEXT: [[C_1:%.*]] = icmp eq i8 [[L]], 0 381; CHECK-NEXT: br i1 [[C_1]], label %[[THEN:.*]], label %[[ELSE:.*]] 382; CHECK: [[ELSE]]: 383; CHECK-NEXT: br i1 [[C_0]], label %[[LOOP_LATCH]], label %[[THEN]] 384; CHECK: [[THEN]]: 385; CHECK-NEXT: [[P:%.*]] = phi i8 [ 1, %[[LOOP_HEADER]] ], [ 0, %[[ELSE]] ] 386; CHECK-NEXT: [[GEP_DST:%.*]] = getelementptr inbounds i8, ptr [[DST]], i32 [[IV1]] 387; CHECK-NEXT: store i8 [[P]], ptr [[GEP_DST]], align 1 388; CHECK-NEXT: br label %[[LOOP_LATCH]] 389; CHECK: [[LOOP_LATCH]]: 390; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV1]], 1 391; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV_NEXT]], 100 392; CHECK-NEXT: br i1 [[EC]], label %[[EXIT]], label %[[LOOP_HEADER]], !llvm.loop [[LOOP5:![0-9]+]] 393; CHECK: [[EXIT]]: 394; CHECK-NEXT: ret void 395; 396entry: 397 br label %loop.header 398 399loop.header: 400 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ] 401 %gep.src = getelementptr inbounds i8, ptr %src, i32 %iv 402 %l = load i8, ptr %gep.src, align 1 403 %c.1 = icmp eq i8 %l, 0 404 br i1 %c.1, label %then, label %else 405 406else: 407 br i1 %c.0, label %loop.latch, label %then 408 409then: 410 %p = phi i8 [ 1, %loop.header ], [ 0, %else ] 411 %gep.dst = getelementptr inbounds i8, ptr %dst, i32 %iv 412 store i8 %p, ptr %gep.dst, align 1 413 br label %loop.latch 414 415loop.latch: 416 %iv.next = add i32 %iv, 1 417 %ec = icmp eq i32 %iv.next, 100 418 br i1 %ec, label %exit, label %loop.header 419 420exit: 421 ret void 422} 423 424define void @test_blend_feeding_replicated_store_3(ptr noalias %src.1, ptr noalias %src.2, ptr noalias %dst, i32 %x, i64 %N, i1 %c.2) { 425; CHECK-LABEL: define void @test_blend_feeding_replicated_store_3( 426; CHECK-SAME: ptr noalias [[SRC_1:%.*]], ptr noalias [[SRC_2:%.*]], ptr noalias [[DST:%.*]], i32 [[X:%.*]], i64 [[N:%.*]], i1 [[C_2:%.*]]) { 427; CHECK-NEXT: [[ENTRY:.*]]: 428; CHECK-NEXT: br label %[[LOOP_HEADER:.*]] 429; CHECK: [[LOOP_HEADER]]: 430; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ], [ 0, %[[ENTRY]] ] 431; CHECK-NEXT: [[L_1:%.*]] = load i8, ptr [[SRC_1]], align 1 432; CHECK-NEXT: [[EXT:%.*]] = zext i8 [[L_1]] to i32 433; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X]], [[EXT]] 434; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[MUL]], 255 435; CHECK-NEXT: [[L_2:%.*]] = load i8, ptr [[SRC_2]], align 1 436; CHECK-NEXT: [[C_1:%.*]] = icmp eq i8 [[L_2]], 0 437; CHECK-NEXT: br i1 [[C_1]], label %[[THEN:.*]], label %[[ELSE_1:.*]] 438; CHECK: [[ELSE_1]]: 439; CHECK-NEXT: br i1 [[C_2]], label %[[LOOP_LATCH]], label %[[ELSE_2:.*]] 440; CHECK: [[ELSE_2]]: 441; CHECK-NEXT: [[TRUNC_DIV:%.*]] = trunc i32 [[DIV]] to i8 442; CHECK-NEXT: br label %[[THEN]] 443; CHECK: [[THEN]]: 444; CHECK-NEXT: [[P:%.*]] = phi i8 [ 0, %[[LOOP_HEADER]] ], [ [[TRUNC_DIV]], %[[ELSE_2]] ] 445; CHECK-NEXT: store i8 [[P]], ptr [[DST]], align 1 446; CHECK-NEXT: br label %[[LOOP_LATCH]] 447; CHECK: [[LOOP_LATCH]]: 448; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 449; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], [[N]] 450; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP_HEADER]] 451; CHECK: [[EXIT]]: 452; CHECK-NEXT: ret void 453; 454entry: 455 br label %loop.header 456 457loop.header: 458 %iv = phi i64 [ %iv.next, %loop.latch ], [ 0, %entry ] 459 %l.1 = load i8, ptr %src.1, align 1 460 %ext = zext i8 %l.1 to i32 461 %mul = mul i32 %x, %ext 462 %div = sdiv i32 %mul, 255 463 %l.2 = load i8, ptr %src.2, align 1 464 %c.1 = icmp eq i8 %l.2, 0 465 br i1 %c.1, label %then, label %else.1 466 467else.1: 468 br i1 %c.2, label %loop.latch, label %else.2 469 470else.2: 471 %trunc.div = trunc i32 %div to i8 472 br label %then 473 474then: 475 %p = phi i8 [ 0, %loop.header ], [ %trunc.div, %else.2 ] 476 store i8 %p, ptr %dst, align 1 477 br label %loop.latch 478 479loop.latch: 480 %iv.next = add i64 %iv, 1 481 %ec = icmp eq i64 %iv, %N 482 br i1 %ec, label %exit, label %loop.header 483 484exit: 485 ret void 486} 487;. 488; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} 489; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} 490; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} 491; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} 492; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]} 493; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]} 494;. 495