xref: /llvm-project/llvm/test/Transforms/LoopUnroll/unroll-preserve-scev-lcssa.ll (revision 596e4ab97a1637d2c7781aed20e3d62bcf07ef5d)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -loop-reduce -loop-unroll -unroll-runtime -verify-scev -verify-loop-lcssa < %s -S | FileCheck %s
3
4; Test case for PR43458. We check that we do properly invalidate LCSSA phi
5; users in SCEV. Run -loop-reduce first, so SCEV is already populated.
6
7define void @spam() {
8; CHECK-LABEL: @spam(
9; CHECK-NEXT:  bb:
10; CHECK-NEXT:    br label [[BB3:%.*]]
11; CHECK:       bb3:
12; CHECK-NEXT:    br i1 false, label [[BB9:%.*]], label [[BB5_PREHEADER:%.*]]
13; CHECK:       bb5.preheader:
14; CHECK-NEXT:    br label [[BB5:%.*]]
15; CHECK:       bb5:
16; CHECK-NEXT:    br label [[BB9]]
17; CHECK:       bb9:
18; CHECK-NEXT:    [[TMP10:%.*]] = phi i64 [ 0, [[BB3]] ], [ 5, [[BB5]] ]
19; CHECK-NEXT:    [[TMP11:%.*]] = trunc i64 [[TMP10]] to i32
20; CHECK-NEXT:    [[TMP21:%.*]] = sext i32 [[TMP11]] to i64
21; CHECK-NEXT:    [[TMP22:%.*]] = icmp slt i64 0, [[TMP21]]
22; CHECK-NEXT:    br i1 [[TMP22]], label [[BB24_PREHEADER:%.*]], label [[BB29:%.*]]
23; CHECK:       bb24.preheader:
24; CHECK-NEXT:    br label [[BB24:%.*]]
25; CHECK:       bb24:
26; CHECK-NEXT:    [[TMP25:%.*]] = phi i64 [ [[TMP26:%.*]], [[BB24]] ], [ 0, [[BB24_PREHEADER]] ]
27; CHECK-NEXT:    [[TMP26]] = add nuw nsw i64 [[TMP25]], 1
28; CHECK-NEXT:    [[TMP27:%.*]] = icmp slt i64 [[TMP26]], [[TMP21]]
29; CHECK-NEXT:    br i1 [[TMP27]], label [[BB24]], label [[BB29_LOOPEXIT:%.*]]
30; CHECK:       bb29.loopexit:
31; CHECK-NEXT:    br label [[BB29]]
32; CHECK:       bb29:
33; CHECK-NEXT:    ret void
34;
35bb:
36  br label %bb3
37
38bb3:                                              ; preds = %bb9, %bb
39  %pv1 = phi i64 [ 0, %bb ], [ %iv1, %bb9]
40  %c1 = icmp eq i64 %pv1, 5
41  br i1 %c1, label %bb9, label %bb5
42
43bb5:                                              ; preds = %bb5, %bb3
44  %pv = phi i64 [ 0, %bb3], [ %tmp6, %bb5]
45  %tmp6 = add nsw i64 %pv, 1
46  %cond = icmp eq i64 %tmp6, 5
47  br i1 %cond, label %bb8, label %bb5
48
49bb8:                                              ; preds = %bb5
50  br label %bb9
51
52bb9:                                              ; preds = %bb8, %bb3
53  %tmp10 = phi i64 [ 0, %bb3 ], [ %tmp6, %bb8 ]
54  %tmp11 = trunc i64 %tmp10 to i32
55  %iv1 = add nsw i64 %pv1, 1
56  br i1 false, label %bb3, label %bb20
57
58bb20:                                             ; preds = %bb9
59  %tmp21 = sext i32 %tmp11 to i64
60  %tmp22 = icmp slt i64 0, %tmp21
61  br i1 %tmp22, label %bb24, label %bb29
62
63bb24:                                             ; preds = %bb24, %bb20
64  %tmp25 = phi i64 [ %tmp26, %bb24 ], [ 0, %bb20 ]
65  %tmp26 = add nuw nsw i64 %tmp25, 1
66  %tmp27 = icmp slt i64 %tmp26, %tmp21
67  br i1 %tmp27, label %bb24, label %bb29
68
69bb29:                                             ; preds = %bb24, %bb20
70  ret void
71}
72