1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -mtriple=x86_64-unknown-linux-gnu -passes='loop-unroll' -unroll-runtime -S < %s 2>&1 | FileCheck %s 3 4define void @mask-high(i64 %arg, ptr dereferenceable(4) %arg1) { 5; CHECK-LABEL: @mask-high( 6; CHECK-NEXT: bb: 7; CHECK-NEXT: [[I:%.*]] = load i32, ptr [[ARG1:%.*]], align 4 8; CHECK-NEXT: [[I2:%.*]] = sext i32 [[I]] to i64 9; CHECK-NEXT: [[I3:%.*]] = and i64 [[ARG:%.*]], -16 10; CHECK-NEXT: [[I4:%.*]] = or disjoint i64 1, [[I3]] 11; CHECK-NEXT: [[I5:%.*]] = icmp sgt i64 [[I4]], [[I2]] 12; CHECK-NEXT: br i1 [[I5]], label [[BB10:%.*]], label [[BB6_PREHEADER:%.*]] 13; CHECK: bb6.preheader: 14; CHECK-NEXT: br label [[BB6:%.*]] 15; CHECK: bb6: 16; CHECK-NEXT: [[I7:%.*]] = phi i64 [ [[I8:%.*]], [[BB6]] ], [ [[I4]], [[BB6_PREHEADER]] ] 17; CHECK-NEXT: [[I8]] = add i64 [[I7]], 1 18; CHECK-NEXT: [[I9:%.*]] = icmp slt i64 [[I7]], [[I2]] 19; CHECK-NEXT: br i1 [[I9]], label [[BB6]], label [[BB10_LOOPEXIT:%.*]] 20; CHECK: bb10.loopexit: 21; CHECK-NEXT: br label [[BB10]] 22; CHECK: bb10: 23; CHECK-NEXT: ret void 24; 25bb: 26 %i = load i32, ptr %arg1, align 4 27 %i2 = sext i32 %i to i64 28 %i3 = and i64 %arg, -16 29 %i4 = or disjoint i64 1, %i3 30 %i5 = icmp sgt i64 %i4, %i2 31 br i1 %i5, label %bb10, label %bb6 32 33bb6: ; preds = %bb6, %bb 34 %i7 = phi i64 [ %i4, %bb ], [ %i8, %bb6 ] 35 %i8 = add i64 %i7, 1 36 %i9 = icmp slt i64 %i7, %i2 37 br i1 %i9, label %bb6, label %bb10 38 39bb10: ; preds = %bb6, %bb 40 ret void 41} 42 43 44define void @mask-low(i64 %arg, ptr dereferenceable(4) %arg1) { 45; CHECK-LABEL: @mask-low( 46; CHECK-NEXT: bb: 47; CHECK-NEXT: [[I:%.*]] = load i32, ptr [[ARG1:%.*]], align 4 48; CHECK-NEXT: [[I2:%.*]] = sext i32 [[I]] to i64 49; CHECK-NEXT: [[I3:%.*]] = and i64 [[ARG:%.*]], 16 50; CHECK-NEXT: [[I4:%.*]] = add i64 1, [[I3]] 51; CHECK-NEXT: [[I5:%.*]] = icmp sgt i64 [[I4]], [[I2]] 52; CHECK-NEXT: br i1 [[I5]], label [[BB10:%.*]], label [[BB6_PREHEADER:%.*]] 53; CHECK: bb6.preheader: 54; CHECK-NEXT: br label [[BB6:%.*]] 55; CHECK: bb6: 56; CHECK-NEXT: [[I7:%.*]] = phi i64 [ [[I8:%.*]], [[BB6]] ], [ [[I4]], [[BB6_PREHEADER]] ] 57; CHECK-NEXT: [[I8]] = add i64 [[I7]], 1 58; CHECK-NEXT: [[I9:%.*]] = icmp slt i64 [[I7]], [[I2]] 59; CHECK-NEXT: br i1 [[I9]], label [[BB6]], label [[BB10_LOOPEXIT:%.*]] 60; CHECK: bb10.loopexit: 61; CHECK-NEXT: br label [[BB10]] 62; CHECK: bb10: 63; CHECK-NEXT: ret void 64; 65bb: 66 %i = load i32, ptr %arg1, align 4 67 %i2 = sext i32 %i to i64 68 %i3 = and i64 %arg, 16 69 %i4 = add i64 1, %i3 70 %i5 = icmp sgt i64 %i4, %i2 71 br i1 %i5, label %bb10, label %bb6 72 73bb6: ; preds = %bb6, %bb 74 %i7 = phi i64 [ %i4, %bb ], [ %i8, %bb6 ] 75 %i8 = add i64 %i7, 1 76 %i9 = icmp slt i64 %i7, %i2 77 br i1 %i9, label %bb6, label %bb10 78 79bb10: ; preds = %bb6, %bb 80 ret void 81} 82