xref: /llvm-project/llvm/test/Transforms/LoopStrengthReduce/X86/pr40514.ll (revision abb9f9fa06ef22be2b0287b9047d5cfed71d91d4)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -loop-reduce -S | FileCheck %s
3
4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
5target triple = "x86_64-unknown-linux-gnu"
6
7define i32 @pluto(i32 %arg) #0 {
8; CHECK-LABEL: @pluto(
9; CHECK-NEXT:  bb:
10; CHECK-NEXT:    br label [[BB10:%.*]]
11; CHECK:       bb1:
12; CHECK-NEXT:    store i64 [[LSR_IV_NEXT2:%.*]], ptr addrspace(1) undef, align 8
13; CHECK-NEXT:    ret i32 [[LSR_IV_NEXT:%.*]]
14; CHECK:       bb10:
15; CHECK-NEXT:    [[LSR_IV1:%.*]] = phi i64 [ [[LSR_IV_NEXT2]], [[BB10]] ], [ 9, [[BB:%.*]] ]
16; CHECK-NEXT:    [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT]], [[BB10]] ], [ undef, [[BB]] ]
17; CHECK-NEXT:    [[LSR_IV_NEXT]] = add i32 [[LSR_IV]], 1
18; CHECK-NEXT:    [[LSR_IV_NEXT2]] = add nuw nsw i64 [[LSR_IV1]], 1
19; CHECK-NEXT:    br i1 true, label [[BB1:%.*]], label [[BB10]]
20;
21
22bb:
23  br label %bb10
24
25bb1:                                              ; preds = %bb10
26  %tmp = and i64 %tmp24, 4294967295
27  %tmp2 = shl i64 %tmp23, 33
28  %tmp3 = ashr exact i64 %tmp2, 32
29  %tmp4 = add i64 undef, %tmp
30  %tmp5 = add i64 %tmp4, %tmp3
31  %tmp6 = add i64 %tmp5, undef
32  %tmp7 = add i64 %tmp6, undef
33  %tmp8 = add i64 undef, %tmp7
34  store i64 %tmp8, ptr addrspace(1) undef, align 8
35  %tmp9 = trunc i64 %tmp7 to i32
36  ret i32 %tmp9
37
38bb10:                                             ; preds = %bb10, %bb
39  %tmp11 = phi i64 [ 9, %bb ], [ %tmp24, %bb10 ]
40  %tmp12 = shl i64 undef, 1
41  %tmp13 = mul i64 %tmp12, %tmp12
42  %tmp14 = shl i64 %tmp13, 1
43  %tmp15 = mul i64 %tmp14, %tmp14
44  %tmp16 = shl i64 %tmp15, 1
45  %tmp17 = mul i64 %tmp16, %tmp16
46  %tmp18 = shl i64 %tmp17, 1
47  %tmp19 = mul i64 %tmp18, %tmp18
48  %tmp20 = shl i64 %tmp19, 1
49  %tmp21 = mul i64 %tmp20, %tmp20
50  %tmp22 = shl i64 %tmp21, 1
51  %tmp23 = mul i64 %tmp22, %tmp22
52  %tmp24 = add nuw nsw i64 %tmp11, 1
53  br i1 true, label %bb1, label %bb10
54}
55
56
57attributes #0 = { "target-cpu"="broadwell" "target-features"="+sse2,+cx16,+sahf,-tbm,-avx512ifma,-sha,-gfni,-fma4,-vpclmulqdq,+prfchw,+bmi2,-cldemote,+fsgsbase,-ptwrite,-xsavec,+popcnt,+aes,-avx512bitalg,-movdiri,-xsaves,-avx512vnni,-avx512vpopcntdq,-pconfig,-clwb,-avx512f,-clzero,-pku,+mmx,-lwp,-rdpid,-xop,+rdseed,-waitpkg,-movdir64b,-sse4a,-avx512bw,-clflushopt,+xsave,-avx512vbmi2,+64bit,-avx512vl,+invpcid,-avx512cd,+avx,-vaes,+rtm,+fma,+bmi,+rdrnd,-mwaitx,+sse4.1,+sse4.2,+avx2,-wbnoinvd,+sse,+lzcnt,+pclmul,+f16c,+ssse3,-sgx,-shstk,+cmov,-avx512vbmi,+movbe,+xsaveopt,-avx512dq,+adx,-avx512pf,+sse3" }
58