1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2; RUN: opt < %s -loop-reduce -S | FileCheck %s 3 4target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128" 5target triple = "riscv64" 6 7; This test was added as example motivation for the changes in #89927, which 8; causes LSR to drop solutions if deemed to be less profitable than the 9; starting point. At the time of adding this test, LSR's search heuristics 10; best identified solution was an unprofitable one. This could of course 11; change with future LSR improvements. 12 13%struct = type { i64, i32, i32, i32, i32, i32, i32, i32, i32, i64, i32, i64, i64, i32, i64 } 14 15define i32 @main() { 16; CHECK-LABEL: define i32 @main() { 17; CHECK-NEXT: [[CALL:%.*]] = tail call ptr null(i64 0) 18; CHECK-NEXT: br label %[[BB2:.*]] 19; CHECK: [[BB1:.*:]] 20; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[CALL]], align 4 21; CHECK-NEXT: ret i32 0 22; CHECK: [[BB2]]: 23; CHECK-NEXT: [[LSR_IV30:%.*]] = phi i64 [ [[LSR_IV_NEXT31:%.*]], %[[BB2]] ], [ 8, [[BB:%.*]] ] 24; CHECK-NEXT: [[LSR_IV27:%.*]] = phi i64 [ [[LSR_IV_NEXT28:%.*]], %[[BB2]] ], [ 12, [[BB]] ] 25; CHECK-NEXT: [[LSR_IV24:%.*]] = phi i64 [ [[LSR_IV_NEXT25:%.*]], %[[BB2]] ], [ 16, [[BB]] ] 26; CHECK-NEXT: [[LSR_IV21:%.*]] = phi i64 [ [[LSR_IV_NEXT22:%.*]], %[[BB2]] ], [ 20, [[BB]] ] 27; CHECK-NEXT: [[LSR_IV18:%.*]] = phi i64 [ [[LSR_IV_NEXT19:%.*]], %[[BB2]] ], [ 24, [[BB]] ] 28; CHECK-NEXT: [[LSR_IV15:%.*]] = phi i64 [ [[LSR_IV_NEXT16:%.*]], %[[BB2]] ], [ 28, [[BB]] ] 29; CHECK-NEXT: [[LSR_IV12:%.*]] = phi i64 [ [[LSR_IV_NEXT13:%.*]], %[[BB2]] ], [ 32, [[BB]] ] 30; CHECK-NEXT: [[LSR_IV9:%.*]] = phi i64 [ [[LSR_IV_NEXT10:%.*]], %[[BB2]] ], [ 36, [[BB]] ] 31; CHECK-NEXT: [[LSR_IV4:%.*]] = phi i64 [ [[LSR_IV_NEXT5:%.*]], %[[BB2]] ], [ 40, [[BB]] ] 32; CHECK-NEXT: [[LSR_IV1:%.*]] = phi i64 [ [[LSR_IV_NEXT2:%.*]], %[[BB2]] ], [ 48, [[BB]] ] 33; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], %[[BB2]] ], [ 72, [[BB]] ] 34; CHECK-NEXT: [[SCEVGEP32:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV30]] 35; CHECK-NEXT: store i32 0, ptr [[SCEVGEP32]], align 8 36; CHECK-NEXT: [[SCEVGEP29:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV27]] 37; CHECK-NEXT: store i32 0, ptr [[SCEVGEP29]], align 4 38; CHECK-NEXT: [[SCEVGEP26:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV24]] 39; CHECK-NEXT: store i32 0, ptr [[SCEVGEP26]], align 8 40; CHECK-NEXT: [[SCEVGEP23:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV21]] 41; CHECK-NEXT: store i32 0, ptr [[SCEVGEP23]], align 4 42; CHECK-NEXT: [[SCEVGEP20:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV18]] 43; CHECK-NEXT: store i32 0, ptr [[SCEVGEP20]], align 8 44; CHECK-NEXT: [[SCEVGEP17:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV15]] 45; CHECK-NEXT: store i32 0, ptr [[SCEVGEP17]], align 4 46; CHECK-NEXT: [[SCEVGEP14:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV12]] 47; CHECK-NEXT: store i32 0, ptr [[SCEVGEP14]], align 8 48; CHECK-NEXT: [[SCEVGEP11:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV9]] 49; CHECK-NEXT: store i32 0, ptr [[SCEVGEP11]], align 4 50; CHECK-NEXT: [[SCEVGEP6:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV4]] 51; CHECK-NEXT: store i64 0, ptr [[SCEVGEP6]], align 8 52; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV1]] 53; CHECK-NEXT: store i32 0, ptr [[SCEVGEP3]], align 8 54; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV]] 55; CHECK-NEXT: store i32 0, ptr [[SCEVGEP]], align 8 56; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV4]] 57; CHECK-NEXT: [[SCEVGEP8:%.*]] = getelementptr i8, ptr [[SCEVGEP7]], i64 40 58; CHECK-NEXT: store i64 0, ptr [[SCEVGEP8]], align 8 59; CHECK-NEXT: [[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 88 60; CHECK-NEXT: [[LSR_IV_NEXT2]] = add i64 [[LSR_IV1]], 88 61; CHECK-NEXT: [[LSR_IV_NEXT5]] = add i64 [[LSR_IV4]], 88 62; CHECK-NEXT: [[LSR_IV_NEXT10]] = add i64 [[LSR_IV9]], 88 63; CHECK-NEXT: [[LSR_IV_NEXT13]] = add i64 [[LSR_IV12]], 88 64; CHECK-NEXT: [[LSR_IV_NEXT16]] = add i64 [[LSR_IV15]], 88 65; CHECK-NEXT: [[LSR_IV_NEXT19]] = add i64 [[LSR_IV18]], 88 66; CHECK-NEXT: [[LSR_IV_NEXT22]] = add i64 [[LSR_IV21]], 88 67; CHECK-NEXT: [[LSR_IV_NEXT25]] = add i64 [[LSR_IV24]], 88 68; CHECK-NEXT: [[LSR_IV_NEXT28]] = add i64 [[LSR_IV27]], 88 69; CHECK-NEXT: [[LSR_IV_NEXT31]] = add i64 [[LSR_IV30]], 88 70; CHECK-NEXT: br label %[[BB2]] 71; 720: 73 %call = tail call ptr null(i64 0) 74 br label %2 75 761: 77 %load = load i32, ptr %call, align 4 78 ret i32 0 79 802: 81 %phi = phi i64 [ 0, %0 ], [ %add, %2 ] 82 %getelementptr = getelementptr %struct, ptr %call, i64 %phi 83 %getelementptr3 = getelementptr i8, ptr %getelementptr, i64 8 84 store i32 0, ptr %getelementptr3, align 8 85 %getelementptr4 = getelementptr i8, ptr %getelementptr, i64 12 86 store i32 0, ptr %getelementptr4, align 4 87 %getelementptr5 = getelementptr i8, ptr %getelementptr, i64 16 88 store i32 0, ptr %getelementptr5, align 8 89 %getelementptr6 = getelementptr i8, ptr %getelementptr, i64 20 90 store i32 0, ptr %getelementptr6, align 4 91 %getelementptr7 = getelementptr i8, ptr %getelementptr, i64 24 92 store i32 0, ptr %getelementptr7, align 8 93 %getelementptr8 = getelementptr i8, ptr %getelementptr, i64 28 94 store i32 0, ptr %getelementptr8, align 4 95 %getelementptr9 = getelementptr i8, ptr %getelementptr, i64 32 96 store i32 0, ptr %getelementptr9, align 8 97 %getelementptr10 = getelementptr i8, ptr %getelementptr, i64 36 98 store i32 0, ptr %getelementptr10, align 4 99 %getelementptr11 = getelementptr i8, ptr %getelementptr, i64 40 100 store i64 0, ptr %getelementptr11, align 8 101 %getelementptr12 = getelementptr i8, ptr %getelementptr, i64 48 102 store i32 0, ptr %getelementptr12, align 8 103 %getelementptr13 = getelementptr i8, ptr %getelementptr, i64 72 104 store i32 0, ptr %getelementptr13, align 8 105 %getelementptr14 = getelementptr i8, ptr %getelementptr, i64 80 106 store i64 0, ptr %getelementptr14, align 8 107 %add = add i64 %phi, 1 108 br label %2 109} 110