1; Test that LICM correctly detects conflicting accesses to memory in deeply 2; nested subloops. This works in the legacy PM due to a special retained map of 3; alias information for inner loops, and in the new PM it is recomputed for each 4; loop. 5; 6; RUN: opt -S -aa-pipeline=basic-aa -passes='require<opt-remark-emit>,loop-mssa(licm)' < %s | FileCheck %s 7; RUN: opt -S -passes=licm < %s | FileCheck %s 8 9define i32 @test(ptr %a, i64 %n.0, i64 %n.0.0, i64 %n.0.0.0, i64 %n.0.0.0.0) nounwind uwtable readonly { 10; CHECK-LABEL: define i32 @test 11entry: 12 %b = alloca i32 13 %c = alloca i32 14 br label %l.0.header 15; CHECK: %b = alloca i32 16; CHECK: %c = alloca i32 17; CHECK-NOT: load 18; CHECK: br 19 20l.0.header: 21 %iv.0 = phi i64 [ %iv.0.next, %l.0.latch ], [ 0, %entry ] 22 %iv.0.next = add i64 %iv.0, 1 23 %exitcond.0 = icmp eq i64 %iv.0.next, %n.0 24 %a.val = load i32, ptr %a 25 store i32 %a.val, ptr %b 26 %c.val = trunc i64 %iv.0 to i32 27 store i32 %c.val, ptr %c 28 br label %l.0.0.header 29; CHECK: %[[AV:.*]] = load i32, ptr %a 30; CHECK: store i32 %[[AV]], ptr %b 31; CHECK: %[[CT:.*]] = trunc i64 {{.*}} to i32 32; CHECK: store i32 %[[CT]], ptr %c 33; CHECK: br 34 35l.0.0.header: 36 %iv.0.0 = phi i64 [ %iv.0.0.next, %l.0.0.latch ], [ 0, %l.0.header ] 37 %iv.0.0.next = add i64 %iv.0.0, 1 38 %exitcond.0.0 = icmp eq i64 %iv.0.0.next, %n.0.0 39 br label %l.0.0.0.header 40; CHECK: br 41 42l.0.0.0.header: 43 %iv.0.0.0 = phi i64 [ %iv.0.0.0.next, %l.0.0.0.header ], [ 0, %l.0.0.header ] 44 %iv.0.0.0.next = add i64 %iv.0.0.0, 1 45 %exitcond.0.0.0 = icmp eq i64 %iv.0.0.0.next, %n.0.0.0 46 call void @llvm.memcpy.p0.p0.i64(ptr %a, ptr %c, i64 4, i1 false) 47 call void @llvm.memcpy.p0.p0.i64(ptr %b, ptr %c, i64 4, i1 false) 48 br i1 %exitcond.0.0.0, label %l.0.0.0.header, label %l.0.0.latch 49; CHECK: call void @llvm.memcpy.{{.*}}(ptr %a, ptr %c, i64 4 50; CHECK: call void @llvm.memcpy.{{.*}}(ptr %b, ptr %c, i64 4 51; CHECK: br 52 53l.0.0.latch: 54 br i1 %exitcond.0.0, label %l.0.0.header, label %l.0.latch 55; CHECK: br 56 57l.0.latch: 58 %b.val = load i32, ptr %b 59 br i1 %exitcond.0, label %exit, label %l.0.header 60; CHECK: %[[BV:.*]] = load i32, ptr %b 61; CHECK: br 62 63exit: 64 %result.lcssa = phi i32 [ %b.val, %l.0.latch ] 65 ret i32 %b.val 66; CHECK: %[[LCSSA:.*]] = phi i32 [ %[[BV]], %{{.*}} ] 67; CHECK: ret i32 %[[LCSSA]] 68} 69 70declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) 71