1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals 2; RUN: opt -S -passes="jump-threading" -debug-only=branch-prob < %s 2>&1 | FileCheck %s 3; RUN: opt -S -passes="require<branch-prob>,jump-threading" -debug-only=branch-prob < %s 2>&1 | FileCheck -check-prefixes=CHECK,CHECK-BPI %s 4; REQUIRES: asserts 5 6; CHECK-BPI-LABEL: ---- Branch Probability Info : unfold1 ---- 7; CHECK-BPI: set edge cond.false -> 0 successor probability to 0x20000000 / 0x80000000 = 25.00% 8; CHECK-BPI: set edge cond.false -> 1 successor probability to 0x60000000 / 0x80000000 = 75.00% 9; CHECK-BPI-LABEL: ---- Branch Probability Info : unfold2 ---- 10; CHECK-BPI: set edge cond.false -> 0 successor probability to 0x20000000 / 0x80000000 = 25.00% 11; CHECK-BPI: set edge cond.false -> 1 successor probability to 0x60000000 / 0x80000000 = 75.00% 12 13declare void @foo() 14declare void @bar() 15declare void @baz() 16declare void @quux() 17 18 19; Jump threading of branch with select as condition. 20; Mostly theoretical since instruction combining simplifies all selects of 21; booleans where at least one operand is true/false/undef. 22 23;. 24; CHECK: @[[ANCHOR:[a-zA-Z0-9_$"\\.-]+]] = constant [3 x ptr] [ptr blockaddress(@test_indirectbr, [[L1:%.*]]), ptr inttoptr (i32 1 to ptr), ptr blockaddress(@test_indirectbr, [[L3:%.*]])] 25;. 26define void @test_br(i1 %cond, i1 %value) nounwind { 27; CHECK-LABEL: @test_br( 28; CHECK-NEXT: entry: 29; CHECK-NEXT: br i1 [[COND:%.*]], label [[L1:%.*]], label [[L0:%.*]] 30; CHECK: L0: 31; CHECK-NEXT: call void @baz() 32; CHECK-NEXT: [[EXPR:%.*]] = select i1 [[COND]], i1 true, i1 [[VALUE:%.*]] 33; CHECK-NEXT: br i1 [[EXPR]], label [[L1]], label [[L2:%.*]] 34; CHECK: L1: 35; CHECK-NEXT: call void @foo() 36; CHECK-NEXT: ret void 37; CHECK: L2: 38; CHECK-NEXT: call void @bar() 39; CHECK-NEXT: ret void 40; 41entry: 42 br i1 %cond, label %L0, label %L3 43L0: 44 %expr = select i1 %cond, i1 true, i1 %value 45 br i1 %expr, label %L1, label %L2 46 47L1: 48 call void @foo() 49 ret void 50L2: 51 call void @bar() 52 ret void 53L3: 54 call void @baz() 55 br label %L0 56} 57 58 59; Jump threading of switch with select as condition. 60 61define void @test_switch(i1 %cond, i8 %value) nounwind { 62; CHECK-LABEL: @test_switch( 63; CHECK-NEXT: entry: 64; CHECK-NEXT: br i1 [[COND:%.*]], label [[L1:%.*]], label [[L0:%.*]] 65; CHECK: L0: 66; CHECK-NEXT: call void @quux() 67; CHECK-NEXT: [[EXPR:%.*]] = select i1 [[COND]], i8 1, i8 [[VALUE:%.*]] 68; CHECK-NEXT: switch i8 [[EXPR]], label [[L3:%.*]] [ 69; CHECK-NEXT: i8 1, label [[L1]] 70; CHECK-NEXT: i8 2, label [[L2:%.*]] 71; CHECK-NEXT: ] 72; CHECK: L1: 73; CHECK-NEXT: call void @foo() 74; CHECK-NEXT: ret void 75; CHECK: L2: 76; CHECK-NEXT: call void @bar() 77; CHECK-NEXT: ret void 78; CHECK: L3: 79; CHECK-NEXT: call void @baz() 80; CHECK-NEXT: ret void 81; 82entry: 83 br i1 %cond, label %L0, label %L4 84L0: 85 %expr = select i1 %cond, i8 1, i8 %value 86 switch i8 %expr, label %L3 [i8 1, label %L1 i8 2, label %L2] 87 88L1: 89 call void @foo() 90 ret void 91L2: 92 call void @bar() 93 ret void 94L3: 95 call void @baz() 96 ret void 97L4: 98 call void @quux() 99 br label %L0 100} 101 102; Make sure the blocks in the indirectbr test aren't trivially removable as 103; successors by taking their addresses. 104@anchor = constant [3 x ptr] [ 105 ptr blockaddress(@test_indirectbr, %L1), 106 ptr blockaddress(@test_indirectbr, %L2), 107 ptr blockaddress(@test_indirectbr, %L3) 108] 109 110 111; Jump threading of indirectbr with select as address. 112 113define void @test_indirectbr(i1 %cond, ptr %address) nounwind { 114; CHECK-LABEL: @test_indirectbr( 115; CHECK-NEXT: entry: 116; CHECK-NEXT: br i1 [[COND:%.*]], label [[L1:%.*]], label [[L3:%.*]] 117; CHECK: L1: 118; CHECK-NEXT: call void @foo() 119; CHECK-NEXT: ret void 120; CHECK: L3: 121; CHECK-NEXT: call void @baz() 122; CHECK-NEXT: ret void 123; 124entry: 125 br i1 %cond, label %L0, label %L3 126L0: 127 %indirect.goto.dest = select i1 %cond, ptr blockaddress(@test_indirectbr, %L1), ptr %address 128 indirectbr ptr %indirect.goto.dest, [label %L1, label %L2, label %L3] 129 130L1: 131 call void @foo() 132 ret void 133L2: 134 call void @bar() 135 ret void 136L3: 137 call void @baz() 138 ret void 139} 140 141 142; Jump threading of indirectbr with select as address. Test increased 143; duplication threshold for cases where indirectbr is being threaded 144; through. 145 146define void @test_indirectbr_thresh(i1 %cond, ptr %address) nounwind { 147; CHECK-LABEL: @test_indirectbr_thresh( 148; CHECK-NEXT: entry: 149; CHECK-NEXT: br i1 [[COND:%.*]], label [[L1:%.*]], label [[L3:%.*]] 150; CHECK: L1: 151; CHECK-NEXT: call void @quux() 152; CHECK-NEXT: call void @quux() 153; CHECK-NEXT: call void @quux() 154; CHECK-NEXT: call void @foo() 155; CHECK-NEXT: ret void 156; CHECK: L3: 157; CHECK-NEXT: call void @baz() 158; CHECK-NEXT: ret void 159; 160entry: 161 br i1 %cond, label %L0, label %L3 162L0: 163 %indirect.goto.dest = select i1 %cond, ptr blockaddress(@test_indirectbr_thresh, %L1), ptr %address 164 call void @quux() 165 call void @quux() 166 call void @quux() 167 indirectbr ptr %indirect.goto.dest, [label %L1, label %L2, label %L3] 168 169L1: 170 call void @foo() 171 ret void 172L2: 173 call void @bar() 174 ret void 175L3: 176 call void @baz() 177 ret void 178} 179 180 181; A more complicated case: the condition is a select based on a comparison. 182 183define void @test_switch_cmp(i1 %cond, i32 %val, i8 %value) nounwind { 184; CHECK-LABEL: @test_switch_cmp( 185; CHECK-NEXT: entry: 186; CHECK-NEXT: br i1 [[COND:%.*]], label [[L0:%.*]], label [[L0_THREAD:%.*]] 187; CHECK: L0: 188; CHECK-NEXT: [[VAL_PHI:%.*]] = phi i32 [ [[VAL:%.*]], [[ENTRY:%.*]] ] 189; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[VAL_PHI]], 0 190; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[CMP]] 191; CHECK-NEXT: br i1 [[COND_FR]], label [[L1:%.*]], label [[TMP0:%.*]] 192; CHECK: 0: 193; CHECK-NEXT: [[TMP1:%.*]] = phi i8 [ [[VALUE:%.*]], [[L0]] ] 194; CHECK-NEXT: switch i8 [[TMP1]], label [[L3:%.*]] [ 195; CHECK-NEXT: i8 1, label [[L1]] 196; CHECK-NEXT: i8 2, label [[L2:%.*]] 197; CHECK-NEXT: ] 198; CHECK: L1: 199; CHECK-NEXT: call void @foo() 200; CHECK-NEXT: ret void 201; CHECK: L2: 202; CHECK-NEXT: call void @bar() 203; CHECK-NEXT: ret void 204; CHECK: L3: 205; CHECK-NEXT: call void @baz() 206; CHECK-NEXT: ret void 207; CHECK: L0.thread: 208; CHECK-NEXT: call void @quux() 209; CHECK-NEXT: br label [[L1]] 210; 211entry: 212 br i1 %cond, label %L0, label %L4 213L0: 214 %val.phi = phi i32 [%val, %entry], [-1, %L4] 215 %cmp = icmp slt i32 %val.phi, 0 216 %expr = select i1 %cmp, i8 1, i8 %value 217 switch i8 %expr, label %L3 [i8 1, label %L1 i8 2, label %L2] 218 219L1: 220 call void @foo() 221 ret void 222L2: 223 call void @bar() 224 ret void 225L3: 226 call void @baz() 227 ret void 228L4: 229 call void @quux() 230 br label %L0 231} 232 233; Make sure the edge value of %0 from entry to L2 includes 0 and L3 is 234; reachable. 235define void @test_switch_default(ptr nocapture %status) nounwind { 236; CHECK-LABEL: @test_switch_default( 237; CHECK-NEXT: entry: 238; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[STATUS:%.*]], align 4 239; CHECK-NEXT: switch i32 [[TMP0]], label [[L2:%.*]] [ 240; CHECK-NEXT: i32 5061, label [[L2_THREAD:%.*]] 241; CHECK-NEXT: i32 0, label [[L2]] 242; CHECK-NEXT: ] 243; CHECK: L2.thread: 244; CHECK-NEXT: store i32 10025, ptr [[STATUS]], align 4 245; CHECK-NEXT: br label [[L4:%.*]] 246; CHECK: L2: 247; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[TMP0]], [[ENTRY:%.*]] ], [ [[TMP0]], [[ENTRY]] ] 248; CHECK-NEXT: [[CMP57_I:%.*]] = icmp eq i32 [[TMP1]], 0 249; CHECK-NEXT: br i1 [[CMP57_I]], label [[L3:%.*]], label [[L4]] 250; CHECK: L3: 251; CHECK-NEXT: store i32 10000, ptr [[STATUS]], align 4 252; CHECK-NEXT: br label [[L4]] 253; CHECK: L4: 254; CHECK-NEXT: ret void 255; 256entry: 257 %0 = load i32, ptr %status, align 4 258 switch i32 %0, label %L2 [ 259 i32 5061, label %L1 260 i32 0, label %L2 261 ] 262 263L1: 264 store i32 10025, ptr %status, align 4 265 br label %L2 266 267L2: 268 %1 = load i32, ptr %status, align 4 269 %cmp57.i = icmp eq i32 %1, 0 270 br i1 %cmp57.i, label %L3, label %L4 271 272L3: 273 store i32 10000, ptr %status, align 4 274 br label %L4 275 276L4: 277 ret void 278} 279 280define void @unfold1(double %x, double %y) nounwind !prof !1 { 281; CHECK-LABEL: @unfold1( 282; CHECK-NEXT: entry: 283; CHECK-NEXT: [[SUB:%.*]] = fsub double [[X:%.*]], [[Y:%.*]] 284; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt double [[SUB]], 1.000000e+01 285; CHECK-NEXT: br i1 [[CMP]], label [[COND_END4:%.*]], label [[COND_FALSE:%.*]] 286; CHECK: cond.false: 287; CHECK-NEXT: [[ADD:%.*]] = fadd double [[X]], [[Y]] 288; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[ADD]], 1.000000e+01 289; CHECK-NEXT: br i1 [[CMP1]], label [[COND_END4]], label [[IF_THEN:%.*]], !prof [[PROF1:![0-9]+]] 290; CHECK: cond.end4: 291; CHECK-NEXT: [[COND5:%.*]] = phi double [ [[SUB]], [[ENTRY:%.*]] ], [ [[ADD]], [[COND_FALSE]] ] 292; CHECK-NEXT: [[CMP6:%.*]] = fcmp oeq double [[COND5]], 0.000000e+00 293; CHECK-NEXT: br i1 [[CMP6]], label [[IF_THEN]], label [[IF_END:%.*]] 294; CHECK: if.then: 295; CHECK-NEXT: call void @foo() 296; CHECK-NEXT: br label [[IF_END]] 297; CHECK: if.end: 298; CHECK-NEXT: ret void 299; 300entry: 301 %sub = fsub double %x, %y 302 %cmp = fcmp ogt double %sub, 1.000000e+01 303 br i1 %cmp, label %cond.end4, label %cond.false 304 305cond.false: ; preds = %entry 306 %add = fadd double %x, %y 307 %cmp1 = fcmp ogt double %add, 1.000000e+01 308 %add. = select i1 %cmp1, double %add, double 0.000000e+00, !prof !0 309 br label %cond.end4 310 311cond.end4: ; preds = %entry, %cond.false 312 %cond5 = phi double [ %add., %cond.false ], [ %sub, %entry ] 313 %cmp6 = fcmp oeq double %cond5, 0.000000e+00 314 br i1 %cmp6, label %if.then, label %if.end 315 316if.then: ; preds = %cond.end4 317 call void @foo() 318 br label %if.end 319 320if.end: ; preds = %if.then, %cond.end4 321 ret void 322 323} 324 325 326define void @unfold2(i32 %x, i32 %y) nounwind !prof !1 { 327; CHECK-LABEL: @unfold2( 328; CHECK-NEXT: entry: 329; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]] 330; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[SUB]], 10 331; CHECK-NEXT: br i1 [[CMP]], label [[IF_END:%.*]], label [[COND_FALSE:%.*]] 332; CHECK: cond.false: 333; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[X]], [[Y]] 334; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[ADD]], 10 335; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[COND_END4:%.*]], !prof [[PROF1]] 336; CHECK: cond.end4: 337; CHECK-NEXT: [[COND5:%.*]] = phi i32 [ [[ADD]], [[COND_FALSE]] ] 338; CHECK-NEXT: [[CMP6:%.*]] = icmp eq i32 [[COND5]], 0 339; CHECK-NEXT: br i1 [[CMP6]], label [[IF_THEN]], label [[IF_END]] 340; CHECK: if.then: 341; CHECK-NEXT: call void @foo() 342; CHECK-NEXT: br label [[IF_END]] 343; CHECK: if.end: 344; CHECK-NEXT: ret void 345; 346entry: 347 %sub = sub nsw i32 %x, %y 348 %cmp = icmp sgt i32 %sub, 10 349 br i1 %cmp, label %cond.end4, label %cond.false 350 351cond.false: ; preds = %entry 352 %add = add nsw i32 %x, %y 353 %cmp1 = icmp sgt i32 %add, 10 354 %add. = select i1 %cmp1, i32 0, i32 %add, !prof !0 355 br label %cond.end4 356 357cond.end4: ; preds = %entry, %cond.false 358 %cond5 = phi i32 [ %add., %cond.false ], [ %sub, %entry ] 359 %cmp6 = icmp eq i32 %cond5, 0 360 br i1 %cmp6, label %if.then, label %if.end 361 362if.then: ; preds = %cond.end4 363 call void @foo() 364 br label %if.end 365 366if.end: ; preds = %if.then, %cond.end4 367 ret void 368 369} 370 371 372define i32 @unfold3(i32 %u, i32 %v, i32 %w, i32 %x, i32 %y, i32 %z, i32 %j) nounwind { 373; CHECK-LABEL: @unfold3( 374; CHECK-NEXT: entry: 375; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[J:%.*]], 2 376; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[U:%.*]], [[V:%.*]] 377; CHECK-NEXT: br i1 [[CMP_I]], label [[DOTEXIT_THREAD4:%.*]], label [[COND_FALSE_I:%.*]] 378; CHECK: cond.false.i: 379; CHECK-NEXT: [[CMP4_I:%.*]] = icmp sgt i32 [[U]], [[V]] 380; CHECK-NEXT: br i1 [[CMP4_I]], label [[DOTEXIT_THREAD:%.*]], label [[COND_FALSE_6_I:%.*]] 381; CHECK: cond.false.6.i: 382; CHECK-NEXT: [[CMP8_I:%.*]] = icmp slt i32 [[W:%.*]], [[X:%.*]] 383; CHECK-NEXT: br i1 [[CMP8_I]], label [[DOTEXIT_THREAD4]], label [[COND_FALSE_10_I:%.*]] 384; CHECK: cond.false.10.i: 385; CHECK-NEXT: [[CMP13_I:%.*]] = icmp sgt i32 [[W]], [[X]] 386; CHECK-NEXT: br i1 [[CMP13_I]], label [[DOTEXIT_THREAD]], label [[DOTEXIT:%.*]] 387; CHECK: .exit: 388; CHECK-NEXT: [[PHITMP:%.*]] = icmp sge i32 [[Y:%.*]], [[Z:%.*]] 389; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[PHITMP]] 390; CHECK-NEXT: br i1 [[COND_FR]], label [[DOTEXIT_THREAD]], label [[DOTEXIT_THREAD4]] 391; CHECK: .exit.thread: 392; CHECK-NEXT: br label [[DOTEXIT_THREAD4]] 393; CHECK: .exit.thread4: 394; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ [[J]], [[DOTEXIT_THREAD]] ], [ [[ADD3]], [[DOTEXIT]] ], [ [[ADD3]], [[ENTRY:%.*]] ], [ [[ADD3]], [[COND_FALSE_6_I]] ] 395; CHECK-NEXT: ret i32 [[TMP0]] 396; 397entry: 398 %add3 = add nsw i32 %j, 2 399 %cmp.i = icmp slt i32 %u, %v 400 br i1 %cmp.i, label %.exit, label %cond.false.i 401 402cond.false.i: ; preds = %entry 403 %cmp4.i = icmp sgt i32 %u, %v 404 br i1 %cmp4.i, label %.exit, label %cond.false.6.i 405 406cond.false.6.i: ; preds = %cond.false.i 407 %cmp8.i = icmp slt i32 %w, %x 408 br i1 %cmp8.i, label %.exit, label %cond.false.10.i 409 410cond.false.10.i: ; preds = %cond.false.6.i 411 %cmp13.i = icmp sgt i32 %w, %x 412 br i1 %cmp13.i, label %.exit, label %cond.false.15.i 413 414cond.false.15.i: ; preds = %cond.false.10.i 415 %phitmp = icmp sge i32 %y, %z 416 br label %.exit 417 418.exit: ; preds = %entry, %cond.false.i, %cond.false.6.i, %cond.false.10.i, %cond.false.15.i 419 %cond23.i = phi i1 [ false, %entry ], [ true, %cond.false.i ], [ false, %cond.false.6.i ], [ %phitmp, %cond.false.15.i ], [ true, %cond.false.10.i ] 420 %j.add3 = select i1 %cond23.i, i32 %j, i32 %add3 421 ret i32 %j.add3 422 423} 424 425define i32 @unfold4(i32 %u, i32 %v, i32 %w, i32 %x, i32 %y, i32 %z, i32 %j) nounwind { 426; CHECK-LABEL: @unfold4( 427; CHECK-NEXT: entry: 428; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[J:%.*]], 2 429; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[U:%.*]], [[V:%.*]] 430; CHECK-NEXT: br i1 [[CMP_I]], label [[DOTEXIT_THREAD:%.*]], label [[COND_FALSE_I:%.*]] 431; CHECK: cond.false.i: 432; CHECK-NEXT: [[CMP4_I:%.*]] = icmp sgt i32 [[U]], [[V]] 433; CHECK-NEXT: br i1 [[CMP4_I]], label [[DOTEXIT_THREAD5:%.*]], label [[COND_FALSE_6_I:%.*]] 434; CHECK: cond.false.6.i: 435; CHECK-NEXT: [[CMP8_I:%.*]] = icmp slt i32 [[W:%.*]], [[X:%.*]] 436; CHECK-NEXT: br i1 [[CMP8_I]], label [[DOTEXIT_THREAD]], label [[COND_FALSE_10_I:%.*]] 437; CHECK: cond.false.10.i: 438; CHECK-NEXT: [[CMP13_I:%.*]] = icmp sgt i32 [[W]], [[X]] 439; CHECK-NEXT: br i1 [[CMP13_I]], label [[DOTEXIT_THREAD5]], label [[DOTEXIT:%.*]] 440; CHECK: .exit: 441; CHECK-NEXT: [[CMP19_I:%.*]] = icmp sge i32 [[Y:%.*]], [[Z:%.*]] 442; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP19_I]] to i32 443; CHECK-NEXT: [[LNOT_I18:%.*]] = icmp eq i32 [[CONV]], 1 444; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[LNOT_I18]] 445; CHECK-NEXT: br i1 [[COND_FR]], label [[DOTEXIT_THREAD]], label [[DOTEXIT_THREAD5]] 446; CHECK: .exit.thread: 447; CHECK-NEXT: br label [[DOTEXIT_THREAD5]] 448; CHECK: .exit.thread5: 449; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ [[J]], [[DOTEXIT_THREAD]] ], [ [[ADD3]], [[DOTEXIT]] ], [ [[ADD3]], [[COND_FALSE_I]] ], [ [[ADD3]], [[COND_FALSE_10_I]] ] 450; CHECK-NEXT: ret i32 [[TMP0]] 451; 452entry: 453 %add3 = add nsw i32 %j, 2 454 %cmp.i = icmp slt i32 %u, %v 455 br i1 %cmp.i, label %.exit, label %cond.false.i 456 457cond.false.i: ; preds = %entry 458 %cmp4.i = icmp sgt i32 %u, %v 459 br i1 %cmp4.i, label %.exit, label %cond.false.6.i 460 461cond.false.6.i: ; preds = %cond.false.i 462 %cmp8.i = icmp slt i32 %w, %x 463 br i1 %cmp8.i, label %.exit, label %cond.false.10.i 464 465cond.false.10.i: ; preds = %cond.false.6.i 466 %cmp13.i = icmp sgt i32 %w, %x 467 br i1 %cmp13.i, label %.exit, label %cond.false.15.i 468 469cond.false.15.i: ; preds = %cond.false.10.i 470 %cmp19.i = icmp sge i32 %y, %z 471 %conv = zext i1 %cmp19.i to i32 472 br label %.exit 473 474.exit: ; preds = %entry, %cond.false.i, %cond.false.6.i, %cond.false.10.i, %cond.false.15.i 475 %cond23.i = phi i32 [ 1, %entry ], [ 0, %cond.false.i ], [ 1, %cond.false.6.i ], [ %conv, %cond.false.15.i ], [ 0, %cond.false.10.i ] 476 %lnot.i18 = icmp eq i32 %cond23.i, 1 477 %j.add3 = select i1 %lnot.i18, i32 %j, i32 %add3 478 ret i32 %j.add3 479 480} 481 482define i32 @unfold5(i32 %u, i32 %v, i32 %w, i32 %x, i32 %y, i32 %z, i32 %j) nounwind { 483; CHECK-LABEL: @unfold5( 484; CHECK-NEXT: entry: 485; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[J:%.*]], 2 486; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[U:%.*]], [[V:%.*]] 487; CHECK-NEXT: br i1 [[CMP_I]], label [[DOTEXIT:%.*]], label [[COND_FALSE_I:%.*]] 488; CHECK: cond.false.i: 489; CHECK-NEXT: [[CMP4_I:%.*]] = icmp sgt i32 [[U]], [[V]] 490; CHECK-NEXT: br i1 [[CMP4_I]], label [[DOTEXIT]], label [[COND_FALSE_6_I:%.*]] 491; CHECK: cond.false.6.i: 492; CHECK-NEXT: [[CMP8_I:%.*]] = icmp slt i32 [[W:%.*]], [[X:%.*]] 493; CHECK-NEXT: br i1 [[CMP8_I]], label [[DOTEXIT]], label [[COND_FALSE_10_I:%.*]] 494; CHECK: cond.false.10.i: 495; CHECK-NEXT: [[CMP13_I:%.*]] = icmp sgt i32 [[W]], [[X]] 496; CHECK-NEXT: br i1 [[CMP13_I]], label [[DOTEXIT]], label [[COND_FALSE_15_I:%.*]] 497; CHECK: cond.false.15.i: 498; CHECK-NEXT: [[CMP19_I:%.*]] = icmp sge i32 [[Y:%.*]], [[Z:%.*]] 499; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP19_I]] to i32 500; CHECK-NEXT: br label [[DOTEXIT]] 501; CHECK: .exit: 502; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ [[J]], [[COND_FALSE_10_I]] ], [ [[CONV]], [[COND_FALSE_15_I]] ], [ 1, [[COND_FALSE_6_I]] ], [ 3, [[COND_FALSE_I]] ], [ 2, [[ENTRY:%.*]] ] 503; CHECK-NEXT: ret i32 [[TMP0]] 504; 505entry: 506 %add3 = add nsw i32 %j, 2 507 %cmp.i = icmp slt i32 %u, %v 508 br i1 %cmp.i, label %.exit, label %cond.false.i 509 510cond.false.i: ; preds = %entry 511 %cmp4.i = icmp sgt i32 %u, %v 512 br i1 %cmp4.i, label %.exit, label %cond.false.6.i 513 514cond.false.6.i: ; preds = %cond.false.i 515 %cmp8.i = icmp slt i32 %w, %x 516 br i1 %cmp8.i, label %.exit, label %cond.false.10.i 517 518cond.false.10.i: ; preds = %cond.false.6.i 519 %cmp13.i = icmp sgt i32 %w, %x 520 br i1 %cmp13.i, label %.exit, label %cond.false.15.i 521 522cond.false.15.i: ; preds = %cond.false.10.i 523 %cmp19.i = icmp sge i32 %y, %z 524 %conv = zext i1 %cmp19.i to i32 525 br label %.exit 526 527.exit: ; preds = %entry, %cond.false.i, %cond.false.6.i, %cond.false.10.i, %cond.false.15.i 528 %cond23.i = phi i32 [ 2, %entry ], [ 3, %cond.false.i ], [ 1, %cond.false.6.i ], [ %conv, %cond.false.15.i ], [ 7, %cond.false.10.i ] 529 %lnot.i18 = icmp sgt i32 %cond23.i, 5 530 %j.add3 = select i1 %lnot.i18, i32 %j, i32 %cond23.i 531 ret i32 %j.add3 532 533} 534 535; When a select has a constant operand in one branch, and it feeds a phi node 536; and the phi node feeds a switch we unfold the select 537define void @test_func(ptr nocapture readonly %a, ptr nocapture readonly %b, ptr nocapture readonly %c, i32 %n) local_unnamed_addr #0 { 538; CHECK-LABEL: @test_func( 539; CHECK-NEXT: entry: 540; CHECK-NEXT: br label [[FOR_COND:%.*]] 541; CHECK: for.cond: 542; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_DEFAULT:%.*]] ] 543; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], [[N:%.*]] 544; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] 545; CHECK: for.cond.cleanup: 546; CHECK-NEXT: ret void 547; CHECK: for.body: 548; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[I_0]] to i64 549; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[TMP0]] 550; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 551; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[TMP1]], 4 552; CHECK-NEXT: br i1 [[CMP1]], label [[LAND_LHS_TRUE:%.*]], label [[IF_END:%.*]] 553; CHECK: land.lhs.true: 554; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[TMP0]] 555; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX3]], align 4 556; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, ptr [[C:%.*]], i64 [[TMP0]] 557; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX5]], align 4 558; CHECK-NEXT: [[CMP6:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]] 559; CHECK-NEXT: br i1 [[CMP6]], label [[SW_BB:%.*]], label [[SW_BB7:%.*]] 560; CHECK: if.end: 561; CHECK-NEXT: [[LOCAL_VAR_0:%.*]] = phi i32 [ [[TMP1]], [[FOR_BODY]] ] 562; CHECK-NEXT: switch i32 [[LOCAL_VAR_0]], label [[SW_DEFAULT]] [ 563; CHECK-NEXT: i32 2, label [[SW_BB]] 564; CHECK-NEXT: i32 4, label [[SW_BB7]] 565; CHECK-NEXT: i32 5, label [[SW_BB8:%.*]] 566; CHECK-NEXT: i32 7, label [[SW_BB9:%.*]] 567; CHECK-NEXT: ] 568; CHECK: sw.bb: 569; CHECK-NEXT: call void @foo() 570; CHECK-NEXT: br label [[SW_BB7]] 571; CHECK: sw.bb7: 572; CHECK-NEXT: call void @bar() 573; CHECK-NEXT: br label [[SW_BB8]] 574; CHECK: sw.bb8: 575; CHECK-NEXT: call void @baz() 576; CHECK-NEXT: br label [[SW_BB9]] 577; CHECK: sw.bb9: 578; CHECK-NEXT: call void @quux() 579; CHECK-NEXT: br label [[SW_DEFAULT]] 580; CHECK: sw.default: 581; CHECK-NEXT: call void @baz() 582; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_0]], 1 583; CHECK-NEXT: br label [[FOR_COND]] 584; 585entry: 586 br label %for.cond 587 588for.cond: ; preds = %sw.default, %entry 589 %i.0 = phi i32 [ 0, %entry ], [ %inc, %sw.default ] 590 %cmp = icmp slt i32 %i.0, %n 591 br i1 %cmp, label %for.body, label %for.cond.cleanup 592 593for.cond.cleanup: ; preds = %for.cond 594 ret void 595 596for.body: ; preds = %for.cond 597 %0 = zext i32 %i.0 to i64 598 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %0 599 %1 = load i32, ptr %arrayidx, align 4 600 %cmp1 = icmp eq i32 %1, 4 601 br i1 %cmp1, label %land.lhs.true, label %if.end 602 603land.lhs.true: ; preds = %for.body 604 %arrayidx3 = getelementptr inbounds i32, ptr %b, i64 %0 605 %2 = load i32, ptr %arrayidx3, align 4 606 %arrayidx5 = getelementptr inbounds i32, ptr %c, i64 %0 607 %3 = load i32, ptr %arrayidx5, align 4 608 %cmp6 = icmp eq i32 %2, %3 609 %spec.select = select i1 %cmp6, i32 2, i32 4 610 br label %if.end 611 612if.end: ; preds = %land.lhs.true, %for.body 613 %local_var.0 = phi i32 [ %1, %for.body ], [ %spec.select, %land.lhs.true ] 614 switch i32 %local_var.0, label %sw.default [ 615 i32 2, label %sw.bb 616 i32 4, label %sw.bb7 617 i32 5, label %sw.bb8 618 i32 7, label %sw.bb9 619 ] 620 621sw.bb: ; preds = %if.end 622 call void @foo() 623 br label %sw.bb7 624 625sw.bb7: ; preds = %if.end, %sw.bb 626 call void @bar() 627 br label %sw.bb8 628 629sw.bb8: ; preds = %if.end, %sw.bb7 630 call void @baz() 631 br label %sw.bb9 632 633sw.bb9: ; preds = %if.end, %sw.bb8 634 call void @quux() 635 br label %sw.default 636 637sw.default: ; preds = %if.end, %sw.bb9 638 call void @baz() 639 %inc = add nuw nsw i32 %i.0, 1 640 br label %for.cond 641} 642 643define i32 @TryToUnfoldSelectInCurrBB(i1 %b, i1 %ui, i32 %s, i1 %x) { 644; CHECK-LABEL: @TryToUnfoldSelectInCurrBB( 645; CHECK-NEXT: entry: 646; CHECK-NEXT: br i1 [[B:%.*]], label [[IF_END_THREAD:%.*]], label [[IF_END:%.*]] 647; CHECK: if.end: 648; CHECK-NEXT: [[COND_FR:%.*]] = freeze i1 [[X:%.*]] 649; CHECK-NEXT: br i1 [[COND_FR]], label [[TMP0:%.*]], label [[IF_END_THREAD]] 650; CHECK: 0: 651; CHECK-NEXT: br label [[IF_END_THREAD]] 652; CHECK: if.end.thread: 653; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[S:%.*]], [[TMP0]] ], [ 42, [[IF_END]] ], [ 42, [[ENTRY:%.*]] ] 654; CHECK-NEXT: ret i32 [[TMP1]] 655; 656entry: 657 br i1 %b, label %if.end, label %if.else 658 659if.else: 660 br label %if.end 661 662if.end: 663 %v = phi i1 [ %x, %if.else ], [ false, %entry ] 664 %v1 = select i1 %v, i32 %s, i32 42 665 ret i32 %v1 666} 667 668; branch_weights overflowing uint32_t 669!0 = !{!"branch_weights", i64 1073741824, i64 3221225472} 670!1 = !{!"function_entry_count", i64 1984} 671;. 672; CHECK: attributes #[[ATTR0:[0-9]+]] = { nounwind } 673;. 674; CHECK: [[META0:![0-9]+]] = !{!"function_entry_count", i64 1984} 675; CHECK: [[PROF1]] = !{!"branch_weights", i64 1073741824, i64 3221225472} 676;. 677