xref: /llvm-project/llvm/test/Transforms/JumpThreading/callbr.ll (revision 4eafc9b6ff4ae2bce82e9fdf0123b336825d931c)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=jump-threading -S | FileCheck %s
3
4define i1 @func(i1 %arg, i32 %arg1, i1 %arg2) {
5; CHECK-LABEL: @func(
6; CHECK-NEXT:  bb:
7; CHECK-NEXT:    br i1 [[ARG:%.*]], label [[BB7:%.*]], label [[BB4:%.*]]
8; CHECK:       bb4:
9; CHECK-NEXT:    callbr void asm sideeffect "", "!i"()
10; CHECK-NEXT:    to label [[BB7_THR_COMM:%.*]] [label %bb7.thr_comm]
11; CHECK:       bb7.thr_comm:
12; CHECK-NEXT:    [[I91:%.*]] = xor i1 [[ARG2:%.*]], [[ARG]]
13; CHECK-NEXT:    br i1 [[I91]], label [[BB11:%.*]], label [[BB11]]
14; CHECK:       bb7:
15; CHECK-NEXT:    [[I:%.*]] = icmp eq i32 [[ARG1:%.*]], 0
16; CHECK-NEXT:    [[I9:%.*]] = xor i1 [[I]], [[ARG]]
17; CHECK-NEXT:    br i1 [[I9]], label [[BB11]], label [[BB11]]
18; CHECK:       bb11:
19; CHECK-NEXT:    [[I93:%.*]] = phi i1 [ [[I91]], [[BB7_THR_COMM]] ], [ [[I9]], [[BB7]] ], [ [[I91]], [[BB7_THR_COMM]] ], [ [[I9]], [[BB7]] ]
20; CHECK-NEXT:    ret i1 [[I93]]
21;
22bb:
23  br i1 %arg, label %bb3, label %bb4
24
25bb3:
26  %i = icmp eq i32 %arg1, 0
27  br label %bb7
28
29bb4:
30  callbr void asm sideeffect "", "!i"()
31  to label %bb5 [label %bb6]
32
33bb5:
34  br label %bb6
35
36bb6:
37  br label %bb7
38
39bb7:
40  %i8 = phi i1 [ %i, %bb3 ], [ %arg2, %bb6 ]
41  %i9 = xor i1 %i8, %arg
42  br i1 %i9, label %bb11, label %bb10
43
44bb10:
45  br label %bb11
46
47bb11:
48  ret i1 %i9
49}
50
51define i32 @callbr_no_block_merge() {
52; CHECK-LABEL: @callbr_no_block_merge(
53; CHECK-NEXT:    [[X:%.*]] = callbr i32 asm sideeffect "", "=r"()
54; CHECK-NEXT:    to label [[BB:%.*]] []
55; CHECK:       bb:
56; CHECK-NEXT:    ret i32 [[X]]
57;
58  %x = callbr i32 asm sideeffect "", "=r"()
59  to label %bb []
60
61bb:
62  ret i32 %x
63}
64