1; RUN: opt < %s -passes=instsimplify -S | FileCheck %s 2; REQUIRES: x86-registered-target 3 4define i1 @test_avx512_cvts_exact() nounwind readnone { 5; CHECK-LABEL: @test_avx512_cvts_exact( 6; CHECK-NOT: call 7; CHECK: ret i1 true 8entry: 9 %i0 = tail call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> <float 3.0, float undef, float undef, float undef>, i32 4) nounwind 10 %i1 = tail call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> <float 3.0, float undef, float undef, float undef>, i32 4) nounwind 11 %i2 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> <double 7.0, double undef>, i32 4) nounwind 12 %i3 = call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> <double 7.0, double undef>, i32 4) nounwind 13 %sum02 = add i32 %i0, %i2 14 %sum13 = add i64 %i1, %i3 15 %cmp02 = icmp eq i32 %sum02, 10 16 %cmp13 = icmp eq i64 %sum13, 10 17 %b = and i1 %cmp02, %cmp13 18 ret i1 %b 19} 20 21define i1 @test_avx512_cvts_exact_max() nounwind readnone { 22; CHECK-LABEL: @test_avx512_cvts_exact_max( 23; CHECK-NOT: call 24; CHECK: ret i1 true 25entry: 26 %i0 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> <double 2147483647.0, double undef>, i32 4) nounwind 27 %b = icmp eq i32 %i0, 2147483647 28 ret i1 %b 29} 30 31define i1 @test_avx512_cvts_exact_max_p1() nounwind readnone { 32; CHECK-LABEL: @test_avx512_cvts_exact_max_p1( 33; CHECK: call 34entry: 35 %i0 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> <double 2147483648.0, double undef>, i32 4) nounwind 36 %b = icmp eq i32 %i0, 2147483648 37 ret i1 %b 38} 39 40define i1 @test_avx512_cvts_exact_neg_max() nounwind readnone { 41; CHECK-LABEL: @test_avx512_cvts_exact_neg_max( 42; CHECK-NOT: call 43; CHECK: ret i1 true 44entry: 45 %i0 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> <double -2147483648.0, double undef>, i32 4) nounwind 46 %b = icmp eq i32 %i0, -2147483648 47 ret i1 %b 48} 49 50define i1 @test_avx512_cvts_exact_neg_max_p1() nounwind readnone { 51; CHECK-LABEL: @test_avx512_cvts_exact_neg_max_p1( 52; CHECK: call 53entry: 54 %i0 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> <double -2147483649.0, double undef>, i32 4) nounwind 55 %b = icmp eq i32 %i0, -2147483649 56 ret i1 %b 57} 58 59; Inexact values should not fold as they are dependent on rounding mode 60define i1 @test_avx512_cvts_inexact() nounwind readnone { 61; CHECK-LABEL: @test_avx512_cvts_inexact( 62; CHECK: call 63; CHECK: call 64; CHECK: call 65; CHECK: call 66entry: 67 %i0 = tail call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> <float 1.75, float undef, float undef, float undef>, i32 4) nounwind 68 %i1 = tail call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> <float 1.75, float undef, float undef, float undef>, i32 4) nounwind 69 %i2 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> <double 1.75, double undef>, i32 4) nounwind 70 %i3 = call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> <double 1.75, double undef>, i32 4) nounwind 71 %sum02 = add i32 %i0, %i2 72 %sum13 = add i64 %i1, %i3 73 %cmp02 = icmp eq i32 %sum02, 4 74 %cmp13 = icmp eq i64 %sum13, 4 75 %b = and i1 %cmp02, %cmp13 76 ret i1 %b 77} 78 79; FLT_MAX/DBL_MAX should not fold 80define i1 @test_avx512_cvts_max() nounwind readnone { 81; CHECK-LABEL: @test_avx512_cvts_max( 82; CHECK: call 83; CHECK: call 84; CHECK: call 85; CHECK: call 86entry: 87 %fm = bitcast <4 x i32> <i32 2139095039, i32 undef, i32 undef, i32 undef> to <4 x float> 88 %dm = bitcast <2 x i64> <i64 9218868437227405311, i64 undef> to <2 x double> 89 %i0 = tail call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %fm, i32 4) nounwind 90 %i1 = tail call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> %fm, i32 4) nounwind 91 %i2 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %dm, i32 4) nounwind 92 %i3 = call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> %dm, i32 4) nounwind 93 %sum02 = add i32 %i0, %i2 94 %sum13 = add i64 %i1, %i3 95 %sum02.sext = sext i32 %sum02 to i64 96 %b = icmp eq i64 %sum02.sext, %sum13 97 ret i1 %b 98} 99 100; INF should not fold 101define i1 @test_avx512_cvts_inf() nounwind readnone { 102; CHECK-LABEL: @test_avx512_cvts_inf( 103; CHECK: call 104; CHECK: call 105; CHECK: call 106; CHECK: call 107entry: 108 %fm = bitcast <4 x i32> <i32 2139095040, i32 undef, i32 undef, i32 undef> to <4 x float> 109 %dm = bitcast <2 x i64> <i64 9218868437227405312, i64 undef> to <2 x double> 110 %i0 = tail call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %fm, i32 4) nounwind 111 %i1 = tail call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> %fm, i32 4) nounwind 112 %i2 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %dm, i32 4) nounwind 113 %i3 = call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> %dm, i32 4) nounwind 114 %sum02 = add i32 %i0, %i2 115 %sum13 = add i64 %i1, %i3 116 %sum02.sext = sext i32 %sum02 to i64 117 %b = icmp eq i64 %sum02.sext, %sum13 118 ret i1 %b 119} 120 121; NAN should not fold 122define i1 @test_avx512_cvts_nan() nounwind readnone { 123; CHECK-LABEL: @test_avx512_cvts_nan( 124; CHECK: call 125; CHECK: call 126; CHECK: call 127; CHECK: call 128entry: 129 %fm = bitcast <4 x i32> <i32 2143289344, i32 undef, i32 undef, i32 undef> to <4 x float> 130 %dm = bitcast <2 x i64> <i64 9221120237041090560, i64 undef> to <2 x double> 131 %i0 = tail call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %fm, i32 4) nounwind 132 %i1 = tail call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> %fm, i32 4) nounwind 133 %i2 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %dm, i32 4) nounwind 134 %i3 = call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> %dm, i32 4) nounwind 135 %sum02 = add i32 %i0, %i2 136 %sum13 = add i64 %i1, %i3 137 %sum02.sext = sext i32 %sum02 to i64 138 %b = icmp eq i64 %sum02.sext, %sum13 139 ret i1 %b 140} 141 142define i1 @test_avx512_cvtts_exact() nounwind readnone { 143; CHECK-LABEL: @test_avx512_cvtts_exact( 144; CHECK-NOT: call 145; CHECK: ret i1 true 146entry: 147 %i0 = tail call i32 @llvm.x86.avx512.cvttss2si(<4 x float> <float 3.0, float undef, float undef, float undef>, i32 4) nounwind 148 %i1 = tail call i64 @llvm.x86.avx512.cvttss2si64(<4 x float> <float 3.0, float undef, float undef, float undef>, i32 4) nounwind 149 %i2 = call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> <double 7.0, double undef>, i32 4) nounwind 150 %i3 = call i64 @llvm.x86.avx512.cvttsd2si64(<2 x double> <double 7.0, double undef>, i32 4) nounwind 151 %sum02 = add i32 %i0, %i2 152 %sum13 = add i64 %i1, %i3 153 %cmp02 = icmp eq i32 %sum02, 10 154 %cmp13 = icmp eq i64 %sum13, 10 155 %b = and i1 %cmp02, %cmp13 156 ret i1 %b 157} 158 159define i1 @test_avx512_cvtts_inexact() nounwind readnone { 160; CHECK-LABEL: @test_avx512_cvtts_inexact( 161; CHECK-NOT: call 162; CHECK: ret i1 true 163entry: 164 %i0 = tail call i32 @llvm.x86.avx512.cvttss2si(<4 x float> <float 1.75, float undef, float undef, float undef>, i32 4) nounwind 165 %i1 = tail call i64 @llvm.x86.avx512.cvttss2si64(<4 x float> <float 1.75, float undef, float undef, float undef>, i32 4) nounwind 166 %i2 = call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> <double 1.75, double undef>, i32 4) nounwind 167 %i3 = call i64 @llvm.x86.avx512.cvttsd2si64(<2 x double> <double 1.75, double undef>, i32 4) nounwind 168 %sum02 = add i32 %i0, %i2 169 %sum13 = add i64 %i1, %i3 170 %cmp02 = icmp eq i32 %sum02, 2 171 %cmp13 = icmp eq i64 %sum13, 2 172 %b = and i1 %cmp02, %cmp13 173 ret i1 %b 174} 175 176; FLT_MAX/DBL_MAX should not fold 177define i1 @test_avx512_cvtts_max() nounwind readnone { 178; CHECK-LABEL: @test_avx512_cvtts_max( 179; CHECK: call 180; CHECK: call 181; CHECK: call 182; CHECK: call 183entry: 184 %fm = bitcast <4 x i32> <i32 2139095039, i32 undef, i32 undef, i32 undef> to <4 x float> 185 %dm = bitcast <2 x i64> <i64 9218868437227405311, i64 undef> to <2 x double> 186 %i0 = tail call i32 @llvm.x86.avx512.cvttss2si(<4 x float> %fm, i32 4) nounwind 187 %i1 = tail call i64 @llvm.x86.avx512.cvttss2si64(<4 x float> %fm, i32 4) nounwind 188 %i2 = call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> %dm, i32 4) nounwind 189 %i3 = call i64 @llvm.x86.avx512.cvttsd2si64(<2 x double> %dm, i32 4) nounwind 190 %sum02 = add i32 %i0, %i2 191 %sum13 = add i64 %i1, %i3 192 %sum02.sext = sext i32 %sum02 to i64 193 %b = icmp eq i64 %sum02.sext, %sum13 194 ret i1 %b 195} 196 197; INF should not fold 198define i1 @test_avx512_cvtts_inf() nounwind readnone { 199; CHECK-LABEL: @test_avx512_cvtts_inf( 200; CHECK: call 201; CHECK: call 202; CHECK: call 203; CHECK: call 204entry: 205 %fm = bitcast <4 x i32> <i32 2139095040, i32 undef, i32 undef, i32 undef> to <4 x float> 206 %dm = bitcast <2 x i64> <i64 9218868437227405312, i64 undef> to <2 x double> 207 %i0 = tail call i32 @llvm.x86.avx512.cvttss2si(<4 x float> %fm, i32 4) nounwind 208 %i1 = tail call i64 @llvm.x86.avx512.cvttss2si64(<4 x float> %fm, i32 4) nounwind 209 %i2 = call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> %dm, i32 4) nounwind 210 %i3 = call i64 @llvm.x86.avx512.cvttsd2si64(<2 x double> %dm, i32 4) nounwind 211 %sum02 = add i32 %i0, %i2 212 %sum13 = add i64 %i1, %i3 213 %sum02.sext = sext i32 %sum02 to i64 214 %b = icmp eq i64 %sum02.sext, %sum13 215 ret i1 %b 216} 217 218; NAN should not fold 219define i1 @test_avx512_cvtts_nan() nounwind readnone { 220; CHECK-LABEL: @test_avx512_cvtts_nan( 221; CHECK: call 222; CHECK: call 223; CHECK: call 224; CHECK: call 225entry: 226 %fm = bitcast <4 x i32> <i32 2143289344, i32 undef, i32 undef, i32 undef> to <4 x float> 227 %dm = bitcast <2 x i64> <i64 9221120237041090560, i64 undef> to <2 x double> 228 %i0 = tail call i32 @llvm.x86.avx512.cvttss2si(<4 x float> %fm, i32 4) nounwind 229 %i1 = tail call i64 @llvm.x86.avx512.cvttss2si64(<4 x float> %fm, i32 4) nounwind 230 %i2 = call i32 @llvm.x86.avx512.cvttsd2si(<2 x double> %dm, i32 4) nounwind 231 %i3 = call i64 @llvm.x86.avx512.cvttsd2si64(<2 x double> %dm, i32 4) nounwind 232 %sum02 = add i32 %i0, %i2 233 %sum13 = add i64 %i1, %i3 234 %sum02.sext = sext i32 %sum02 to i64 235 %b = icmp eq i64 %sum02.sext, %sum13 236 ret i1 %b 237} 238 239define i1 @test_avx512_cvtu_exact() nounwind readnone { 240; CHECK-LABEL: @test_avx512_cvtu_exact( 241; CHECK-NOT: call 242; CHECK: ret i1 true 243entry: 244 %i0 = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> <float 3.0, float undef, float undef, float undef>, i32 4) nounwind 245 %i1 = tail call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> <float 3.0, float undef, float undef, float undef>, i32 4) nounwind 246 %i2 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> <double 7.0, double undef>, i32 4) nounwind 247 %i3 = call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> <double 7.0, double undef>, i32 4) nounwind 248 %sum02 = add i32 %i0, %i2 249 %sum13 = add i64 %i1, %i3 250 %cmp02 = icmp eq i32 %sum02, 10 251 %cmp13 = icmp eq i64 %sum13, 10 252 %b = and i1 %cmp02, %cmp13 253 ret i1 %b 254} 255 256; Negative values should not fold as they can't be represented in an unsigned int. 257define i1 @test_avx512_cvtu_neg() nounwind readnone { 258; CHECK-LABEL: @test_avx512_cvtu_neg( 259; CHECK: call 260; CHECK: call 261; CHECK: call 262; CHECK: call 263entry: 264 %i0 = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> <float -3.0, float undef, float undef, float undef>, i32 4) nounwind 265 %i1 = tail call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> <float -3.0, float undef, float undef, float undef>, i32 4) nounwind 266 %i2 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> <double -7.0, double undef>, i32 4) nounwind 267 %i3 = call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> <double -7.0, double undef>, i32 4) nounwind 268 %sum02 = add i32 %i0, %i2 269 %sum13 = add i64 %i1, %i3 270 %cmp02 = icmp eq i32 %sum02, -10 271 %cmp13 = icmp eq i64 %sum13, -10 272 %b = and i1 %cmp02, %cmp13 273 ret i1 %b 274} 275 276define i1 @test_avx512_cvtu_exact_max() nounwind readnone { 277; CHECK-LABEL: @test_avx512_cvtu_exact_max( 278; CHECK-NOT: call 279; CHECK: ret i1 true 280entry: 281 %i0 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> <double 4294967295.0, double undef>, i32 4) nounwind 282 %b = icmp eq i32 %i0, 4294967295 283 ret i1 %b 284} 285 286define i1 @test_avx512_cvtu_exact_max_p1() nounwind readnone { 287; CHECK-LABEL: @test_avx512_cvtu_exact_max_p1( 288; CHECK: call 289entry: 290 %i0 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> <double 4294967296.0, double undef>, i32 4) nounwind 291 %b = icmp eq i32 %i0, 4294967296 292 ret i1 %b 293} 294 295; Inexact values should not fold as they are dependent on rounding mode 296define i1 @test_avx512_cvtu_inexact() nounwind readnone { 297; CHECK-LABEL: @test_avx512_cvtu_inexact( 298; CHECK: call 299; CHECK: call 300; CHECK: call 301; CHECK: call 302entry: 303 %i0 = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> <float 1.75, float undef, float undef, float undef>, i32 4) nounwind 304 %i1 = tail call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> <float 1.75, float undef, float undef, float undef>, i32 4) nounwind 305 %i2 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> <double 1.75, double undef>, i32 4) nounwind 306 %i3 = call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> <double 1.75, double undef>, i32 4) nounwind 307 %sum02 = add i32 %i0, %i2 308 %sum13 = add i64 %i1, %i3 309 %cmp02 = icmp eq i32 %sum02, 4 310 %cmp13 = icmp eq i64 %sum13, 4 311 %b = and i1 %cmp02, %cmp13 312 ret i1 %b 313} 314 315; FLT_MAX/DBL_MAX should not fold 316define i1 @test_avx512_cvtu_max() nounwind readnone { 317; CHECK-LABEL: @test_avx512_cvtu_max( 318; CHECK: call 319; CHECK: call 320; CHECK: call 321; CHECK: call 322entry: 323 %fm = bitcast <4 x i32> <i32 2139095039, i32 undef, i32 undef, i32 undef> to <4 x float> 324 %dm = bitcast <2 x i64> <i64 9218868437227405311, i64 undef> to <2 x double> 325 %i0 = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %fm, i32 4) nounwind 326 %i1 = tail call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> %fm, i32 4) nounwind 327 %i2 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %dm, i32 4) nounwind 328 %i3 = call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> %dm, i32 4) nounwind 329 %sum02 = add i32 %i0, %i2 330 %sum13 = add i64 %i1, %i3 331 %sum02.sext = sext i32 %sum02 to i64 332 %b = icmp eq i64 %sum02.sext, %sum13 333 ret i1 %b 334} 335 336; INF should not fold 337define i1 @test_avx512_cvtu_inf() nounwind readnone { 338; CHECK-LABEL: @test_avx512_cvtu_inf( 339; CHECK: call 340; CHECK: call 341; CHECK: call 342; CHECK: call 343entry: 344 %fm = bitcast <4 x i32> <i32 2139095040, i32 undef, i32 undef, i32 undef> to <4 x float> 345 %dm = bitcast <2 x i64> <i64 9218868437227405312, i64 undef> to <2 x double> 346 %i0 = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %fm, i32 4) nounwind 347 %i1 = tail call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> %fm, i32 4) nounwind 348 %i2 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %dm, i32 4) nounwind 349 %i3 = call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> %dm, i32 4) nounwind 350 %sum02 = add i32 %i0, %i2 351 %sum13 = add i64 %i1, %i3 352 %sum02.sext = sext i32 %sum02 to i64 353 %b = icmp eq i64 %sum02.sext, %sum13 354 ret i1 %b 355} 356 357; NAN should not fold 358define i1 @test_avx512_cvtu_nan() nounwind readnone { 359; CHECK-LABEL: @test_avx512_cvtu_nan( 360; CHECK: call 361; CHECK: call 362; CHECK: call 363; CHECK: call 364entry: 365 %fm = bitcast <4 x i32> <i32 2143289344, i32 undef, i32 undef, i32 undef> to <4 x float> 366 %dm = bitcast <2 x i64> <i64 9221120237041090560, i64 undef> to <2 x double> 367 %i0 = tail call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %fm, i32 4) nounwind 368 %i1 = tail call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> %fm, i32 4) nounwind 369 %i2 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %dm, i32 4) nounwind 370 %i3 = call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> %dm, i32 4) nounwind 371 %sum02 = add i32 %i0, %i2 372 %sum13 = add i64 %i1, %i3 373 %sum02.sext = sext i32 %sum02 to i64 374 %b = icmp eq i64 %sum02.sext, %sum13 375 ret i1 %b 376} 377 378define i1 @test_avx512_cvttu_exact() nounwind readnone { 379; CHECK-LABEL: @test_avx512_cvttu_exact( 380; CHECK-NOT: call 381; CHECK: ret i1 true 382entry: 383 %i0 = tail call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> <float 3.0, float undef, float undef, float undef>, i32 4) nounwind 384 %i1 = tail call i64 @llvm.x86.avx512.cvttss2usi64(<4 x float> <float 3.0, float undef, float undef, float undef>, i32 4) nounwind 385 %i2 = call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> <double 7.0, double undef>, i32 4) nounwind 386 %i3 = call i64 @llvm.x86.avx512.cvttsd2usi64(<2 x double> <double 7.0, double undef>, i32 4) nounwind 387 %sum02 = add i32 %i0, %i2 388 %sum13 = add i64 %i1, %i3 389 %cmp02 = icmp eq i32 %sum02, 10 390 %cmp13 = icmp eq i64 %sum13, 10 391 %b = and i1 %cmp02, %cmp13 392 ret i1 %b 393} 394 395define i1 @test_avx512_cvttu_inexact() nounwind readnone { 396; CHECK-LABEL: @test_avx512_cvttu_inexact( 397; CHECK-NOT: call 398; CHECK: ret i1 true 399entry: 400 %i0 = tail call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> <float 1.75, float undef, float undef, float undef>, i32 4) nounwind 401 %i1 = tail call i64 @llvm.x86.avx512.cvttss2usi64(<4 x float> <float 1.75, float undef, float undef, float undef>, i32 4) nounwind 402 %i2 = call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> <double 1.75, double undef>, i32 4) nounwind 403 %i3 = call i64 @llvm.x86.avx512.cvttsd2usi64(<2 x double> <double 1.75, double undef>, i32 4) nounwind 404 %sum02 = add i32 %i0, %i2 405 %sum13 = add i64 %i1, %i3 406 %cmp02 = icmp eq i32 %sum02, 2 407 %cmp13 = icmp eq i64 %sum13, 2 408 %b = and i1 %cmp02, %cmp13 409 ret i1 %b 410} 411 412; FLT_MAX/DBL_MAX should not fold 413define i1 @test_avx512_cvttu_max() nounwind readnone { 414; CHECK-LABEL: @test_avx512_cvttu_max( 415; CHECK: call 416; CHECK: call 417; CHECK: call 418; CHECK: call 419entry: 420 %fm = bitcast <4 x i32> <i32 2139095039, i32 undef, i32 undef, i32 undef> to <4 x float> 421 %dm = bitcast <2 x i64> <i64 9218868437227405311, i64 undef> to <2 x double> 422 %i0 = tail call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> %fm, i32 4) nounwind 423 %i1 = tail call i64 @llvm.x86.avx512.cvttss2usi64(<4 x float> %fm, i32 4) nounwind 424 %i2 = call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> %dm, i32 4) nounwind 425 %i3 = call i64 @llvm.x86.avx512.cvttsd2usi64(<2 x double> %dm, i32 4) nounwind 426 %sum02 = add i32 %i0, %i2 427 %sum13 = add i64 %i1, %i3 428 %sum02.sext = sext i32 %sum02 to i64 429 %b = icmp eq i64 %sum02.sext, %sum13 430 ret i1 %b 431} 432 433; INF should not fold 434define i1 @test_avx512_cvttu_inf() nounwind readnone { 435; CHECK-LABEL: @test_avx512_cvttu_inf( 436; CHECK: call 437; CHECK: call 438; CHECK: call 439; CHECK: call 440entry: 441 %fm = bitcast <4 x i32> <i32 2139095040, i32 undef, i32 undef, i32 undef> to <4 x float> 442 %dm = bitcast <2 x i64> <i64 9218868437227405312, i64 undef> to <2 x double> 443 %i0 = tail call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> %fm, i32 4) nounwind 444 %i1 = tail call i64 @llvm.x86.avx512.cvttss2usi64(<4 x float> %fm, i32 4) nounwind 445 %i2 = call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> %dm, i32 4) nounwind 446 %i3 = call i64 @llvm.x86.avx512.cvttsd2usi64(<2 x double> %dm, i32 4) nounwind 447 %sum02 = add i32 %i0, %i2 448 %sum13 = add i64 %i1, %i3 449 %sum02.sext = sext i32 %sum02 to i64 450 %b = icmp eq i64 %sum02.sext, %sum13 451 ret i1 %b 452} 453 454; NAN should not fold 455define i1 @test_avx512_cvttu_nan() nounwind readnone { 456; CHECK-LABEL: @test_avx512_cvttu_nan( 457; CHECK: call 458; CHECK: call 459; CHECK: call 460; CHECK: call 461entry: 462 %fm = bitcast <4 x i32> <i32 2143289344, i32 undef, i32 undef, i32 undef> to <4 x float> 463 %dm = bitcast <2 x i64> <i64 9221120237041090560, i64 undef> to <2 x double> 464 %i0 = tail call i32 @llvm.x86.avx512.cvttss2usi(<4 x float> %fm, i32 4) nounwind 465 %i1 = tail call i64 @llvm.x86.avx512.cvttss2usi64(<4 x float> %fm, i32 4) nounwind 466 %i2 = call i32 @llvm.x86.avx512.cvttsd2usi(<2 x double> %dm, i32 4) nounwind 467 %i3 = call i64 @llvm.x86.avx512.cvttsd2usi64(<2 x double> %dm, i32 4) nounwind 468 %sum02 = add i32 %i0, %i2 469 %sum13 = add i64 %i1, %i3 470 %sum02.sext = sext i32 %sum02 to i64 471 %b = icmp eq i64 %sum02.sext, %sum13 472 ret i1 %b 473} 474 475declare i32 @llvm.x86.avx512.vcvtss2si32(<4 x float>, i32) nounwind readnone 476declare i32 @llvm.x86.avx512.cvttss2si(<4 x float>, i32) nounwind readnone 477declare i64 @llvm.x86.avx512.vcvtss2si64(<4 x float>, i32) nounwind readnone 478declare i64 @llvm.x86.avx512.cvttss2si64(<4 x float>, i32) nounwind readnone 479declare i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double>, i32) nounwind readnone 480declare i32 @llvm.x86.avx512.cvttsd2si(<2 x double>, i32) nounwind readnone 481declare i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double>, i32) nounwind readnone 482declare i64 @llvm.x86.avx512.cvttsd2si64(<2 x double>, i32) nounwind readnone 483declare i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float>, i32) nounwind readnone 484declare i32 @llvm.x86.avx512.cvttss2usi(<4 x float>, i32) nounwind readnone 485declare i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float>, i32) nounwind readnone 486declare i64 @llvm.x86.avx512.cvttss2usi64(<4 x float>, i32) nounwind readnone 487declare i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double>, i32) nounwind readnone 488declare i32 @llvm.x86.avx512.cvttsd2usi(<2 x double>, i32) nounwind readnone 489declare i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double>, i32) nounwind readnone 490declare i64 @llvm.x86.avx512.cvttsd2usi64(<2 x double>, i32) nounwind readnone 491