xref: /llvm-project/llvm/test/Transforms/InstSimplify/ConstProp/AMDGPU/perm.ll (revision 04b944e23050e4e0c6ee983cc9bc17740315ea4f) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=instsimplify -S | FileCheck %s
3
4declare i32 @llvm.amdgcn.perm(i32, i32, i32)
5
6; src1 = 0x19203a4b (421542475), src2 = 0x5c6d7e8f (1550679695)
7define void @test(ptr %p) {
8; CHECK-LABEL: @test(
9; CHECK-NEXT:    store volatile i32 undef, ptr [[P:%.*]], align 4
10; CHECK-NEXT:    store volatile i32 -1887539876, ptr [[P]], align 4
11; CHECK-NEXT:    store volatile i32 2121096267, ptr [[P]], align 4
12; CHECK-NEXT:    store volatile i32 1262100505, ptr [[P]], align 4
13; CHECK-NEXT:    store volatile i32 1550679695, ptr [[P]], align 4
14; CHECK-NEXT:    store volatile i32 421542475, ptr [[P]], align 4
15; CHECK-NEXT:    store volatile i32 545143439, ptr [[P]], align 4
16; CHECK-NEXT:    store volatile i32 16711935, ptr [[P]], align 4
17; CHECK-NEXT:    store volatile i32 16711935, ptr [[P]], align 4
18; CHECK-NEXT:    store volatile i32 436174336, ptr [[P]], align 4
19; CHECK-NEXT:    store volatile i32 16711680, ptr [[P]], align 4
20; CHECK-NEXT:    store volatile i32 -1, ptr [[P]], align 4
21; CHECK-NEXT:    store volatile i32 -1, ptr [[P]], align 4
22; CHECK-NEXT:    store volatile i32 -1, ptr [[P]], align 4
23; CHECK-NEXT:    store volatile i32 undef, ptr [[P]], align 4
24; CHECK-NEXT:    store volatile i32 421542475, ptr [[P]], align 4
25; CHECK-NEXT:    store volatile i32 1550679695, ptr [[P]], align 4
26; CHECK-NEXT:    store volatile i32 undef, ptr [[P]], align 4
27; CHECK-NEXT:    store volatile i32 143, ptr [[P]], align 4
28; CHECK-NEXT:    store volatile i32 0, ptr [[P]], align 4
29; CHECK-NEXT:    store volatile i32 255, ptr [[P]], align 4
30; CHECK-NEXT:    store volatile i32 1550679552, ptr [[P]], align 4
31; CHECK-NEXT:    store volatile i32 75, ptr [[P]], align 4
32; CHECK-NEXT:    store volatile i32 0, ptr [[P]], align 4
33; CHECK-NEXT:    store volatile i32 255, ptr [[P]], align 4
34; CHECK-NEXT:    store volatile i32 65535, ptr [[P]], align 4
35; CHECK-NEXT:    store volatile i32 421542400, ptr [[P]], align 4
36; CHECK-NEXT:    store volatile i32 -16776961, ptr [[P]], align 4
37; CHECK-NEXT:    store volatile i32 255, ptr [[P]], align 4
38; CHECK-NEXT:    store volatile i32 -16777216, ptr [[P]], align 4
39; CHECK-NEXT:    ret void
40;
41  %s1s2_u = call i32 @llvm.amdgcn.perm(i32 421542475, i32 1550679695, i32 undef)
42  store volatile i32 %s1s2_u, ptr %p
43  %s1s2_0x00010203 = call i32 @llvm.amdgcn.perm(i32 421542475, i32 1550679695, i32 66051)
44  store volatile i32 %s1s2_0x00010203, ptr %p
45  %s1s2_0x01020304 = call i32 @llvm.amdgcn.perm(i32 421542475, i32 1550679695, i32 16909060)
46  store volatile i32 %s1s2_0x01020304, ptr %p
47  %s1s2_0x04050607 = call i32 @llvm.amdgcn.perm(i32 421542475, i32 1550679695, i32 67438087)
48  store volatile i32 %s1s2_0x04050607, ptr %p
49  %s1s2_0x03020100 = call i32 @llvm.amdgcn.perm(i32 421542475, i32 1550679695, i32 50462976)
50  store volatile i32 %s1s2_0x03020100, ptr %p
51  %s1s2_0x07060504 = call i32 @llvm.amdgcn.perm(i32 421542475, i32 1550679695, i32 117835012)
52  store volatile i32 %s1s2_0x07060504, ptr %p
53  %s1s2_0x06010500 = call i32 @llvm.amdgcn.perm(i32 421542475, i32 1550679695, i32 100730112)
54  store volatile i32 %s1s2_0x06010500, ptr %p
55  %s1s2_0x0c0f0c0f = call i32 @llvm.amdgcn.perm(i32 421542475, i32 1550679695, i32 202312719)
56  store volatile i32 %s1s2_0x0c0f0c0f, ptr %p
57  %u1u2_0x0c0f0c0f = call i32 @llvm.amdgcn.perm(i32 undef, i32 undef, i32 202312719)
58  store volatile i32 %u1u2_0x0c0f0c0f, ptr %p
59  %s1s2_0x070d010c = call i32 @llvm.amdgcn.perm(i32 421542475, i32 1550679695, i32 118292748)
60  store volatile i32 %s1s2_0x070d010c, ptr %p
61  %u1u2_0x070d010c = call i32 @llvm.amdgcn.perm(i32 undef, i32 undef, i32 118292748)
62  store volatile i32 %u1u2_0x070d010c, ptr %p
63  %s1s2_0x80818283 = call i32 @llvm.amdgcn.perm(i32 421542475, i32 1550679695, i32 2155971203)
64  store volatile i32 %s1s2_0x80818283, ptr %p
65  %u1u2_0x80818283 = call i32 @llvm.amdgcn.perm(i32 undef, i32 undef, i32 2155971203)
66  store volatile i32 %u1u2_0x80818283, ptr %p
67  %u1u2_0x0e0e0e0e = call i32 @llvm.amdgcn.perm(i32 undef, i32 undef, i32 235802126)
68  store volatile i32 %u1u2_0x0e0e0e0e, ptr %p
69  %u1s2_0x07060504 = call i32 @llvm.amdgcn.perm(i32 undef, i32 1550679695, i32 117835012)
70  store volatile i32 %u1s2_0x07060504, ptr %p
71  %s1u2_0x07060504 = call i32 @llvm.amdgcn.perm(i32 421542475, i32 undef, i32 117835012)
72  store volatile i32 %s1u2_0x07060504, ptr %p
73  %u1s2_0x03020100 = call i32 @llvm.amdgcn.perm(i32 undef, i32 1550679695, i32 50462976)
74  store volatile i32 %u1s2_0x03020100, ptr %p
75  %s1u2_0x03020100 = call i32 @llvm.amdgcn.perm(i32 421542475, i32 undef, i32 50462976)
76  store volatile i32 %s1u2_0x03020100, ptr %p
77  %u1s2_0x07060500 = call i32 @llvm.amdgcn.perm(i32 undef, i32 1550679695, i32 117835008)
78  store volatile i32 %u1s2_0x07060500, ptr %p
79  %u1s2_0x0706050c = call i32 @llvm.amdgcn.perm(i32 undef, i32 1550679695, i32 117835020)
80  store volatile i32 %u1s2_0x0706050c, ptr %p
81  %u1s2_0x0706050d = call i32 @llvm.amdgcn.perm(i32 undef, i32 1550679695, i32 117835021)
82  store volatile i32 %u1s2_0x0706050d, ptr %p
83  %u1s2_0x03020104 = call i32 @llvm.amdgcn.perm(i32 undef, i32 1550679695, i32 50462980)
84  store volatile i32 %u1s2_0x03020104, ptr %p
85  %s1u2_0x03020104 = call i32 @llvm.amdgcn.perm(i32 421542475, i32 undef, i32 50462980)
86  store volatile i32 %s1u2_0x03020104, ptr %p
87  %s1u2_0x0302010c = call i32 @llvm.amdgcn.perm(i32 421542475, i32 undef, i32 50462988)
88  store volatile i32 %s1u2_0x0302010c, ptr %p
89  %s1u2_0x0302010e = call i32 @llvm.amdgcn.perm(i32 421542475, i32 undef, i32 50462990)
90  store volatile i32 %s1u2_0x0302010e, ptr %p
91  %s1u2_0x03020f0e = call i32 @llvm.amdgcn.perm(i32 421542475, i32 undef, i32 50466574)
92  store volatile i32 %s1u2_0x03020f0e, ptr %p
93  %s1u2_0x07060500 = call i32 @llvm.amdgcn.perm(i32 421542475, i32 undef, i32 117835008)
94  store volatile i32 %s1u2_0x07060500, ptr %p
95  %_0x81000100_0x01008100_0x0b0a0908 = call i32 @llvm.amdgcn.perm(i32 2164261120, i32 16810240, i32 185207048)
96  store volatile i32 %_0x81000100_0x01008100_0x0b0a0908, ptr %p
97  %_u1_0x01008100_0x0b0a0908 = call i32 @llvm.amdgcn.perm(i32 undef, i32 16810240, i32 185207048)
98  store volatile i32 %_u1_0x01008100_0x0b0a0908, ptr %p
99  %_0x81000100_u2_0x0b0a0908 = call i32 @llvm.amdgcn.perm(i32 2164261120, i32 undef, i32 185207048)
100  store volatile i32 %_0x81000100_u2_0x0b0a0908, ptr %p
101  ret void
102}
103