xref: /llvm-project/llvm/test/Transforms/InstCombine/switch-sub.ll (revision f7f7574afe4cfc11ebe5d8cb811d5cd28dc862f6)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2; RUN: opt < %s -passes=instcombine -S | FileCheck %s
3
4define i1 @test_switch_with_neg(i32 %a) {
5; CHECK-LABEL: define i1 @test_switch_with_neg(
6; CHECK-SAME: i32 [[A:%.*]]) {
7; CHECK-NEXT:  entry:
8; CHECK-NEXT:    switch i32 [[A]], label [[SW_DEFAULT:%.*]] [
9; CHECK-NEXT:      i32 -37, label [[SW_BB:%.*]]
10; CHECK-NEXT:      i32 -38, label [[SW_BB]]
11; CHECK-NEXT:      i32 -39, label [[SW_BB]]
12; CHECK-NEXT:    ]
13; CHECK:       sw.bb:
14; CHECK-NEXT:    ret i1 true
15; CHECK:       sw.default:
16; CHECK-NEXT:    ret i1 false
17;
18entry:
19  %a.neg = sub i32 0, %a
20  switch i32 %a.neg, label %sw.default [
21  i32 37, label %sw.bb
22  i32 38, label %sw.bb
23  i32 39, label %sw.bb
24  ]
25
26sw.bb:
27  ret i1 true
28sw.default:
29  ret i1 false
30}
31
32define i1 @test_switch_with_sub(i32 %a) {
33; CHECK-LABEL: define i1 @test_switch_with_sub(
34; CHECK-SAME: i32 [[A:%.*]]) {
35; CHECK-NEXT:  entry:
36; CHECK-NEXT:    switch i32 [[A]], label [[SW_DEFAULT:%.*]] [
37; CHECK-NEXT:      i32 0, label [[SW_BB:%.*]]
38; CHECK-NEXT:      i32 -1, label [[SW_BB]]
39; CHECK-NEXT:      i32 -2, label [[SW_BB]]
40; CHECK-NEXT:    ]
41; CHECK:       sw.bb:
42; CHECK-NEXT:    ret i1 true
43; CHECK:       sw.default:
44; CHECK-NEXT:    ret i1 false
45;
46entry:
47  %a.neg = sub i32 37, %a
48  switch i32 %a.neg, label %sw.default [
49  i32 37, label %sw.bb
50  i32 38, label %sw.bb
51  i32 39, label %sw.bb
52  ]
53
54sw.bb:
55  ret i1 true
56sw.default:
57  ret i1 false
58}
59
60; Negative tests
61
62define i1 @test_switch_with_sub_nonconst(i32 %a, i32 %b) {
63; CHECK-LABEL: define i1 @test_switch_with_sub_nonconst(
64; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
65; CHECK-NEXT:  entry:
66; CHECK-NEXT:    [[A_NEG:%.*]] = sub i32 [[B]], [[A]]
67; CHECK-NEXT:    switch i32 [[A_NEG]], label [[SW_DEFAULT:%.*]] [
68; CHECK-NEXT:      i32 37, label [[SW_BB:%.*]]
69; CHECK-NEXT:      i32 38, label [[SW_BB]]
70; CHECK-NEXT:      i32 39, label [[SW_BB]]
71; CHECK-NEXT:    ]
72; CHECK:       sw.bb:
73; CHECK-NEXT:    ret i1 true
74; CHECK:       sw.default:
75; CHECK-NEXT:    ret i1 false
76;
77entry:
78  %a.neg = sub i32 %b, %a
79  switch i32 %a.neg, label %sw.default [
80  i32 37, label %sw.bb
81  i32 38, label %sw.bb
82  i32 39, label %sw.bb
83  ]
84
85sw.bb:
86  ret i1 true
87sw.default:
88  ret i1 false
89}
90