xref: /llvm-project/llvm/test/Transforms/InstCombine/should-change-type.ll (revision acdc419c897f8a9414c7a00c8908ac32312afee2)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=instcombine -S | FileCheck %s
3target datalayout = "n64"
4
5; Tests for removing zext/trunc from/to i8, i16 and i32, even if it is
6; not a legal type.
7
8define i8 @test1(i8 %x, i8 %y) {
9; CHECK-LABEL: @test1(
10; CHECK-NEXT:    [[C:%.*]] = add i8 [[X:%.*]], [[Y:%.*]]
11; CHECK-NEXT:    ret i8 [[C]]
12;
13  %xz = zext i8 %x to i64
14  %yz = zext i8 %y to i64
15  %c = add i64 %xz, %yz
16  %d = trunc i64 %c to i8
17  ret i8 %d
18}
19
20define i16 @test2(i16 %x, i16 %y) {
21; CHECK-LABEL: @test2(
22; CHECK-NEXT:    [[C:%.*]] = add i16 [[X:%.*]], [[Y:%.*]]
23; CHECK-NEXT:    ret i16 [[C]]
24;
25  %xz = zext i16 %x to i64
26  %yz = zext i16 %y to i64
27  %c = add i64 %xz, %yz
28  %d = trunc i64 %c to i16
29  ret i16 %d
30}
31
32define i32 @test3(i32 %x, i32 %y) {
33; CHECK-LABEL: @test3(
34; CHECK-NEXT:    [[C:%.*]] = add i32 [[X:%.*]], [[Y:%.*]]
35; CHECK-NEXT:    ret i32 [[C]]
36;
37  %xz = zext i32 %x to i64
38  %yz = zext i32 %y to i64
39  %c = add i64 %xz, %yz
40  %d = trunc i64 %c to i32
41  ret i32 %d
42}
43
44define i9 @test4(i9 %x, i9 %y) {
45; CHECK-LABEL: @test4(
46; CHECK-NEXT:    [[XZ:%.*]] = zext i9 [[X:%.*]] to i64
47; CHECK-NEXT:    [[YZ:%.*]] = zext i9 [[Y:%.*]] to i64
48; CHECK-NEXT:    [[C:%.*]] = add nuw nsw i64 [[XZ]], [[YZ]]
49; CHECK-NEXT:    [[D:%.*]] = trunc i64 [[C]] to i9
50; CHECK-NEXT:    ret i9 [[D]]
51;
52  %xz = zext i9 %x to i64
53  %yz = zext i9 %y to i64
54  %c = add i64 %xz, %yz
55  %d = trunc i64 %c to i9
56  ret i9 %d
57}
58