xref: /llvm-project/llvm/test/Transforms/InstCombine/select-cmp.ll (revision d76ea250c8b91f59664594b92eb5ab966eb8be90)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=instcombine -S | FileCheck %s
3
4define i1 @f(i1 %cond, i32 %x, i32 %x2) {
5; CHECK-LABEL: @f(
6; CHECK-NEXT:    [[C:%.*]] = icmp eq i32 [[X:%.*]], [[X2:%.*]]
7; CHECK-NEXT:    ret i1 [[C]]
8;
9  %y = select i1 %cond, i32 poison, i32 %x
10  %c = icmp eq i32 %y, %x2
11  ret i1 %c
12}
13
14define i1 @icmp_ne_common_op00(i1 %c, i6 %x, i6 %y, i6 %z) {
15; CHECK-LABEL: @icmp_ne_common_op00(
16; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
17; CHECK-NEXT:    [[R:%.*]] = icmp ne i6 [[X:%.*]], [[R_V]]
18; CHECK-NEXT:    ret i1 [[R]]
19;
20  %cmp1 = icmp ne i6 %x, %y
21  %cmp2 = icmp ne i6 %x, %z
22  %r = select i1 %c, i1 %cmp1, i1 %cmp2
23  ret i1 %r
24}
25
26define i1 @icmp_ne_samesign_common(i1 %c, i6 %x, i6 %y, i6 %z) {
27; CHECK-LABEL: @icmp_ne_samesign_common(
28; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
29; CHECK-NEXT:    [[R:%.*]] = icmp ne i6 [[X:%.*]], [[R_V]]
30; CHECK-NEXT:    ret i1 [[R]]
31;
32  %cmp1 = icmp samesign ne i6 %x, %y
33  %cmp2 = icmp ne i6 %x, %z
34  %r = select i1 %c, i1 %cmp1, i1 %cmp2
35  ret i1 %r
36}
37
38define i1 @icmp_ne_common_op01(i1 %c, i3 %x, i3 %y, i3 %z) {
39; CHECK-LABEL: @icmp_ne_common_op01(
40; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i3 [[Y:%.*]], i3 [[Z:%.*]]
41; CHECK-NEXT:    [[R:%.*]] = icmp ne i3 [[X:%.*]], [[R_V]]
42; CHECK-NEXT:    ret i1 [[R]]
43;
44  %cmp1 = icmp ne i3 %x, %y
45  %cmp2 = icmp ne i3 %z, %x
46  %r = select i1 %c, i1 %cmp1, i1 %cmp2
47  ret i1 %r
48}
49
50define i1 @icmp_ne_common_op10(i1 %c, i4 %x, i4 %y, i4 %z) {
51; CHECK-LABEL: @icmp_ne_common_op10(
52; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i4 [[Y:%.*]], i4 [[Z:%.*]]
53; CHECK-NEXT:    [[R:%.*]] = icmp ne i4 [[X:%.*]], [[R_V]]
54; CHECK-NEXT:    ret i1 [[R]]
55;
56  %cmp1 = icmp ne i4 %y, %x
57  %cmp2 = icmp ne i4 %x, %z
58  %r = select i1 %c, i1 %cmp1, i1 %cmp2
59  ret i1 %r
60}
61
62define <3 x i1> @icmp_ne_common_op11(<3 x i1> %c, <3 x i17> %x, <3 x i17> %y, <3 x i17> %z) {
63; CHECK-LABEL: @icmp_ne_common_op11(
64; CHECK-NEXT:    [[R_V:%.*]] = select <3 x i1> [[C:%.*]], <3 x i17> [[Y:%.*]], <3 x i17> [[Z:%.*]]
65; CHECK-NEXT:    [[R:%.*]] = icmp ne <3 x i17> [[X:%.*]], [[R_V]]
66; CHECK-NEXT:    ret <3 x i1> [[R]]
67;
68  %cmp1 = icmp ne <3 x i17> %y, %x
69  %cmp2 = icmp ne <3 x i17> %z, %x
70  %r = select <3 x i1> %c, <3 x i1> %cmp1, <3 x i1> %cmp2
71  ret <3 x i1> %r
72}
73
74define i1 @icmp_eq_common_op00(i1 %c, i5 %x, i5 %y, i5 %z) {
75; CHECK-LABEL: @icmp_eq_common_op00(
76; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i5 [[Y:%.*]], i5 [[Z:%.*]]
77; CHECK-NEXT:    [[R:%.*]] = icmp eq i5 [[X:%.*]], [[R_V]]
78; CHECK-NEXT:    ret i1 [[R]]
79;
80  %cmp1 = icmp eq i5 %x, %y
81  %cmp2 = icmp eq i5 %x, %z
82  %r = select i1 %c, i1 %cmp1, i1 %cmp2
83  ret i1 %r
84}
85
86define i1 @icmp_eq_samesign_common(i1 %c, i5 %x, i5 %y, i5 %z) {
87; CHECK-LABEL: @icmp_eq_samesign_common(
88; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i5 [[Y:%.*]], i5 [[Z:%.*]]
89; CHECK-NEXT:    [[R:%.*]] = icmp eq i5 [[X:%.*]], [[R_V]]
90; CHECK-NEXT:    ret i1 [[R]]
91;
92  %cmp1 = icmp eq i5 %x, %y
93  %cmp2 = icmp samesign eq i5 %x, %z
94  %r = select i1 %c, i1 %cmp1, i1 %cmp2
95  ret i1 %r
96}
97
98define <5 x i1> @icmp_eq_common_op01(<5 x i1> %c, <5 x i7> %x, <5 x i7> %y, <5 x i7> %z) {
99; CHECK-LABEL: @icmp_eq_common_op01(
100; CHECK-NEXT:    [[R_V:%.*]] = select <5 x i1> [[C:%.*]], <5 x i7> [[Y:%.*]], <5 x i7> [[Z:%.*]]
101; CHECK-NEXT:    [[R:%.*]] = icmp eq <5 x i7> [[X:%.*]], [[R_V]]
102; CHECK-NEXT:    ret <5 x i1> [[R]]
103;
104  %cmp1 = icmp eq <5 x i7> %x, %y
105  %cmp2 = icmp eq <5 x i7> %z, %x
106  %r = select <5 x i1> %c, <5 x i1> %cmp1, <5 x i1> %cmp2
107  ret <5 x i1> %r
108}
109
110define i1 @icmp_eq_common_op10(i1 %c, i32 %x, i32 %y, i32 %z) {
111; CHECK-LABEL: @icmp_eq_common_op10(
112; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]
113; CHECK-NEXT:    [[R:%.*]] = icmp eq i32 [[X:%.*]], [[R_V]]
114; CHECK-NEXT:    ret i1 [[R]]
115;
116  %cmp1 = icmp eq i32 %y, %x
117  %cmp2 = icmp eq i32 %x, %z
118  %r = select i1 %c, i1 %cmp1, i1 %cmp2
119  ret i1 %r
120}
121
122define i1 @icmp_eq_common_op11(i1 %c, i64 %x, i64 %y, i64 %z) {
123; CHECK-LABEL: @icmp_eq_common_op11(
124; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i64 [[Y:%.*]], i64 [[Z:%.*]]
125; CHECK-NEXT:    [[R:%.*]] = icmp eq i64 [[X:%.*]], [[R_V]]
126; CHECK-NEXT:    ret i1 [[R]]
127;
128  %cmp1 = icmp eq i64 %y, %x
129  %cmp2 = icmp eq i64 %z, %x
130  %r = select i1 %c, i1 %cmp1, i1 %cmp2
131  ret i1 %r
132}
133
134define i1 @icmp_common_one_use_1(i1 %c, i8 %x, i8 %y, i8 %z) {
135; CHECK-LABEL: @icmp_common_one_use_1(
136; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i8 [[Y:%.*]], [[X:%.*]]
137; CHECK-NEXT:    call void @use(i1 [[CMP1]])
138; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i8 [[Y]], i8 [[Z:%.*]]
139; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[X]], [[R_V]]
140; CHECK-NEXT:    ret i1 [[R]]
141;
142  %cmp1 = icmp eq i8 %y, %x
143  call void @use(i1 %cmp1)
144  %cmp2 = icmp eq i8 %z, %x
145  %r = select i1 %c, i1 %cmp1, i1 %cmp2
146  ret i1 %r
147}
148
149define i1 @icmp_slt_common(i1 %c, i6 %x, i6 %y, i6 %z) {
150; CHECK-LABEL: @icmp_slt_common(
151; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
152; CHECK-NEXT:    [[R:%.*]] = icmp slt i6 [[X:%.*]], [[R_V]]
153; CHECK-NEXT:    ret i1 [[R]]
154;
155  %cmp1 = icmp slt i6 %x, %y
156  %cmp2 = icmp slt i6 %x, %z
157  %r = select i1 %c, i1 %cmp1, i1 %cmp2
158  ret i1 %r
159}
160
161define i1 @icmp_slt_samesign_common(i1 %c, i6 %x, i6 %y, i6 %z) {
162; CHECK-LABEL: @icmp_slt_samesign_common(
163; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
164; CHECK-NEXT:    [[R:%.*]] = icmp slt i6 [[X:%.*]], [[R_V]]
165; CHECK-NEXT:    ret i1 [[R]]
166;
167  %cmp1 = icmp samesign ult i6 %x, %y
168  %cmp2 = icmp slt i6 %x, %z
169  %r = select i1 %c, i1 %cmp1, i1 %cmp2
170  ret i1 %r
171}
172
173define i1 @icmp_sgt_common(i1 %c, i6 %x, i6 %y, i6 %z) {
174; CHECK-LABEL: @icmp_sgt_common(
175; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
176; CHECK-NEXT:    [[R:%.*]] = icmp sgt i6 [[X:%.*]], [[R_V]]
177; CHECK-NEXT:    ret i1 [[R]]
178;
179  %cmp1 = icmp sgt i6 %x, %y
180  %cmp2 = icmp sgt i6 %x, %z
181  %r = select i1 %c, i1 %cmp1, i1 %cmp2
182  ret i1 %r
183}
184
185define i1 @icmp_sgt_samesign_common(i1 %c, i6 %x, i6 %y, i6 %z) {
186; CHECK-LABEL: @icmp_sgt_samesign_common(
187; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
188; CHECK-NEXT:    [[R:%.*]] = icmp sgt i6 [[X:%.*]], [[R_V]]
189; CHECK-NEXT:    ret i1 [[R]]
190;
191  %cmp1 = icmp samesign ugt i6 %x, %y
192  %cmp2 = icmp sgt i6 %x, %z
193  %r = select i1 %c, i1 %cmp1, i1 %cmp2
194  ret i1 %r
195}
196
197define i1 @icmp_sle_common(i1 %c, i6 %x, i6 %y, i6 %z) {
198; CHECK-LABEL: @icmp_sle_common(
199; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
200; CHECK-NEXT:    [[R:%.*]] = icmp sge i6 [[X:%.*]], [[R_V]]
201; CHECK-NEXT:    ret i1 [[R]]
202;
203  %cmp1 = icmp sle i6 %y, %x
204  %cmp2 = icmp sle i6 %z, %x
205  %r = select i1 %c, i1 %cmp1, i1 %cmp2
206  ret i1 %r
207}
208
209define i1 @icmp_sle_samesign_common(i1 %c, i6 %x, i6 %y, i6 %z) {
210; CHECK-LABEL: @icmp_sle_samesign_common(
211; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
212; CHECK-NEXT:    [[R:%.*]] = icmp sge i6 [[X:%.*]], [[R_V]]
213; CHECK-NEXT:    ret i1 [[R]]
214;
215  %cmp1 = icmp sle i6 %y, %x
216  %cmp2 = icmp samesign ule i6 %z, %x
217  %r = select i1 %c, i1 %cmp1, i1 %cmp2
218  ret i1 %r
219}
220
221define i1 @icmp_sge_common(i1 %c, i6 %x, i6 %y, i6 %z) {
222; CHECK-LABEL: @icmp_sge_common(
223; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
224; CHECK-NEXT:    [[R:%.*]] = icmp sle i6 [[X:%.*]], [[R_V]]
225; CHECK-NEXT:    ret i1 [[R]]
226;
227  %cmp1 = icmp sge i6 %y, %x
228  %cmp2 = icmp sge i6 %z, %x
229  %r = select i1 %c, i1 %cmp1, i1 %cmp2
230  ret i1 %r
231}
232
233define i1 @icmp_sge_samesign_common(i1 %c, i6 %x, i6 %y, i6 %z) {
234; CHECK-LABEL: @icmp_sge_samesign_common(
235; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
236; CHECK-NEXT:    [[R:%.*]] = icmp sle i6 [[X:%.*]], [[R_V]]
237; CHECK-NEXT:    ret i1 [[R]]
238;
239  %cmp1 = icmp sge i6 %y, %x
240  %cmp2 = icmp samesign uge i6 %z, %x
241  %r = select i1 %c, i1 %cmp1, i1 %cmp2
242  ret i1 %r
243}
244
245define i1 @icmp_slt_sgt_common(i1 %c, i6 %x, i6 %y, i6 %z) {
246; CHECK-LABEL: @icmp_slt_sgt_common(
247; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
248; CHECK-NEXT:    [[R:%.*]] = icmp slt i6 [[X:%.*]], [[R_V]]
249; CHECK-NEXT:    ret i1 [[R]]
250;
251  %cmp1 = icmp slt i6 %x, %y
252  %cmp2 = icmp sgt i6 %z, %x
253  %r = select i1 %c, i1 %cmp1, i1 %cmp2
254  ret i1 %r
255}
256
257define i1 @icmp_slt_sgt_samesign_common(i1 %c, i6 %x, i6 %y, i6 %z) {
258; CHECK-LABEL: @icmp_slt_sgt_samesign_common(
259; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
260; CHECK-NEXT:    [[R:%.*]] = icmp slt i6 [[X:%.*]], [[R_V]]
261; CHECK-NEXT:    ret i1 [[R]]
262;
263  %cmp1 = icmp samesign ult i6 %x, %y
264  %cmp2 = icmp sgt i6 %z, %x
265  %r = select i1 %c, i1 %cmp1, i1 %cmp2
266  ret i1 %r
267}
268
269define i1 @icmp_sle_sge_common(i1 %c, i6 %x, i6 %y, i6 %z) {
270; CHECK-LABEL: @icmp_sle_sge_common(
271; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
272; CHECK-NEXT:    [[R:%.*]] = icmp sge i6 [[X:%.*]], [[R_V]]
273; CHECK-NEXT:    ret i1 [[R]]
274;
275  %cmp1 = icmp sle i6 %y, %x
276  %cmp2 = icmp sge i6 %x, %z
277  %r = select i1 %c, i1 %cmp1, i1 %cmp2
278  ret i1 %r
279}
280
281define i1 @icmp_sle_sge_samesign_common(i1 %c, i6 %x, i6 %y, i6 %z) {
282; CHECK-LABEL: @icmp_sle_sge_samesign_common(
283; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
284; CHECK-NEXT:    [[R:%.*]] = icmp sge i6 [[X:%.*]], [[R_V]]
285; CHECK-NEXT:    ret i1 [[R]]
286;
287  %cmp1 = icmp sle i6 %y, %x
288  %cmp2 = icmp samesign uge i6 %x, %z
289  %r = select i1 %c, i1 %cmp1, i1 %cmp2
290  ret i1 %r
291}
292
293define i1 @icmp_ult_common(i1 %c, i6 %x, i6 %y, i6 %z) {
294; CHECK-LABEL: @icmp_ult_common(
295; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
296; CHECK-NEXT:    [[R:%.*]] = icmp ult i6 [[X:%.*]], [[R_V]]
297; CHECK-NEXT:    ret i1 [[R]]
298;
299  %cmp1 = icmp ult i6 %x, %y
300  %cmp2 = icmp ult i6 %x, %z
301  %r = select i1 %c, i1 %cmp1, i1 %cmp2
302  ret i1 %r
303}
304
305define i1 @icmp_ule_common(i1 %c, i6 %x, i6 %y, i6 %z) {
306; CHECK-LABEL: @icmp_ule_common(
307; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
308; CHECK-NEXT:    [[R:%.*]] = icmp uge i6 [[X:%.*]], [[R_V]]
309; CHECK-NEXT:    ret i1 [[R]]
310;
311  %cmp1 = icmp ule i6 %y, %x
312  %cmp2 = icmp ule i6 %z, %x
313  %r = select i1 %c, i1 %cmp1, i1 %cmp2
314  ret i1 %r
315}
316
317define i1 @icmp_ugt_common(i1 %c, i8 %x, i8 %y, i8 %z) {
318; CHECK-LABEL: @icmp_ugt_common(
319; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]
320; CHECK-NEXT:    [[R:%.*]] = icmp ult i8 [[X:%.*]], [[R_V]]
321; CHECK-NEXT:    ret i1 [[R]]
322;
323  %cmp1 = icmp ugt i8 %y, %x
324  %cmp2 = icmp ugt i8 %z, %x
325  %r = select i1 %c, i1 %cmp1, i1 %cmp2
326  ret i1 %r
327}
328
329define i1 @icmp_uge_common(i1 %c, i6 %x, i6 %y, i6 %z) {
330; CHECK-LABEL: @icmp_uge_common(
331; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
332; CHECK-NEXT:    [[R:%.*]] = icmp ule i6 [[X:%.*]], [[R_V]]
333; CHECK-NEXT:    ret i1 [[R]]
334;
335  %cmp1 = icmp uge i6 %y, %x
336  %cmp2 = icmp uge i6 %z, %x
337  %r = select i1 %c, i1 %cmp1, i1 %cmp2
338  ret i1 %r
339}
340
341define i1 @icmp_ult_ugt_common(i1 %c, i6 %x, i6 %y, i6 %z) {
342; CHECK-LABEL: @icmp_ult_ugt_common(
343; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
344; CHECK-NEXT:    [[R:%.*]] = icmp ult i6 [[X:%.*]], [[R_V]]
345; CHECK-NEXT:    ret i1 [[R]]
346;
347  %cmp1 = icmp ult i6 %x, %y
348  %cmp2 = icmp ugt i6 %z, %x
349  %r = select i1 %c, i1 %cmp1, i1 %cmp2
350  ret i1 %r
351}
352
353define i1 @icmp_ule_uge_common(i1 %c, i6 %x, i6 %y, i6 %z) {
354; CHECK-LABEL: @icmp_ule_uge_common(
355; CHECK-NEXT:    [[R_V:%.*]] = select i1 [[C:%.*]], i6 [[Y:%.*]], i6 [[Z:%.*]]
356; CHECK-NEXT:    [[R:%.*]] = icmp uge i6 [[X:%.*]], [[R_V]]
357; CHECK-NEXT:    ret i1 [[R]]
358;
359  %cmp1 = icmp ule i6 %y, %x
360  %cmp2 = icmp uge i6 %x, %z
361  %r = select i1 %c, i1 %cmp1, i1 %cmp2
362  ret i1 %r
363}
364
365; negative test: pred is not the same
366
367define i1 @icmp_common_pred_different(i1 %c, i8 %x, i8 %y, i8 %z) {
368; CHECK-LABEL: @icmp_common_pred_different(
369; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i8 [[Y:%.*]], [[X:%.*]]
370; CHECK-NEXT:    [[CMP2:%.*]] = icmp ne i8 [[Z:%.*]], [[X]]
371; CHECK-NEXT:    [[R:%.*]] = select i1 [[C:%.*]], i1 [[CMP1]], i1 [[CMP2]]
372; CHECK-NEXT:    ret i1 [[R]]
373;
374  %cmp1 = icmp eq i8 %y, %x
375  %cmp2 = icmp ne i8 %z, %x
376  %r = select i1 %c, i1 %cmp1, i1 %cmp2
377  ret i1 %r
378}
379
380; negative test for non-equality: two pred is not swap
381
382define i1 @icmp_common_pred_not_swap(i1 %c, i8 %x, i8 %y, i8 %z) {
383; CHECK-LABEL: @icmp_common_pred_not_swap(
384; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i8 [[Y:%.*]], [[X:%.*]]
385; CHECK-NEXT:    [[CMP2:%.*]] = icmp sle i8 [[Z:%.*]], [[X]]
386; CHECK-NEXT:    [[R:%.*]] = select i1 [[C:%.*]], i1 [[CMP1]], i1 [[CMP2]]
387; CHECK-NEXT:    ret i1 [[R]]
388;
389  %cmp1 = icmp slt i8 %y, %x
390  %cmp2 = icmp sle i8 %z, %x
391  %r = select i1 %c, i1 %cmp1, i1 %cmp2
392  ret i1 %r
393}
394
395; negative test for non-equality: not commute pred
396
397define i1 @icmp_common_pred_not_commute_pred(i1 %c, i8 %x, i8 %y, i8 %z) {
398; CHECK-LABEL: @icmp_common_pred_not_commute_pred(
399; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i8 [[Y:%.*]], [[X:%.*]]
400; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i8 [[Z:%.*]], [[X]]
401; CHECK-NEXT:    [[R:%.*]] = select i1 [[C:%.*]], i1 [[CMP1]], i1 [[CMP2]]
402; CHECK-NEXT:    ret i1 [[R]]
403;
404  %cmp1 = icmp slt i8 %y, %x
405  %cmp2 = icmp sgt i8 %z, %x
406  %r = select i1 %c, i1 %cmp1, i1 %cmp2
407  ret i1 %r
408}
409
410; negative test: both icmp is not one-use
411
412define i1 @icmp_common_one_use_0(i1 %c, i8 %x, i8 %y, i8 %z) {
413; CHECK-LABEL: @icmp_common_one_use_0(
414; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i8 [[Y:%.*]], [[X:%.*]]
415; CHECK-NEXT:    call void @use(i1 [[CMP1]])
416; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i8 [[Z:%.*]], [[X]]
417; CHECK-NEXT:    call void @use(i1 [[CMP2]])
418; CHECK-NEXT:    [[R:%.*]] = select i1 [[C:%.*]], i1 [[CMP1]], i1 [[CMP2]]
419; CHECK-NEXT:    ret i1 [[R]]
420;
421  %cmp1 = icmp eq i8 %y, %x
422  call void @use(i1 %cmp1)
423  %cmp2 = icmp eq i8 %z, %x
424  call void @use(i1 %cmp2)
425  %r = select i1 %c, i1 %cmp1, i1 %cmp2
426  ret i1 %r
427}
428
429; negative test: no common op
430
431define i1 @icmp_no_common(i1 %c, i8 %x, i8 %y, i8 %z) {
432; CHECK-LABEL: @icmp_no_common(
433; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i8 [[Y:%.*]], 0
434; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i8 [[Z:%.*]], [[X:%.*]]
435; CHECK-NEXT:    [[R:%.*]] = select i1 [[C:%.*]], i1 [[CMP1]], i1 [[CMP2]]
436; CHECK-NEXT:    ret i1 [[R]]
437;
438  %cmp1 = icmp eq i8 %y, 0
439  %cmp2 = icmp eq i8 %z, %x
440  %r = select i1 %c, i1 %cmp1, i1 %cmp2
441  ret i1 %r
442}
443
444define i1 @test_select_inverse_eq(i64 %x, i1 %y) {
445; CHECK-LABEL: @test_select_inverse_eq(
446; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i64 [[X:%.*]], 0
447; CHECK-NEXT:    [[SEL:%.*]] = xor i1 [[Y:%.*]], [[CMP2]]
448; CHECK-NEXT:    ret i1 [[SEL]]
449;
450  %cmp1 = icmp ne i64 %x, 0
451  %cmp2 = icmp eq i64 %x, 0
452  %sel = select i1 %y, i1 %cmp1, i1 %cmp2
453  ret i1 %sel
454}
455
456define i1 @test_select_inverse_signed(i64 %x, i1 %y) {
457; CHECK-LABEL: @test_select_inverse_signed(
458; CHECK-NEXT:    [[CMP2:%.*]] = icmp slt i64 [[X:%.*]], 0
459; CHECK-NEXT:    [[SEL:%.*]] = xor i1 [[Y:%.*]], [[CMP2]]
460; CHECK-NEXT:    ret i1 [[SEL]]
461;
462  %cmp1 = icmp sgt i64 %x, -1
463  %cmp2 = icmp slt i64 %x, 0
464  %sel = select i1 %y, i1 %cmp1, i1 %cmp2
465  ret i1 %sel
466}
467
468define i1 @test_select_inverse_unsigned(i64 %x, i1 %y) {
469; CHECK-LABEL: @test_select_inverse_unsigned(
470; CHECK-NEXT:    [[CMP2:%.*]] = icmp ugt i64 [[X:%.*]], 10
471; CHECK-NEXT:    [[SEL:%.*]] = xor i1 [[Y:%.*]], [[CMP2]]
472; CHECK-NEXT:    ret i1 [[SEL]]
473;
474  %cmp1 = icmp ult i64 %x, 11
475  %cmp2 = icmp ugt i64 %x, 10
476  %sel = select i1 %y, i1 %cmp1, i1 %cmp2
477  ret i1 %sel
478}
479
480define i1 @test_select_inverse_eq_ptr(ptr %x, i1 %y) {
481; CHECK-LABEL: @test_select_inverse_eq_ptr(
482; CHECK-NEXT:    [[CMP2:%.*]] = icmp ne ptr [[X:%.*]], null
483; CHECK-NEXT:    [[SEL:%.*]] = xor i1 [[Y:%.*]], [[CMP2]]
484; CHECK-NEXT:    ret i1 [[SEL]]
485;
486  %cmp1 = icmp eq ptr %x, null
487  %cmp2 = icmp ne ptr %x, null
488  %sel = select i1 %y, i1 %cmp1, i1 %cmp2
489  ret i1 %sel
490}
491
492define i1 @test_select_inverse_fail(i64 %x, i1 %y) {
493; CHECK-LABEL: @test_select_inverse_fail(
494; CHECK-NEXT:    [[CMP1:%.*]] = icmp sgt i64 [[X:%.*]], 0
495; CHECK-NEXT:    [[CMP2:%.*]] = icmp slt i64 [[X]], 0
496; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[Y:%.*]], i1 [[CMP1]], i1 [[CMP2]]
497; CHECK-NEXT:    ret i1 [[SEL]]
498;
499  %cmp1 = icmp sgt i64 %x, 0
500  %cmp2 = icmp slt i64 %x, 0
501  %sel = select i1 %y, i1 %cmp1, i1 %cmp2
502  ret i1 %sel
503}
504
505define <2 x i1> @test_select_inverse_vec(<2 x i64> %x, <2 x i1> %y) {
506; CHECK-LABEL: @test_select_inverse_vec(
507; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq <2 x i64> [[X:%.*]], zeroinitializer
508; CHECK-NEXT:    [[SEL:%.*]] = xor <2 x i1> [[Y:%.*]], [[CMP2]]
509; CHECK-NEXT:    ret <2 x i1> [[SEL]]
510;
511  %cmp1 = icmp ne <2 x i64> %x, zeroinitializer
512  %cmp2 = icmp eq <2 x i64> %x, zeroinitializer
513  %sel = select <2 x i1> %y, <2 x i1> %cmp1, <2 x i1> %cmp2
514  ret <2 x i1> %sel
515}
516
517define <2 x i1> @test_select_inverse_vec_fail(<2 x i64> %x, i1 %y) {
518; CHECK-LABEL: @test_select_inverse_vec_fail(
519; CHECK-NEXT:    [[CMP1:%.*]] = icmp ne <2 x i64> [[X:%.*]], zeroinitializer
520; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq <2 x i64> [[X]], zeroinitializer
521; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[Y:%.*]], <2 x i1> [[CMP1]], <2 x i1> [[CMP2]]
522; CHECK-NEXT:    ret <2 x i1> [[SEL]]
523;
524  %cmp1 = icmp ne <2 x i64> %x, zeroinitializer
525  %cmp2 = icmp eq <2 x i64> %x, zeroinitializer
526  %sel = select i1 %y, <2 x i1> %cmp1, <2 x i1> %cmp2
527  ret <2 x i1> %sel
528}
529
530define i1 @test_select_inverse_nonconst1(i64 %x, i64 %y, i1 %cond) {
531; CHECK-LABEL: @test_select_inverse_nonconst1(
532; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i64 [[X:%.*]], [[Y:%.*]]
533; CHECK-NEXT:    [[SEL:%.*]] = xor i1 [[COND:%.*]], [[CMP2]]
534; CHECK-NEXT:    ret i1 [[SEL]]
535;
536  %cmp1 = icmp ne i64 %x, %y
537  %cmp2 = icmp eq i64 %x, %y
538  %sel = select i1 %cond, i1 %cmp1, i1 %cmp2
539  ret i1 %sel
540}
541
542define i1 @test_select_inverse_nonconst2(i64 %x, i64 %y, i1 %cond) {
543; CHECK-LABEL: @test_select_inverse_nonconst2(
544; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i64 [[Y:%.*]], [[X:%.*]]
545; CHECK-NEXT:    [[SEL:%.*]] = xor i1 [[COND:%.*]], [[CMP2]]
546; CHECK-NEXT:    ret i1 [[SEL]]
547;
548  %cmp1 = icmp ne i64 %x, %y
549  %cmp2 = icmp eq i64 %y, %x
550  %sel = select i1 %cond, i1 %cmp1, i1 %cmp2
551  ret i1 %sel
552}
553
554define i1 @test_select_inverse_nonconst3(i64 %x, i64 %y, i1 %cond) {
555; CHECK-LABEL: @test_select_inverse_nonconst3(
556; CHECK-NEXT:    [[CMP2:%.*]] = icmp uge i64 [[X:%.*]], [[Y:%.*]]
557; CHECK-NEXT:    [[SEL:%.*]] = xor i1 [[COND:%.*]], [[CMP2]]
558; CHECK-NEXT:    ret i1 [[SEL]]
559;
560  %cmp1 = icmp ult i64 %x, %y
561  %cmp2 = icmp uge i64 %x, %y
562  %sel = select i1 %cond, i1 %cmp1, i1 %cmp2
563  ret i1 %sel
564}
565
566define i1 @test_select_inverse_nonconst4(i64 %x, i64 %y, i64 %z, i1 %cond) {
567; CHECK-LABEL: @test_select_inverse_nonconst4(
568; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i64 [[X:%.*]], [[Y:%.*]]
569; CHECK-NEXT:    [[CMP2:%.*]] = icmp uge i64 [[Z:%.*]], [[Y]]
570; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i1 [[CMP1]], i1 [[CMP2]]
571; CHECK-NEXT:    ret i1 [[SEL]]
572;
573  %cmp1 = icmp ult i64 %x, %y
574  %cmp2 = icmp uge i64 %z, %y
575  %sel = select i1 %cond, i1 %cmp1, i1 %cmp2
576  ret i1 %sel
577}
578
579define i1 @test_select_inverse_samesign_true_arm(i64 %x, i64 %y, i1 %cond) {
580; CHECK-LABEL: @test_select_inverse_samesign_true_arm(
581; CHECK-NEXT:    [[CMP1:%.*]] = icmp samesign ult i64 [[X:%.*]], [[Y:%.*]]
582; CHECK-NEXT:    [[CMP2:%.*]] = icmp uge i64 [[X]], [[Y]]
583; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i1 [[CMP1]], i1 [[CMP2]]
584; CHECK-NEXT:    ret i1 [[SEL]]
585;
586  %cmp1 = icmp samesign ult i64 %x, %y
587  %cmp2 = icmp uge i64 %x, %y
588  %sel = select i1 %cond, i1 %cmp1, i1 %cmp2
589  ret i1 %sel
590}
591
592define i1 @test_select_inverse_samesign_false_arm(i64 %x, i64 %y, i1 %cond) {
593; CHECK-LABEL: @test_select_inverse_samesign_false_arm(
594; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i64 [[X:%.*]], [[Y:%.*]]
595; CHECK-NEXT:    [[CMP2:%.*]] = icmp samesign uge i64 [[X]], [[Y]]
596; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i1 [[CMP1]], i1 [[CMP2]]
597; CHECK-NEXT:    ret i1 [[SEL]]
598;
599  %cmp1 = icmp ult i64 %x, %y
600  %cmp2 = icmp samesign uge i64 %x, %y
601  %sel = select i1 %cond, i1 %cmp1, i1 %cmp2
602  ret i1 %sel
603}
604
605define i1 @test_select_inverse_samesign_both(i64 %x, i64 %y, i1 %cond) {
606; CHECK-LABEL: @test_select_inverse_samesign_both(
607; CHECK-NEXT:    [[CMP2:%.*]] = icmp samesign uge i64 [[X:%.*]], [[Y:%.*]]
608; CHECK-NEXT:    [[SEL:%.*]] = xor i1 [[COND:%.*]], [[CMP2]]
609; CHECK-NEXT:    ret i1 [[SEL]]
610;
611  %cmp1 = icmp samesign ult i64 %x, %y
612  %cmp2 = icmp samesign uge i64 %x, %y
613  %sel = select i1 %cond, i1 %cmp1, i1 %cmp2
614  ret i1 %sel
615}
616
617define i1 @test_select_inverse_samesign_false_arm_rhsc_same_sign(i64 %x, i64 %y, i1 %cond) {
618; CHECK-LABEL: @test_select_inverse_samesign_false_arm_rhsc_same_sign(
619; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i64 [[X:%.*]], 11
620; CHECK-NEXT:    [[CMP2:%.*]] = icmp samesign ugt i64 [[X]], 10
621; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i1 [[CMP1]], i1 [[CMP2]]
622; CHECK-NEXT:    ret i1 [[SEL]]
623;
624  %cmp1 = icmp ult i64 %x, 11
625  %cmp2 = icmp samesign ugt i64 %x, 10
626  %sel = select i1 %cond, i1 %cmp1, i1 %cmp2
627  ret i1 %sel
628}
629
630define i1 @test_select_inverse_samesign_true_arm_rhsc_same_sign(i64 %x, i64 %y, i1 %cond) {
631; CHECK-LABEL: @test_select_inverse_samesign_true_arm_rhsc_same_sign(
632; CHECK-NEXT:    [[CMP1:%.*]] = icmp samesign ult i64 [[X:%.*]], 11
633; CHECK-NEXT:    [[CMP2:%.*]] = icmp ugt i64 [[X]], 10
634; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i1 [[CMP1]], i1 [[CMP2]]
635; CHECK-NEXT:    ret i1 [[SEL]]
636;
637  %cmp1 = icmp samesign ult i64 %x, 11
638  %cmp2 = icmp ugt i64 %x, 10
639  %sel = select i1 %cond, i1 %cmp1, i1 %cmp2
640  ret i1 %sel
641}
642
643define i1 @test_select_inverse_samesign_both_rhsc_same_sign(i64 %x, i64 %y, i1 %cond) {
644; CHECK-LABEL: @test_select_inverse_samesign_both_rhsc_same_sign(
645; CHECK-NEXT:    [[CMP2:%.*]] = icmp samesign ugt i64 [[X:%.*]], 10
646; CHECK-NEXT:    [[SEL:%.*]] = xor i1 [[COND:%.*]], [[CMP2]]
647; CHECK-NEXT:    ret i1 [[SEL]]
648;
649  %cmp1 = icmp samesign ult i64 %x, 11
650  %cmp2 = icmp samesign ugt i64 %x, 10
651  %sel = select i1 %cond, i1 %cmp1, i1 %cmp2
652  ret i1 %sel
653}
654
655define i1 @test_select_inverse_samesign_both_rhsc_diff_sign(i64 %x, i64 %y, i1 %cond) {
656; CHECK-LABEL: @test_select_inverse_samesign_both_rhsc_diff_sign(
657; CHECK-NEXT:    [[CMP1:%.*]] = icmp samesign slt i64 [[X:%.*]], 0
658; CHECK-NEXT:    [[CMP2:%.*]] = icmp samesign sgt i64 [[X]], -1
659; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i1 [[CMP1]], i1 [[CMP2]]
660; CHECK-NEXT:    ret i1 [[SEL]]
661;
662  %cmp1 = icmp samesign slt i64 %x, 0
663  %cmp2 = icmp samesign sgt i64 %x, -1
664  %sel = select i1 %cond, i1 %cmp1, i1 %cmp2
665  ret i1 %sel
666}
667
668define i1 @sel_icmp_two_cmp(i1 %c, i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
669; CHECK-LABEL: @sel_icmp_two_cmp(
670; CHECK-NEXT:    [[CMP1:%.*]] = icmp ule i32 [[A1:%.*]], [[A2:%.*]]
671; CHECK-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[A3:%.*]], [[A4:%.*]]
672; CHECK-NEXT:    [[CMP:%.*]] = select i1 [[C:%.*]], i1 [[CMP1]], i1 [[CMP2]]
673; CHECK-NEXT:    ret i1 [[CMP]]
674;
675  %v1 = call i8 @llvm.ucmp(i32 %a1, i32 %a2)
676  %v2 = call i8 @llvm.scmp(i32 %a3, i32 %a4)
677  %sel = select i1 %c, i8 %v1, i8 %v2
678  %cmp = icmp sle i8 %sel, 0
679  ret i1 %cmp
680}
681
682define i1 @sel_icmp_two_cmp_extra_use1(i1 %c, i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
683; CHECK-LABEL: @sel_icmp_two_cmp_extra_use1(
684; CHECK-NEXT:    [[V1:%.*]] = call i8 @llvm.ucmp.i8.i32(i32 [[A1:%.*]], i32 [[A2:%.*]])
685; CHECK-NEXT:    call void @use.i8(i8 [[V1]])
686; CHECK-NEXT:    [[CMP1:%.*]] = icmp ule i32 [[A1]], [[A2]]
687; CHECK-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[A3:%.*]], [[A4:%.*]]
688; CHECK-NEXT:    [[CMP:%.*]] = select i1 [[C:%.*]], i1 [[CMP1]], i1 [[CMP2]]
689; CHECK-NEXT:    ret i1 [[CMP]]
690;
691  %v1 = call i8 @llvm.ucmp(i32 %a1, i32 %a2)
692  %v2 = call i8 @llvm.scmp(i32 %a3, i32 %a4)
693  call void @use.i8(i8 %v1)
694  %sel = select i1 %c, i8 %v1, i8 %v2
695  %cmp = icmp sle i8 %sel, 0
696  ret i1 %cmp
697}
698
699define i1 @sel_icmp_two_cmp_extra_use2(i1 %c, i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
700; CHECK-LABEL: @sel_icmp_two_cmp_extra_use2(
701; CHECK-NEXT:    [[V1:%.*]] = call i8 @llvm.ucmp.i8.i32(i32 [[A1:%.*]], i32 [[A2:%.*]])
702; CHECK-NEXT:    [[V2:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[A3:%.*]], i32 [[A4:%.*]])
703; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[C:%.*]], i8 [[V1]], i8 [[V2]]
704; CHECK-NEXT:    call void @use.i8(i8 [[SEL]])
705; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[SEL]], 1
706; CHECK-NEXT:    ret i1 [[CMP]]
707;
708  %v1 = call i8 @llvm.ucmp(i32 %a1, i32 %a2)
709  %v2 = call i8 @llvm.scmp(i32 %a3, i32 %a4)
710  %sel = select i1 %c, i8 %v1, i8 %v2
711  call void @use.i8(i8 %sel)
712  %cmp = icmp sle i8 %sel, 0
713  ret i1 %cmp
714}
715
716define i1 @sel_icmp_two_cmp_not_const(i1 %c, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i8 %b) {
717; CHECK-LABEL: @sel_icmp_two_cmp_not_const(
718; CHECK-NEXT:    [[V1:%.*]] = call i8 @llvm.ucmp.i8.i32(i32 [[A1:%.*]], i32 [[A2:%.*]])
719; CHECK-NEXT:    [[V2:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[A3:%.*]], i32 [[A4:%.*]])
720; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[C:%.*]], i8 [[V1]], i8 [[V2]]
721; CHECK-NEXT:    [[CMP:%.*]] = icmp sle i8 [[SEL]], [[B:%.*]]
722; CHECK-NEXT:    ret i1 [[CMP]]
723;
724  %v1 = call i8 @llvm.ucmp(i32 %a1, i32 %a2)
725  %v2 = call i8 @llvm.scmp(i32 %a3, i32 %a4)
726  %sel = select i1 %c, i8 %v1, i8 %v2
727  %cmp = icmp sle i8 %sel, %b
728  ret i1 %cmp
729}
730
731define <2 x i1> @sel_icmp_two_cmp_vec(i1 %c, <2 x i32> %a1, <2 x i32> %a2, <2 x i32> %a3, <2 x i32> %a4) {
732; CHECK-LABEL: @sel_icmp_two_cmp_vec(
733; CHECK-NEXT:    [[CMP1:%.*]] = icmp ule <2 x i32> [[A1:%.*]], [[A2:%.*]]
734; CHECK-NEXT:    [[CMP2:%.*]] = icmp sle <2 x i32> [[A3:%.*]], [[A4:%.*]]
735; CHECK-NEXT:    [[CMP:%.*]] = select i1 [[C:%.*]], <2 x i1> [[CMP1]], <2 x i1> [[CMP2]]
736; CHECK-NEXT:    ret <2 x i1> [[CMP]]
737;
738  %v1 = call <2 x i8> @llvm.ucmp(<2 x i32> %a1, <2 x i32> %a2)
739  %v2 = call <2 x i8> @llvm.scmp(<2 x i32> %a3, <2 x i32> %a4)
740  %sel = select i1 %c, <2 x i8> %v1, <2 x i8> %v2
741  %cmp = icmp sle <2 x i8> %sel, zeroinitializer
742  ret <2 x i1> %cmp
743}
744
745define <2 x i1> @sel_icmp_two_cmp_vec_nonsplat(i1 %c, <2 x i32> %a1, <2 x i32> %a2, <2 x i32> %a3, <2 x i32> %a4) {
746; CHECK-LABEL: @sel_icmp_two_cmp_vec_nonsplat(
747; CHECK-NEXT:    [[V1:%.*]] = call <2 x i8> @llvm.ucmp.v2i8.v2i32(<2 x i32> [[A1:%.*]], <2 x i32> [[A2:%.*]])
748; CHECK-NEXT:    [[V2:%.*]] = call <2 x i8> @llvm.scmp.v2i8.v2i32(<2 x i32> [[A3:%.*]], <2 x i32> [[A4:%.*]])
749; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[C:%.*]], <2 x i8> [[V1]], <2 x i8> [[V2]]
750; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <2 x i8> [[SEL]], <i8 1, i8 2>
751; CHECK-NEXT:    ret <2 x i1> [[CMP]]
752;
753  %v1 = call <2 x i8> @llvm.ucmp(<2 x i32> %a1, <2 x i32> %a2)
754  %v2 = call <2 x i8> @llvm.scmp(<2 x i32> %a3, <2 x i32> %a4)
755  %sel = select i1 %c, <2 x i8> %v1, <2 x i8> %v2
756  %cmp = icmp sle <2 x i8> %sel, <i8 0, i8 1>
757  ret <2 x i1> %cmp
758}
759
760define i1 @sel_icmp_cmp_and_simplify(i1 %c, i32 %a1, i32 %a2) {
761; CHECK-LABEL: @sel_icmp_cmp_and_simplify(
762; CHECK-NEXT:    [[CMP1:%.*]] = icmp ule i32 [[A1:%.*]], [[A2:%.*]]
763; CHECK-NEXT:    [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
764; CHECK-NEXT:    [[CMP:%.*]] = select i1 [[NOT_C]], i1 true, i1 [[CMP1]]
765; CHECK-NEXT:    ret i1 [[CMP]]
766;
767  %v = call i8 @llvm.ucmp(i32 %a1, i32 %a2)
768  %sel = select i1 %c, i8 %v, i8 0
769  %cmp = icmp sle i8 %sel, 0
770  ret i1 %cmp
771}
772
773define i1 @sel_icmp_cmp_and_no_simplify(i1 %c, i32 %a1, i32 %a2, i8 %b) {
774; CHECK-LABEL: @sel_icmp_cmp_and_no_simplify(
775; CHECK-NEXT:    [[CMP1:%.*]] = icmp ule i32 [[A1:%.*]], [[A2:%.*]]
776; CHECK-NEXT:    [[CMP2:%.*]] = icmp slt i8 [[B:%.*]], 1
777; CHECK-NEXT:    [[CMP:%.*]] = select i1 [[C:%.*]], i1 [[CMP1]], i1 [[CMP2]]
778; CHECK-NEXT:    ret i1 [[CMP]]
779;
780  %v = call i8 @llvm.ucmp(i32 %a1, i32 %a2)
781  %sel = select i1 %c, i8 %v, i8 %b
782  %cmp = icmp sle i8 %sel, 0
783  ret i1 %cmp
784}
785
786define i1 @sel_icmp_cmp_and_no_simplify_comm(i1 %c, i32 %a1, i32 %a2, i8 %b) {
787; CHECK-LABEL: @sel_icmp_cmp_and_no_simplify_comm(
788; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i8 [[B:%.*]], 1
789; CHECK-NEXT:    [[CMP2:%.*]] = icmp ule i32 [[A1:%.*]], [[A2:%.*]]
790; CHECK-NEXT:    [[CMP:%.*]] = select i1 [[C:%.*]], i1 [[CMP1]], i1 [[CMP2]]
791; CHECK-NEXT:    ret i1 [[CMP]]
792;
793  %v = call i8 @llvm.ucmp(i32 %a1, i32 %a2)
794  %sel = select i1 %c, i8 %b, i8 %v
795  %cmp = icmp sle i8 %sel, 0
796  ret i1 %cmp
797}
798
799define i1 @icmp_lt_slt(i1 %c, i32 %arg) {
800; CHECK-LABEL: @icmp_lt_slt(
801; CHECK-NEXT:    [[SELECT_V:%.*]] = select i1 [[C:%.*]], i32 131072, i32 0
802; CHECK-NEXT:    [[SELECT:%.*]] = icmp slt i32 [[ARG:%.*]], [[SELECT_V]]
803; CHECK-NEXT:    ret i1 [[SELECT]]
804;
805  %cmp1 = icmp samesign ult i32 %arg, 131072
806  %cmp2 = icmp slt i32 %arg, 0
807  %select = select i1 %c, i1 %cmp1, i1 %cmp2
808  ret i1 %select
809}
810
811declare void @use(i1)
812declare void @use.i8(i8)
813