1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt -passes=instcombine -S < %s | FileCheck %s 3 4define i32 @widget(i32 %arg, i32 %arg1) { 5; CHECK-LABEL: define i32 @widget( 6; CHECK-SAME: i32 [[ARG:%.*]], i32 [[ARG1:%.*]]) { 7; CHECK-NEXT: bb: 8; CHECK-NEXT: [[ICMP:%.*]] = icmp ne i32 [[ARG]], 0 9; CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[ICMP]] to i32 10; CHECK-NEXT: [[MUL:%.*]] = shl nuw nsw i32 20, [[TMP0]] 11; CHECK-NEXT: [[XOR:%.*]] = zext i1 [[ICMP]] to i32 12; CHECK-NEXT: [[ADD9:%.*]] = or disjoint i32 [[MUL]], [[XOR]] 13; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[ICMP]] to i32 14; CHECK-NEXT: [[MUL2:%.*]] = shl nuw nsw i32 [[ADD9]], [[TMP1]] 15; CHECK-NEXT: ret i32 [[MUL2]] 16; 17bb: 18 %icmp = icmp eq i32 %arg, 0 19 %zext = zext i1 %icmp to i32 20 %sub = sub i32 2, %zext 21 %mul = mul i32 20, %sub 22 %zext8 = zext i1 %icmp to i32 23 %xor = xor i32 %zext8, 1 24 %add9 = add i32 %mul, %xor 25 %mul2 = mul i32 %add9, %sub 26 ret i32 %mul2 27} 28