xref: /llvm-project/llvm/test/Transforms/InstCombine/icmp-shr-lt-gt.ll (revision 38fffa630ee80163dc65e759392ad29798905679)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=instcombine -S | FileCheck %s
3
4define i1 @lshrugt_01_00(i4 %x) {
5; CHECK-LABEL: @lshrugt_01_00(
6; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], 1
7; CHECK-NEXT:    ret i1 [[C]]
8;
9  %s = lshr i4 %x, 1
10  %c = icmp ugt i4 %s, 0
11  ret i1 %c
12}
13
14define i1 @lshrugt_01_01(i4 %x) {
15; CHECK-LABEL: @lshrugt_01_01(
16; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], 3
17; CHECK-NEXT:    ret i1 [[C]]
18;
19  %s = lshr i4 %x, 1
20  %c = icmp ugt i4 %s, 1
21  ret i1 %c
22}
23
24define i1 @lshrugt_01_02(i4 %x) {
25; CHECK-LABEL: @lshrugt_01_02(
26; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], 5
27; CHECK-NEXT:    ret i1 [[C]]
28;
29  %s = lshr i4 %x, 1
30  %c = icmp ugt i4 %s, 2
31  ret i1 %c
32}
33
34define i1 @lshrugt_01_03(i4 %x) {
35; CHECK-LABEL: @lshrugt_01_03(
36; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 0
37; CHECK-NEXT:    ret i1 [[C]]
38;
39  %s = lshr i4 %x, 1
40  %c = icmp ugt i4 %s, 3
41  ret i1 %c
42}
43
44define i1 @lshrugt_01_04(i4 %x) {
45; CHECK-LABEL: @lshrugt_01_04(
46; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], -7
47; CHECK-NEXT:    ret i1 [[C]]
48;
49  %s = lshr i4 %x, 1
50  %c = icmp ugt i4 %s, 4
51  ret i1 %c
52}
53
54define i1 @lshrugt_01_05(i4 %x) {
55; CHECK-LABEL: @lshrugt_01_05(
56; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], -5
57; CHECK-NEXT:    ret i1 [[C]]
58;
59  %s = lshr i4 %x, 1
60  %c = icmp ugt i4 %s, 5
61  ret i1 %c
62}
63
64define i1 @lshrugt_01_06(i4 %x) {
65; CHECK-LABEL: @lshrugt_01_06(
66; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], -3
67; CHECK-NEXT:    ret i1 [[C]]
68;
69  %s = lshr i4 %x, 1
70  %c = icmp ugt i4 %s, 6
71  ret i1 %c
72}
73
74define i1 @lshrugt_01_07(i4 %x) {
75; CHECK-LABEL: @lshrugt_01_07(
76; CHECK-NEXT:    ret i1 false
77;
78  %s = lshr i4 %x, 1
79  %c = icmp ugt i4 %s, 7
80  ret i1 %c
81}
82
83define i1 @lshrugt_01_08(i4 %x) {
84; CHECK-LABEL: @lshrugt_01_08(
85; CHECK-NEXT:    ret i1 false
86;
87  %s = lshr i4 %x, 1
88  %c = icmp ugt i4 %s, 8
89  ret i1 %c
90}
91
92define i1 @lshrugt_01_09(i4 %x) {
93; CHECK-LABEL: @lshrugt_01_09(
94; CHECK-NEXT:    ret i1 false
95;
96  %s = lshr i4 %x, 1
97  %c = icmp ugt i4 %s, 9
98  ret i1 %c
99}
100
101define i1 @lshrugt_01_10(i4 %x) {
102; CHECK-LABEL: @lshrugt_01_10(
103; CHECK-NEXT:    ret i1 false
104;
105  %s = lshr i4 %x, 1
106  %c = icmp ugt i4 %s, 10
107  ret i1 %c
108}
109
110define i1 @lshrugt_01_11(i4 %x) {
111; CHECK-LABEL: @lshrugt_01_11(
112; CHECK-NEXT:    ret i1 false
113;
114  %s = lshr i4 %x, 1
115  %c = icmp ugt i4 %s, 11
116  ret i1 %c
117}
118
119define i1 @lshrugt_01_12(i4 %x) {
120; CHECK-LABEL: @lshrugt_01_12(
121; CHECK-NEXT:    ret i1 false
122;
123  %s = lshr i4 %x, 1
124  %c = icmp ugt i4 %s, 12
125  ret i1 %c
126}
127
128define i1 @lshrugt_01_13(i4 %x) {
129; CHECK-LABEL: @lshrugt_01_13(
130; CHECK-NEXT:    ret i1 false
131;
132  %s = lshr i4 %x, 1
133  %c = icmp ugt i4 %s, 13
134  ret i1 %c
135}
136
137define i1 @lshrugt_01_14(i4 %x) {
138; CHECK-LABEL: @lshrugt_01_14(
139; CHECK-NEXT:    ret i1 false
140;
141  %s = lshr i4 %x, 1
142  %c = icmp ugt i4 %s, 14
143  ret i1 %c
144}
145
146define i1 @lshrugt_01_15(i4 %x) {
147; CHECK-LABEL: @lshrugt_01_15(
148; CHECK-NEXT:    ret i1 false
149;
150  %s = lshr i4 %x, 1
151  %c = icmp ugt i4 %s, 15
152  ret i1 %c
153}
154
155define i1 @lshrugt_02_00(i4 %x) {
156; CHECK-LABEL: @lshrugt_02_00(
157; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], 3
158; CHECK-NEXT:    ret i1 [[C]]
159;
160  %s = lshr i4 %x, 2
161  %c = icmp ugt i4 %s, 0
162  ret i1 %c
163}
164
165define i1 @lshrugt_02_01(i4 %x) {
166; CHECK-LABEL: @lshrugt_02_01(
167; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 0
168; CHECK-NEXT:    ret i1 [[C]]
169;
170  %s = lshr i4 %x, 2
171  %c = icmp ugt i4 %s, 1
172  ret i1 %c
173}
174
175define i1 @lshrugt_02_02(i4 %x) {
176; CHECK-LABEL: @lshrugt_02_02(
177; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], -5
178; CHECK-NEXT:    ret i1 [[C]]
179;
180  %s = lshr i4 %x, 2
181  %c = icmp ugt i4 %s, 2
182  ret i1 %c
183}
184
185define i1 @lshrugt_02_03(i4 %x) {
186; CHECK-LABEL: @lshrugt_02_03(
187; CHECK-NEXT:    ret i1 false
188;
189  %s = lshr i4 %x, 2
190  %c = icmp ugt i4 %s, 3
191  ret i1 %c
192}
193
194define i1 @lshrugt_02_04(i4 %x) {
195; CHECK-LABEL: @lshrugt_02_04(
196; CHECK-NEXT:    ret i1 false
197;
198  %s = lshr i4 %x, 2
199  %c = icmp ugt i4 %s, 4
200  ret i1 %c
201}
202
203define i1 @lshrugt_02_05(i4 %x) {
204; CHECK-LABEL: @lshrugt_02_05(
205; CHECK-NEXT:    ret i1 false
206;
207  %s = lshr i4 %x, 2
208  %c = icmp ugt i4 %s, 5
209  ret i1 %c
210}
211
212define i1 @lshrugt_02_06(i4 %x) {
213; CHECK-LABEL: @lshrugt_02_06(
214; CHECK-NEXT:    ret i1 false
215;
216  %s = lshr i4 %x, 2
217  %c = icmp ugt i4 %s, 6
218  ret i1 %c
219}
220
221define i1 @lshrugt_02_07(i4 %x) {
222; CHECK-LABEL: @lshrugt_02_07(
223; CHECK-NEXT:    ret i1 false
224;
225  %s = lshr i4 %x, 2
226  %c = icmp ugt i4 %s, 7
227  ret i1 %c
228}
229
230define i1 @lshrugt_02_08(i4 %x) {
231; CHECK-LABEL: @lshrugt_02_08(
232; CHECK-NEXT:    ret i1 false
233;
234  %s = lshr i4 %x, 2
235  %c = icmp ugt i4 %s, 8
236  ret i1 %c
237}
238
239define i1 @lshrugt_02_09(i4 %x) {
240; CHECK-LABEL: @lshrugt_02_09(
241; CHECK-NEXT:    ret i1 false
242;
243  %s = lshr i4 %x, 2
244  %c = icmp ugt i4 %s, 9
245  ret i1 %c
246}
247
248define i1 @lshrugt_02_10(i4 %x) {
249; CHECK-LABEL: @lshrugt_02_10(
250; CHECK-NEXT:    ret i1 false
251;
252  %s = lshr i4 %x, 2
253  %c = icmp ugt i4 %s, 10
254  ret i1 %c
255}
256
257define i1 @lshrugt_02_11(i4 %x) {
258; CHECK-LABEL: @lshrugt_02_11(
259; CHECK-NEXT:    ret i1 false
260;
261  %s = lshr i4 %x, 2
262  %c = icmp ugt i4 %s, 11
263  ret i1 %c
264}
265
266define i1 @lshrugt_02_12(i4 %x) {
267; CHECK-LABEL: @lshrugt_02_12(
268; CHECK-NEXT:    ret i1 false
269;
270  %s = lshr i4 %x, 2
271  %c = icmp ugt i4 %s, 12
272  ret i1 %c
273}
274
275define i1 @lshrugt_02_13(i4 %x) {
276; CHECK-LABEL: @lshrugt_02_13(
277; CHECK-NEXT:    ret i1 false
278;
279  %s = lshr i4 %x, 2
280  %c = icmp ugt i4 %s, 13
281  ret i1 %c
282}
283
284define i1 @lshrugt_02_14(i4 %x) {
285; CHECK-LABEL: @lshrugt_02_14(
286; CHECK-NEXT:    ret i1 false
287;
288  %s = lshr i4 %x, 2
289  %c = icmp ugt i4 %s, 14
290  ret i1 %c
291}
292
293define i1 @lshrugt_02_15(i4 %x) {
294; CHECK-LABEL: @lshrugt_02_15(
295; CHECK-NEXT:    ret i1 false
296;
297  %s = lshr i4 %x, 2
298  %c = icmp ugt i4 %s, 15
299  ret i1 %c
300}
301
302define i1 @lshrugt_03_00(i4 %x) {
303; CHECK-LABEL: @lshrugt_03_00(
304; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 0
305; CHECK-NEXT:    ret i1 [[C]]
306;
307  %s = lshr i4 %x, 3
308  %c = icmp ugt i4 %s, 0
309  ret i1 %c
310}
311
312define i1 @lshrugt_03_01(i4 %x) {
313; CHECK-LABEL: @lshrugt_03_01(
314; CHECK-NEXT:    ret i1 false
315;
316  %s = lshr i4 %x, 3
317  %c = icmp ugt i4 %s, 1
318  ret i1 %c
319}
320
321define i1 @lshrugt_03_02(i4 %x) {
322; CHECK-LABEL: @lshrugt_03_02(
323; CHECK-NEXT:    ret i1 false
324;
325  %s = lshr i4 %x, 3
326  %c = icmp ugt i4 %s, 2
327  ret i1 %c
328}
329
330define i1 @lshrugt_03_03(i4 %x) {
331; CHECK-LABEL: @lshrugt_03_03(
332; CHECK-NEXT:    ret i1 false
333;
334  %s = lshr i4 %x, 3
335  %c = icmp ugt i4 %s, 3
336  ret i1 %c
337}
338
339define i1 @lshrugt_03_04(i4 %x) {
340; CHECK-LABEL: @lshrugt_03_04(
341; CHECK-NEXT:    ret i1 false
342;
343  %s = lshr i4 %x, 3
344  %c = icmp ugt i4 %s, 4
345  ret i1 %c
346}
347
348define i1 @lshrugt_03_05(i4 %x) {
349; CHECK-LABEL: @lshrugt_03_05(
350; CHECK-NEXT:    ret i1 false
351;
352  %s = lshr i4 %x, 3
353  %c = icmp ugt i4 %s, 5
354  ret i1 %c
355}
356
357define i1 @lshrugt_03_06(i4 %x) {
358; CHECK-LABEL: @lshrugt_03_06(
359; CHECK-NEXT:    ret i1 false
360;
361  %s = lshr i4 %x, 3
362  %c = icmp ugt i4 %s, 6
363  ret i1 %c
364}
365
366define i1 @lshrugt_03_07(i4 %x) {
367; CHECK-LABEL: @lshrugt_03_07(
368; CHECK-NEXT:    ret i1 false
369;
370  %s = lshr i4 %x, 3
371  %c = icmp ugt i4 %s, 7
372  ret i1 %c
373}
374
375define i1 @lshrugt_03_08(i4 %x) {
376; CHECK-LABEL: @lshrugt_03_08(
377; CHECK-NEXT:    ret i1 false
378;
379  %s = lshr i4 %x, 3
380  %c = icmp ugt i4 %s, 8
381  ret i1 %c
382}
383
384define i1 @lshrugt_03_09(i4 %x) {
385; CHECK-LABEL: @lshrugt_03_09(
386; CHECK-NEXT:    ret i1 false
387;
388  %s = lshr i4 %x, 3
389  %c = icmp ugt i4 %s, 9
390  ret i1 %c
391}
392
393define i1 @lshrugt_03_10(i4 %x) {
394; CHECK-LABEL: @lshrugt_03_10(
395; CHECK-NEXT:    ret i1 false
396;
397  %s = lshr i4 %x, 3
398  %c = icmp ugt i4 %s, 10
399  ret i1 %c
400}
401
402define i1 @lshrugt_03_11(i4 %x) {
403; CHECK-LABEL: @lshrugt_03_11(
404; CHECK-NEXT:    ret i1 false
405;
406  %s = lshr i4 %x, 3
407  %c = icmp ugt i4 %s, 11
408  ret i1 %c
409}
410
411define i1 @lshrugt_03_12(i4 %x) {
412; CHECK-LABEL: @lshrugt_03_12(
413; CHECK-NEXT:    ret i1 false
414;
415  %s = lshr i4 %x, 3
416  %c = icmp ugt i4 %s, 12
417  ret i1 %c
418}
419
420define i1 @lshrugt_03_13(i4 %x) {
421; CHECK-LABEL: @lshrugt_03_13(
422; CHECK-NEXT:    ret i1 false
423;
424  %s = lshr i4 %x, 3
425  %c = icmp ugt i4 %s, 13
426  ret i1 %c
427}
428
429define i1 @lshrugt_03_14(i4 %x) {
430; CHECK-LABEL: @lshrugt_03_14(
431; CHECK-NEXT:    ret i1 false
432;
433  %s = lshr i4 %x, 3
434  %c = icmp ugt i4 %s, 14
435  ret i1 %c
436}
437
438define i1 @lshrugt_03_15(i4 %x) {
439; CHECK-LABEL: @lshrugt_03_15(
440; CHECK-NEXT:    ret i1 false
441;
442  %s = lshr i4 %x, 3
443  %c = icmp ugt i4 %s, 15
444  ret i1 %c
445}
446
447define i1 @lshrult_01_00(i4 %x) {
448; CHECK-LABEL: @lshrult_01_00(
449; CHECK-NEXT:    ret i1 false
450;
451  %s = lshr i4 %x, 1
452  %c = icmp ult i4 %s, 0
453  ret i1 %c
454}
455
456define i1 @lshrult_01_01(i4 %x) {
457; CHECK-LABEL: @lshrult_01_01(
458; CHECK-NEXT:    [[C:%.*]] = icmp ult i4 [[X:%.*]], 2
459; CHECK-NEXT:    ret i1 [[C]]
460;
461  %s = lshr i4 %x, 1
462  %c = icmp ult i4 %s, 1
463  ret i1 %c
464}
465
466define i1 @lshrult_01_02(i4 %x) {
467; CHECK-LABEL: @lshrult_01_02(
468; CHECK-NEXT:    [[C:%.*]] = icmp ult i4 [[X:%.*]], 4
469; CHECK-NEXT:    ret i1 [[C]]
470;
471  %s = lshr i4 %x, 1
472  %c = icmp ult i4 %s, 2
473  ret i1 %c
474}
475
476define i1 @lshrult_01_03(i4 %x) {
477; CHECK-LABEL: @lshrult_01_03(
478; CHECK-NEXT:    [[C:%.*]] = icmp ult i4 [[X:%.*]], 6
479; CHECK-NEXT:    ret i1 [[C]]
480;
481  %s = lshr i4 %x, 1
482  %c = icmp ult i4 %s, 3
483  ret i1 %c
484}
485
486define i1 @lshrult_01_04(i4 %x) {
487; CHECK-LABEL: @lshrult_01_04(
488; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -1
489; CHECK-NEXT:    ret i1 [[C]]
490;
491  %s = lshr i4 %x, 1
492  %c = icmp ult i4 %s, 4
493  ret i1 %c
494}
495
496define i1 @lshrult_01_05(i4 %x) {
497; CHECK-LABEL: @lshrult_01_05(
498; CHECK-NEXT:    [[C:%.*]] = icmp ult i4 [[X:%.*]], -6
499; CHECK-NEXT:    ret i1 [[C]]
500;
501  %s = lshr i4 %x, 1
502  %c = icmp ult i4 %s, 5
503  ret i1 %c
504}
505
506define i1 @lshrult_01_06(i4 %x) {
507; CHECK-LABEL: @lshrult_01_06(
508; CHECK-NEXT:    [[C:%.*]] = icmp ult i4 [[X:%.*]], -4
509; CHECK-NEXT:    ret i1 [[C]]
510;
511  %s = lshr i4 %x, 1
512  %c = icmp ult i4 %s, 6
513  ret i1 %c
514}
515
516define i1 @lshrult_01_07(i4 %x) {
517; CHECK-LABEL: @lshrult_01_07(
518; CHECK-NEXT:    [[C:%.*]] = icmp ult i4 [[X:%.*]], -2
519; CHECK-NEXT:    ret i1 [[C]]
520;
521  %s = lshr i4 %x, 1
522  %c = icmp ult i4 %s, 7
523  ret i1 %c
524}
525
526define i1 @lshrult_01_08(i4 %x) {
527; CHECK-LABEL: @lshrult_01_08(
528; CHECK-NEXT:    ret i1 true
529;
530  %s = lshr i4 %x, 1
531  %c = icmp ult i4 %s, 8
532  ret i1 %c
533}
534
535define i1 @lshrult_01_09(i4 %x) {
536; CHECK-LABEL: @lshrult_01_09(
537; CHECK-NEXT:    ret i1 true
538;
539  %s = lshr i4 %x, 1
540  %c = icmp ult i4 %s, 9
541  ret i1 %c
542}
543
544define i1 @lshrult_01_10(i4 %x) {
545; CHECK-LABEL: @lshrult_01_10(
546; CHECK-NEXT:    ret i1 true
547;
548  %s = lshr i4 %x, 1
549  %c = icmp ult i4 %s, 10
550  ret i1 %c
551}
552
553define i1 @lshrult_01_11(i4 %x) {
554; CHECK-LABEL: @lshrult_01_11(
555; CHECK-NEXT:    ret i1 true
556;
557  %s = lshr i4 %x, 1
558  %c = icmp ult i4 %s, 11
559  ret i1 %c
560}
561
562define i1 @lshrult_01_12(i4 %x) {
563; CHECK-LABEL: @lshrult_01_12(
564; CHECK-NEXT:    ret i1 true
565;
566  %s = lshr i4 %x, 1
567  %c = icmp ult i4 %s, 12
568  ret i1 %c
569}
570
571define i1 @lshrult_01_13(i4 %x) {
572; CHECK-LABEL: @lshrult_01_13(
573; CHECK-NEXT:    ret i1 true
574;
575  %s = lshr i4 %x, 1
576  %c = icmp ult i4 %s, 13
577  ret i1 %c
578}
579
580define i1 @lshrult_01_14(i4 %x) {
581; CHECK-LABEL: @lshrult_01_14(
582; CHECK-NEXT:    ret i1 true
583;
584  %s = lshr i4 %x, 1
585  %c = icmp ult i4 %s, 14
586  ret i1 %c
587}
588
589define i1 @lshrult_01_15(i4 %x) {
590; CHECK-LABEL: @lshrult_01_15(
591; CHECK-NEXT:    ret i1 true
592;
593  %s = lshr i4 %x, 1
594  %c = icmp ult i4 %s, 15
595  ret i1 %c
596}
597
598define i1 @lshrult_02_00(i4 %x) {
599; CHECK-LABEL: @lshrult_02_00(
600; CHECK-NEXT:    ret i1 false
601;
602  %s = lshr i4 %x, 2
603  %c = icmp ult i4 %s, 0
604  ret i1 %c
605}
606
607define i1 @lshrult_02_01(i4 %x) {
608; CHECK-LABEL: @lshrult_02_01(
609; CHECK-NEXT:    [[C:%.*]] = icmp ult i4 [[X:%.*]], 4
610; CHECK-NEXT:    ret i1 [[C]]
611;
612  %s = lshr i4 %x, 2
613  %c = icmp ult i4 %s, 1
614  ret i1 %c
615}
616
617define i1 @lshrult_02_02(i4 %x) {
618; CHECK-LABEL: @lshrult_02_02(
619; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -1
620; CHECK-NEXT:    ret i1 [[C]]
621;
622  %s = lshr i4 %x, 2
623  %c = icmp ult i4 %s, 2
624  ret i1 %c
625}
626
627define i1 @lshrult_02_03(i4 %x) {
628; CHECK-LABEL: @lshrult_02_03(
629; CHECK-NEXT:    [[C:%.*]] = icmp ult i4 [[X:%.*]], -4
630; CHECK-NEXT:    ret i1 [[C]]
631;
632  %s = lshr i4 %x, 2
633  %c = icmp ult i4 %s, 3
634  ret i1 %c
635}
636
637define i1 @lshrult_02_04(i4 %x) {
638; CHECK-LABEL: @lshrult_02_04(
639; CHECK-NEXT:    ret i1 true
640;
641  %s = lshr i4 %x, 2
642  %c = icmp ult i4 %s, 4
643  ret i1 %c
644}
645
646define i1 @lshrult_02_05(i4 %x) {
647; CHECK-LABEL: @lshrult_02_05(
648; CHECK-NEXT:    ret i1 true
649;
650  %s = lshr i4 %x, 2
651  %c = icmp ult i4 %s, 5
652  ret i1 %c
653}
654
655define i1 @lshrult_02_06(i4 %x) {
656; CHECK-LABEL: @lshrult_02_06(
657; CHECK-NEXT:    ret i1 true
658;
659  %s = lshr i4 %x, 2
660  %c = icmp ult i4 %s, 6
661  ret i1 %c
662}
663
664define i1 @lshrult_02_07(i4 %x) {
665; CHECK-LABEL: @lshrult_02_07(
666; CHECK-NEXT:    ret i1 true
667;
668  %s = lshr i4 %x, 2
669  %c = icmp ult i4 %s, 7
670  ret i1 %c
671}
672
673define i1 @lshrult_02_08(i4 %x) {
674; CHECK-LABEL: @lshrult_02_08(
675; CHECK-NEXT:    ret i1 true
676;
677  %s = lshr i4 %x, 2
678  %c = icmp ult i4 %s, 8
679  ret i1 %c
680}
681
682define i1 @lshrult_02_09(i4 %x) {
683; CHECK-LABEL: @lshrult_02_09(
684; CHECK-NEXT:    ret i1 true
685;
686  %s = lshr i4 %x, 2
687  %c = icmp ult i4 %s, 9
688  ret i1 %c
689}
690
691define i1 @lshrult_02_10(i4 %x) {
692; CHECK-LABEL: @lshrult_02_10(
693; CHECK-NEXT:    ret i1 true
694;
695  %s = lshr i4 %x, 2
696  %c = icmp ult i4 %s, 10
697  ret i1 %c
698}
699
700define i1 @lshrult_02_11(i4 %x) {
701; CHECK-LABEL: @lshrult_02_11(
702; CHECK-NEXT:    ret i1 true
703;
704  %s = lshr i4 %x, 2
705  %c = icmp ult i4 %s, 11
706  ret i1 %c
707}
708
709define i1 @lshrult_02_12(i4 %x) {
710; CHECK-LABEL: @lshrult_02_12(
711; CHECK-NEXT:    ret i1 true
712;
713  %s = lshr i4 %x, 2
714  %c = icmp ult i4 %s, 12
715  ret i1 %c
716}
717
718define i1 @lshrult_02_13(i4 %x) {
719; CHECK-LABEL: @lshrult_02_13(
720; CHECK-NEXT:    ret i1 true
721;
722  %s = lshr i4 %x, 2
723  %c = icmp ult i4 %s, 13
724  ret i1 %c
725}
726
727define i1 @lshrult_02_14(i4 %x) {
728; CHECK-LABEL: @lshrult_02_14(
729; CHECK-NEXT:    ret i1 true
730;
731  %s = lshr i4 %x, 2
732  %c = icmp ult i4 %s, 14
733  ret i1 %c
734}
735
736define i1 @lshrult_02_15(i4 %x) {
737; CHECK-LABEL: @lshrult_02_15(
738; CHECK-NEXT:    ret i1 true
739;
740  %s = lshr i4 %x, 2
741  %c = icmp ult i4 %s, 15
742  ret i1 %c
743}
744
745define i1 @lshrult_03_00(i4 %x) {
746; CHECK-LABEL: @lshrult_03_00(
747; CHECK-NEXT:    ret i1 false
748;
749  %s = lshr i4 %x, 3
750  %c = icmp ult i4 %s, 0
751  ret i1 %c
752}
753
754define i1 @lshrult_03_01(i4 %x) {
755; CHECK-LABEL: @lshrult_03_01(
756; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -1
757; CHECK-NEXT:    ret i1 [[C]]
758;
759  %s = lshr i4 %x, 3
760  %c = icmp ult i4 %s, 1
761  ret i1 %c
762}
763
764define i1 @lshrult_03_02(i4 %x) {
765; CHECK-LABEL: @lshrult_03_02(
766; CHECK-NEXT:    ret i1 true
767;
768  %s = lshr i4 %x, 3
769  %c = icmp ult i4 %s, 2
770  ret i1 %c
771}
772
773define i1 @lshrult_03_03(i4 %x) {
774; CHECK-LABEL: @lshrult_03_03(
775; CHECK-NEXT:    ret i1 true
776;
777  %s = lshr i4 %x, 3
778  %c = icmp ult i4 %s, 3
779  ret i1 %c
780}
781
782define i1 @lshrult_03_04(i4 %x) {
783; CHECK-LABEL: @lshrult_03_04(
784; CHECK-NEXT:    ret i1 true
785;
786  %s = lshr i4 %x, 3
787  %c = icmp ult i4 %s, 4
788  ret i1 %c
789}
790
791define i1 @lshrult_03_05(i4 %x) {
792; CHECK-LABEL: @lshrult_03_05(
793; CHECK-NEXT:    ret i1 true
794;
795  %s = lshr i4 %x, 3
796  %c = icmp ult i4 %s, 5
797  ret i1 %c
798}
799
800define i1 @lshrult_03_06(i4 %x) {
801; CHECK-LABEL: @lshrult_03_06(
802; CHECK-NEXT:    ret i1 true
803;
804  %s = lshr i4 %x, 3
805  %c = icmp ult i4 %s, 6
806  ret i1 %c
807}
808
809define i1 @lshrult_03_07(i4 %x) {
810; CHECK-LABEL: @lshrult_03_07(
811; CHECK-NEXT:    ret i1 true
812;
813  %s = lshr i4 %x, 3
814  %c = icmp ult i4 %s, 7
815  ret i1 %c
816}
817
818define i1 @lshrult_03_08(i4 %x) {
819; CHECK-LABEL: @lshrult_03_08(
820; CHECK-NEXT:    ret i1 true
821;
822  %s = lshr i4 %x, 3
823  %c = icmp ult i4 %s, 8
824  ret i1 %c
825}
826
827define i1 @lshrult_03_09(i4 %x) {
828; CHECK-LABEL: @lshrult_03_09(
829; CHECK-NEXT:    ret i1 true
830;
831  %s = lshr i4 %x, 3
832  %c = icmp ult i4 %s, 9
833  ret i1 %c
834}
835
836define i1 @lshrult_03_10(i4 %x) {
837; CHECK-LABEL: @lshrult_03_10(
838; CHECK-NEXT:    ret i1 true
839;
840  %s = lshr i4 %x, 3
841  %c = icmp ult i4 %s, 10
842  ret i1 %c
843}
844
845define i1 @lshrult_03_11(i4 %x) {
846; CHECK-LABEL: @lshrult_03_11(
847; CHECK-NEXT:    ret i1 true
848;
849  %s = lshr i4 %x, 3
850  %c = icmp ult i4 %s, 11
851  ret i1 %c
852}
853
854define i1 @lshrult_03_12(i4 %x) {
855; CHECK-LABEL: @lshrult_03_12(
856; CHECK-NEXT:    ret i1 true
857;
858  %s = lshr i4 %x, 3
859  %c = icmp ult i4 %s, 12
860  ret i1 %c
861}
862
863define i1 @lshrult_03_13(i4 %x) {
864; CHECK-LABEL: @lshrult_03_13(
865; CHECK-NEXT:    ret i1 true
866;
867  %s = lshr i4 %x, 3
868  %c = icmp ult i4 %s, 13
869  ret i1 %c
870}
871
872define i1 @lshrult_03_14(i4 %x) {
873; CHECK-LABEL: @lshrult_03_14(
874; CHECK-NEXT:    ret i1 true
875;
876  %s = lshr i4 %x, 3
877  %c = icmp ult i4 %s, 14
878  ret i1 %c
879}
880
881define i1 @lshrult_03_15(i4 %x) {
882; CHECK-LABEL: @lshrult_03_15(
883; CHECK-NEXT:    ret i1 true
884;
885  %s = lshr i4 %x, 3
886  %c = icmp ult i4 %s, 15
887  ret i1 %c
888}
889
890define i1 @ashrsgt_01_00(i4 %x) {
891; CHECK-LABEL: @ashrsgt_01_00(
892; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], 1
893; CHECK-NEXT:    ret i1 [[C]]
894;
895  %s = ashr i4 %x, 1
896  %c = icmp sgt i4 %s, 0
897  ret i1 %c
898}
899
900define i1 @ashrsgt_01_00_multiuse(i4 %x, ptr %p) {
901; CHECK-LABEL: @ashrsgt_01_00_multiuse(
902; CHECK-NEXT:    [[S:%.*]] = ashr i4 [[X:%.*]], 1
903; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[S]], 0
904; CHECK-NEXT:    store i4 [[S]], ptr [[P:%.*]], align 1
905; CHECK-NEXT:    ret i1 [[C]]
906;
907  %s = ashr i4 %x, 1
908  %c = icmp sgt i4 %s, 0
909  store i4 %s, ptr %p
910  ret i1 %c
911}
912
913define i1 @ashrsgt_01_01(i4 %x) {
914; CHECK-LABEL: @ashrsgt_01_01(
915; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], 3
916; CHECK-NEXT:    ret i1 [[C]]
917;
918  %s = ashr i4 %x, 1
919  %c = icmp sgt i4 %s, 1
920  ret i1 %c
921}
922
923define i1 @ashrsgt_01_02(i4 %x) {
924; CHECK-LABEL: @ashrsgt_01_02(
925; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], 5
926; CHECK-NEXT:    ret i1 [[C]]
927;
928  %s = ashr i4 %x, 1
929  %c = icmp sgt i4 %s, 2
930  ret i1 %c
931}
932
933define i1 @ashrsgt_01_03(i4 %x) {
934; CHECK-LABEL: @ashrsgt_01_03(
935; CHECK-NEXT:    ret i1 false
936;
937  %s = ashr i4 %x, 1
938  %c = icmp sgt i4 %s, 3
939  ret i1 %c
940}
941
942define i1 @ashrsgt_01_04(i4 %x) {
943; CHECK-LABEL: @ashrsgt_01_04(
944; CHECK-NEXT:    ret i1 false
945;
946  %s = ashr i4 %x, 1
947  %c = icmp sgt i4 %s, 4
948  ret i1 %c
949}
950
951define i1 @ashrsgt_01_05(i4 %x) {
952; CHECK-LABEL: @ashrsgt_01_05(
953; CHECK-NEXT:    ret i1 false
954;
955  %s = ashr i4 %x, 1
956  %c = icmp sgt i4 %s, 5
957  ret i1 %c
958}
959
960define i1 @ashrsgt_01_06(i4 %x) {
961; CHECK-LABEL: @ashrsgt_01_06(
962; CHECK-NEXT:    ret i1 false
963;
964  %s = ashr i4 %x, 1
965  %c = icmp sgt i4 %s, 6
966  ret i1 %c
967}
968
969define i1 @ashrsgt_01_07(i4 %x) {
970; CHECK-LABEL: @ashrsgt_01_07(
971; CHECK-NEXT:    ret i1 false
972;
973  %s = ashr i4 %x, 1
974  %c = icmp sgt i4 %s, 7
975  ret i1 %c
976}
977
978define i1 @ashrsgt_01_08(i4 %x) {
979; CHECK-LABEL: @ashrsgt_01_08(
980; CHECK-NEXT:    ret i1 true
981;
982  %s = ashr i4 %x, 1
983  %c = icmp sgt i4 %s, 8
984  ret i1 %c
985}
986
987define i1 @ashrsgt_01_09(i4 %x) {
988; CHECK-LABEL: @ashrsgt_01_09(
989; CHECK-NEXT:    ret i1 true
990;
991  %s = ashr i4 %x, 1
992  %c = icmp sgt i4 %s, 9
993  ret i1 %c
994}
995
996define i1 @ashrsgt_01_10(i4 %x) {
997; CHECK-LABEL: @ashrsgt_01_10(
998; CHECK-NEXT:    ret i1 true
999;
1000  %s = ashr i4 %x, 1
1001  %c = icmp sgt i4 %s, 10
1002  ret i1 %c
1003}
1004
1005define i1 @ashrsgt_01_11(i4 %x) {
1006; CHECK-LABEL: @ashrsgt_01_11(
1007; CHECK-NEXT:    ret i1 true
1008;
1009  %s = ashr i4 %x, 1
1010  %c = icmp sgt i4 %s, 11
1011  ret i1 %c
1012}
1013
1014define i1 @ashrsgt_01_12(i4 %x) {
1015; CHECK-LABEL: @ashrsgt_01_12(
1016; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -7
1017; CHECK-NEXT:    ret i1 [[C]]
1018;
1019  %s = ashr i4 %x, 1
1020  %c = icmp sgt i4 %s, 12
1021  ret i1 %c
1022}
1023
1024define i1 @ashrsgt_01_13(i4 %x) {
1025; CHECK-LABEL: @ashrsgt_01_13(
1026; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -5
1027; CHECK-NEXT:    ret i1 [[C]]
1028;
1029  %s = ashr i4 %x, 1
1030  %c = icmp sgt i4 %s, 13
1031  ret i1 %c
1032}
1033
1034define i1 @ashrsgt_01_14(i4 %x) {
1035; CHECK-LABEL: @ashrsgt_01_14(
1036; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -3
1037; CHECK-NEXT:    ret i1 [[C]]
1038;
1039  %s = ashr i4 %x, 1
1040  %c = icmp sgt i4 %s, 14
1041  ret i1 %c
1042}
1043
1044define i1 @ashrsgt_01_15(i4 %x) {
1045; CHECK-LABEL: @ashrsgt_01_15(
1046; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -1
1047; CHECK-NEXT:    ret i1 [[C]]
1048;
1049  %s = ashr i4 %x, 1
1050  %c = icmp sgt i4 %s, 15
1051  ret i1 %c
1052}
1053
1054define i1 @ashrsgt_02_00(i4 %x) {
1055; CHECK-LABEL: @ashrsgt_02_00(
1056; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], 3
1057; CHECK-NEXT:    ret i1 [[C]]
1058;
1059  %s = ashr i4 %x, 2
1060  %c = icmp sgt i4 %s, 0
1061  ret i1 %c
1062}
1063
1064define i1 @ashrsgt_02_01(i4 %x) {
1065; CHECK-LABEL: @ashrsgt_02_01(
1066; CHECK-NEXT:    ret i1 false
1067;
1068  %s = ashr i4 %x, 2
1069  %c = icmp sgt i4 %s, 1
1070  ret i1 %c
1071}
1072
1073define i1 @ashrsgt_02_02(i4 %x) {
1074; CHECK-LABEL: @ashrsgt_02_02(
1075; CHECK-NEXT:    ret i1 false
1076;
1077  %s = ashr i4 %x, 2
1078  %c = icmp sgt i4 %s, 2
1079  ret i1 %c
1080}
1081
1082define i1 @ashrsgt_02_03(i4 %x) {
1083; CHECK-LABEL: @ashrsgt_02_03(
1084; CHECK-NEXT:    ret i1 false
1085;
1086  %s = ashr i4 %x, 2
1087  %c = icmp sgt i4 %s, 3
1088  ret i1 %c
1089}
1090
1091define i1 @ashrsgt_02_04(i4 %x) {
1092; CHECK-LABEL: @ashrsgt_02_04(
1093; CHECK-NEXT:    ret i1 false
1094;
1095  %s = ashr i4 %x, 2
1096  %c = icmp sgt i4 %s, 4
1097  ret i1 %c
1098}
1099
1100define i1 @ashrsgt_02_05(i4 %x) {
1101; CHECK-LABEL: @ashrsgt_02_05(
1102; CHECK-NEXT:    ret i1 false
1103;
1104  %s = ashr i4 %x, 2
1105  %c = icmp sgt i4 %s, 5
1106  ret i1 %c
1107}
1108
1109define i1 @ashrsgt_02_06(i4 %x) {
1110; CHECK-LABEL: @ashrsgt_02_06(
1111; CHECK-NEXT:    ret i1 false
1112;
1113  %s = ashr i4 %x, 2
1114  %c = icmp sgt i4 %s, 6
1115  ret i1 %c
1116}
1117
1118define i1 @ashrsgt_02_07(i4 %x) {
1119; CHECK-LABEL: @ashrsgt_02_07(
1120; CHECK-NEXT:    ret i1 false
1121;
1122  %s = ashr i4 %x, 2
1123  %c = icmp sgt i4 %s, 7
1124  ret i1 %c
1125}
1126
1127define i1 @ashrsgt_02_08(i4 %x) {
1128; CHECK-LABEL: @ashrsgt_02_08(
1129; CHECK-NEXT:    ret i1 true
1130;
1131  %s = ashr i4 %x, 2
1132  %c = icmp sgt i4 %s, 8
1133  ret i1 %c
1134}
1135
1136define i1 @ashrsgt_02_09(i4 %x) {
1137; CHECK-LABEL: @ashrsgt_02_09(
1138; CHECK-NEXT:    ret i1 true
1139;
1140  %s = ashr i4 %x, 2
1141  %c = icmp sgt i4 %s, 9
1142  ret i1 %c
1143}
1144
1145define i1 @ashrsgt_02_10(i4 %x) {
1146; CHECK-LABEL: @ashrsgt_02_10(
1147; CHECK-NEXT:    ret i1 true
1148;
1149  %s = ashr i4 %x, 2
1150  %c = icmp sgt i4 %s, 10
1151  ret i1 %c
1152}
1153
1154define i1 @ashrsgt_02_11(i4 %x) {
1155; CHECK-LABEL: @ashrsgt_02_11(
1156; CHECK-NEXT:    ret i1 true
1157;
1158  %s = ashr i4 %x, 2
1159  %c = icmp sgt i4 %s, 11
1160  ret i1 %c
1161}
1162
1163define i1 @ashrsgt_02_12(i4 %x) {
1164; CHECK-LABEL: @ashrsgt_02_12(
1165; CHECK-NEXT:    ret i1 true
1166;
1167  %s = ashr i4 %x, 2
1168  %c = icmp sgt i4 %s, 12
1169  ret i1 %c
1170}
1171
1172define i1 @ashrsgt_02_13(i4 %x) {
1173; CHECK-LABEL: @ashrsgt_02_13(
1174; CHECK-NEXT:    ret i1 true
1175;
1176  %s = ashr i4 %x, 2
1177  %c = icmp sgt i4 %s, 13
1178  ret i1 %c
1179}
1180
1181define i1 @ashrsgt_02_14(i4 %x) {
1182; CHECK-LABEL: @ashrsgt_02_14(
1183; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -5
1184; CHECK-NEXT:    ret i1 [[C]]
1185;
1186  %s = ashr i4 %x, 2
1187  %c = icmp sgt i4 %s, 14
1188  ret i1 %c
1189}
1190
1191define i1 @ashrsgt_02_15(i4 %x) {
1192; CHECK-LABEL: @ashrsgt_02_15(
1193; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -1
1194; CHECK-NEXT:    ret i1 [[C]]
1195;
1196  %s = ashr i4 %x, 2
1197  %c = icmp sgt i4 %s, 15
1198  ret i1 %c
1199}
1200
1201define i1 @ashrsgt_03_00(i4 %x) {
1202; CHECK-LABEL: @ashrsgt_03_00(
1203; CHECK-NEXT:    ret i1 false
1204;
1205  %s = ashr i4 %x, 3
1206  %c = icmp sgt i4 %s, 0
1207  ret i1 %c
1208}
1209
1210define i1 @ashrsgt_03_01(i4 %x) {
1211; CHECK-LABEL: @ashrsgt_03_01(
1212; CHECK-NEXT:    ret i1 false
1213;
1214  %s = ashr i4 %x, 3
1215  %c = icmp sgt i4 %s, 1
1216  ret i1 %c
1217}
1218
1219define i1 @ashrsgt_03_02(i4 %x) {
1220; CHECK-LABEL: @ashrsgt_03_02(
1221; CHECK-NEXT:    ret i1 false
1222;
1223  %s = ashr i4 %x, 3
1224  %c = icmp sgt i4 %s, 2
1225  ret i1 %c
1226}
1227
1228define i1 @ashrsgt_03_03(i4 %x) {
1229; CHECK-LABEL: @ashrsgt_03_03(
1230; CHECK-NEXT:    ret i1 false
1231;
1232  %s = ashr i4 %x, 3
1233  %c = icmp sgt i4 %s, 3
1234  ret i1 %c
1235}
1236
1237define i1 @ashrsgt_03_04(i4 %x) {
1238; CHECK-LABEL: @ashrsgt_03_04(
1239; CHECK-NEXT:    ret i1 false
1240;
1241  %s = ashr i4 %x, 3
1242  %c = icmp sgt i4 %s, 4
1243  ret i1 %c
1244}
1245
1246define i1 @ashrsgt_03_05(i4 %x) {
1247; CHECK-LABEL: @ashrsgt_03_05(
1248; CHECK-NEXT:    ret i1 false
1249;
1250  %s = ashr i4 %x, 3
1251  %c = icmp sgt i4 %s, 5
1252  ret i1 %c
1253}
1254
1255define i1 @ashrsgt_03_06(i4 %x) {
1256; CHECK-LABEL: @ashrsgt_03_06(
1257; CHECK-NEXT:    ret i1 false
1258;
1259  %s = ashr i4 %x, 3
1260  %c = icmp sgt i4 %s, 6
1261  ret i1 %c
1262}
1263
1264define i1 @ashrsgt_03_07(i4 %x) {
1265; CHECK-LABEL: @ashrsgt_03_07(
1266; CHECK-NEXT:    ret i1 false
1267;
1268  %s = ashr i4 %x, 3
1269  %c = icmp sgt i4 %s, 7
1270  ret i1 %c
1271}
1272
1273define i1 @ashrsgt_03_08(i4 %x) {
1274; CHECK-LABEL: @ashrsgt_03_08(
1275; CHECK-NEXT:    ret i1 true
1276;
1277  %s = ashr i4 %x, 3
1278  %c = icmp sgt i4 %s, 8
1279  ret i1 %c
1280}
1281
1282define i1 @ashrsgt_03_09(i4 %x) {
1283; CHECK-LABEL: @ashrsgt_03_09(
1284; CHECK-NEXT:    ret i1 true
1285;
1286  %s = ashr i4 %x, 3
1287  %c = icmp sgt i4 %s, 9
1288  ret i1 %c
1289}
1290
1291define i1 @ashrsgt_03_10(i4 %x) {
1292; CHECK-LABEL: @ashrsgt_03_10(
1293; CHECK-NEXT:    ret i1 true
1294;
1295  %s = ashr i4 %x, 3
1296  %c = icmp sgt i4 %s, 10
1297  ret i1 %c
1298}
1299
1300define i1 @ashrsgt_03_11(i4 %x) {
1301; CHECK-LABEL: @ashrsgt_03_11(
1302; CHECK-NEXT:    ret i1 true
1303;
1304  %s = ashr i4 %x, 3
1305  %c = icmp sgt i4 %s, 11
1306  ret i1 %c
1307}
1308
1309define i1 @ashrsgt_03_12(i4 %x) {
1310; CHECK-LABEL: @ashrsgt_03_12(
1311; CHECK-NEXT:    ret i1 true
1312;
1313  %s = ashr i4 %x, 3
1314  %c = icmp sgt i4 %s, 12
1315  ret i1 %c
1316}
1317
1318define i1 @ashrsgt_03_13(i4 %x) {
1319; CHECK-LABEL: @ashrsgt_03_13(
1320; CHECK-NEXT:    ret i1 true
1321;
1322  %s = ashr i4 %x, 3
1323  %c = icmp sgt i4 %s, 13
1324  ret i1 %c
1325}
1326
1327define i1 @ashrsgt_03_14(i4 %x) {
1328; CHECK-LABEL: @ashrsgt_03_14(
1329; CHECK-NEXT:    ret i1 true
1330;
1331  %s = ashr i4 %x, 3
1332  %c = icmp sgt i4 %s, 14
1333  ret i1 %c
1334}
1335
1336define i1 @ashrsgt_03_15(i4 %x) {
1337; CHECK-LABEL: @ashrsgt_03_15(
1338; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -1
1339; CHECK-NEXT:    ret i1 [[C]]
1340;
1341  %s = ashr i4 %x, 3
1342  %c = icmp sgt i4 %s, 15
1343  ret i1 %c
1344}
1345
1346define i1 @ashrslt_01_00(i4 %x) {
1347; CHECK-LABEL: @ashrslt_01_00(
1348; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 0
1349; CHECK-NEXT:    ret i1 [[C]]
1350;
1351  %s = ashr i4 %x, 1
1352  %c = icmp slt i4 %s, 0
1353  ret i1 %c
1354}
1355
1356define i1 @ashrslt_01_01(i4 %x) {
1357; CHECK-LABEL: @ashrslt_01_01(
1358; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 2
1359; CHECK-NEXT:    ret i1 [[C]]
1360;
1361  %s = ashr i4 %x, 1
1362  %c = icmp slt i4 %s, 1
1363  ret i1 %c
1364}
1365
1366define i1 @ashrslt_01_02(i4 %x) {
1367; CHECK-LABEL: @ashrslt_01_02(
1368; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 4
1369; CHECK-NEXT:    ret i1 [[C]]
1370;
1371  %s = ashr i4 %x, 1
1372  %c = icmp slt i4 %s, 2
1373  ret i1 %c
1374}
1375
1376define i1 @ashrslt_01_03(i4 %x) {
1377; CHECK-LABEL: @ashrslt_01_03(
1378; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 6
1379; CHECK-NEXT:    ret i1 [[C]]
1380;
1381  %s = ashr i4 %x, 1
1382  %c = icmp slt i4 %s, 3
1383  ret i1 %c
1384}
1385
1386define i1 @ashrslt_01_04(i4 %x) {
1387; CHECK-LABEL: @ashrslt_01_04(
1388; CHECK-NEXT:    ret i1 true
1389;
1390  %s = ashr i4 %x, 1
1391  %c = icmp slt i4 %s, 4
1392  ret i1 %c
1393}
1394
1395define i1 @ashrslt_01_05(i4 %x) {
1396; CHECK-LABEL: @ashrslt_01_05(
1397; CHECK-NEXT:    ret i1 true
1398;
1399  %s = ashr i4 %x, 1
1400  %c = icmp slt i4 %s, 5
1401  ret i1 %c
1402}
1403
1404define i1 @ashrslt_01_06(i4 %x) {
1405; CHECK-LABEL: @ashrslt_01_06(
1406; CHECK-NEXT:    ret i1 true
1407;
1408  %s = ashr i4 %x, 1
1409  %c = icmp slt i4 %s, 6
1410  ret i1 %c
1411}
1412
1413define i1 @ashrslt_01_07(i4 %x) {
1414; CHECK-LABEL: @ashrslt_01_07(
1415; CHECK-NEXT:    ret i1 true
1416;
1417  %s = ashr i4 %x, 1
1418  %c = icmp slt i4 %s, 7
1419  ret i1 %c
1420}
1421
1422define i1 @ashrslt_01_08(i4 %x) {
1423; CHECK-LABEL: @ashrslt_01_08(
1424; CHECK-NEXT:    ret i1 false
1425;
1426  %s = ashr i4 %x, 1
1427  %c = icmp slt i4 %s, 8
1428  ret i1 %c
1429}
1430
1431define i1 @ashrslt_01_09(i4 %x) {
1432; CHECK-LABEL: @ashrslt_01_09(
1433; CHECK-NEXT:    ret i1 false
1434;
1435  %s = ashr i4 %x, 1
1436  %c = icmp slt i4 %s, 9
1437  ret i1 %c
1438}
1439
1440define i1 @ashrslt_01_10(i4 %x) {
1441; CHECK-LABEL: @ashrslt_01_10(
1442; CHECK-NEXT:    ret i1 false
1443;
1444  %s = ashr i4 %x, 1
1445  %c = icmp slt i4 %s, 10
1446  ret i1 %c
1447}
1448
1449define i1 @ashrslt_01_11(i4 %x) {
1450; CHECK-LABEL: @ashrslt_01_11(
1451; CHECK-NEXT:    ret i1 false
1452;
1453  %s = ashr i4 %x, 1
1454  %c = icmp slt i4 %s, 11
1455  ret i1 %c
1456}
1457
1458define i1 @ashrslt_01_12(i4 %x) {
1459; CHECK-LABEL: @ashrslt_01_12(
1460; CHECK-NEXT:    ret i1 false
1461;
1462  %s = ashr i4 %x, 1
1463  %c = icmp slt i4 %s, 12
1464  ret i1 %c
1465}
1466
1467define i1 @ashrslt_01_13(i4 %x) {
1468; CHECK-LABEL: @ashrslt_01_13(
1469; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], -6
1470; CHECK-NEXT:    ret i1 [[C]]
1471;
1472  %s = ashr i4 %x, 1
1473  %c = icmp slt i4 %s, 13
1474  ret i1 %c
1475}
1476
1477define i1 @ashrslt_01_14(i4 %x) {
1478; CHECK-LABEL: @ashrslt_01_14(
1479; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], -4
1480; CHECK-NEXT:    ret i1 [[C]]
1481;
1482  %s = ashr i4 %x, 1
1483  %c = icmp slt i4 %s, 14
1484  ret i1 %c
1485}
1486
1487define i1 @ashrslt_01_15(i4 %x) {
1488; CHECK-LABEL: @ashrslt_01_15(
1489; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], -2
1490; CHECK-NEXT:    ret i1 [[C]]
1491;
1492  %s = ashr i4 %x, 1
1493  %c = icmp slt i4 %s, 15
1494  ret i1 %c
1495}
1496
1497define i1 @ashrslt_02_00(i4 %x) {
1498; CHECK-LABEL: @ashrslt_02_00(
1499; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 0
1500; CHECK-NEXT:    ret i1 [[C]]
1501;
1502  %s = ashr i4 %x, 2
1503  %c = icmp slt i4 %s, 0
1504  ret i1 %c
1505}
1506
1507define i1 @ashrslt_02_01(i4 %x) {
1508; CHECK-LABEL: @ashrslt_02_01(
1509; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 4
1510; CHECK-NEXT:    ret i1 [[C]]
1511;
1512  %s = ashr i4 %x, 2
1513  %c = icmp slt i4 %s, 1
1514  ret i1 %c
1515}
1516
1517define i1 @ashrslt_02_02(i4 %x) {
1518; CHECK-LABEL: @ashrslt_02_02(
1519; CHECK-NEXT:    ret i1 true
1520;
1521  %s = ashr i4 %x, 2
1522  %c = icmp slt i4 %s, 2
1523  ret i1 %c
1524}
1525
1526define i1 @ashrslt_02_03(i4 %x) {
1527; CHECK-LABEL: @ashrslt_02_03(
1528; CHECK-NEXT:    ret i1 true
1529;
1530  %s = ashr i4 %x, 2
1531  %c = icmp slt i4 %s, 3
1532  ret i1 %c
1533}
1534
1535define i1 @ashrslt_02_04(i4 %x) {
1536; CHECK-LABEL: @ashrslt_02_04(
1537; CHECK-NEXT:    ret i1 true
1538;
1539  %s = ashr i4 %x, 2
1540  %c = icmp slt i4 %s, 4
1541  ret i1 %c
1542}
1543
1544define i1 @ashrslt_02_05(i4 %x) {
1545; CHECK-LABEL: @ashrslt_02_05(
1546; CHECK-NEXT:    ret i1 true
1547;
1548  %s = ashr i4 %x, 2
1549  %c = icmp slt i4 %s, 5
1550  ret i1 %c
1551}
1552
1553define i1 @ashrslt_02_06(i4 %x) {
1554; CHECK-LABEL: @ashrslt_02_06(
1555; CHECK-NEXT:    ret i1 true
1556;
1557  %s = ashr i4 %x, 2
1558  %c = icmp slt i4 %s, 6
1559  ret i1 %c
1560}
1561
1562define i1 @ashrslt_02_07(i4 %x) {
1563; CHECK-LABEL: @ashrslt_02_07(
1564; CHECK-NEXT:    ret i1 true
1565;
1566  %s = ashr i4 %x, 2
1567  %c = icmp slt i4 %s, 7
1568  ret i1 %c
1569}
1570
1571define i1 @ashrslt_02_08(i4 %x) {
1572; CHECK-LABEL: @ashrslt_02_08(
1573; CHECK-NEXT:    ret i1 false
1574;
1575  %s = ashr i4 %x, 2
1576  %c = icmp slt i4 %s, 8
1577  ret i1 %c
1578}
1579
1580define i1 @ashrslt_02_09(i4 %x) {
1581; CHECK-LABEL: @ashrslt_02_09(
1582; CHECK-NEXT:    ret i1 false
1583;
1584  %s = ashr i4 %x, 2
1585  %c = icmp slt i4 %s, 9
1586  ret i1 %c
1587}
1588
1589define i1 @ashrslt_02_10(i4 %x) {
1590; CHECK-LABEL: @ashrslt_02_10(
1591; CHECK-NEXT:    ret i1 false
1592;
1593  %s = ashr i4 %x, 2
1594  %c = icmp slt i4 %s, 10
1595  ret i1 %c
1596}
1597
1598define i1 @ashrslt_02_11(i4 %x) {
1599; CHECK-LABEL: @ashrslt_02_11(
1600; CHECK-NEXT:    ret i1 false
1601;
1602  %s = ashr i4 %x, 2
1603  %c = icmp slt i4 %s, 11
1604  ret i1 %c
1605}
1606
1607define i1 @ashrslt_02_12(i4 %x) {
1608; CHECK-LABEL: @ashrslt_02_12(
1609; CHECK-NEXT:    ret i1 false
1610;
1611  %s = ashr i4 %x, 2
1612  %c = icmp slt i4 %s, 12
1613  ret i1 %c
1614}
1615
1616define i1 @ashrslt_02_13(i4 %x) {
1617; CHECK-LABEL: @ashrslt_02_13(
1618; CHECK-NEXT:    ret i1 false
1619;
1620  %s = ashr i4 %x, 2
1621  %c = icmp slt i4 %s, 13
1622  ret i1 %c
1623}
1624
1625define i1 @ashrslt_02_14(i4 %x) {
1626; CHECK-LABEL: @ashrslt_02_14(
1627; CHECK-NEXT:    ret i1 false
1628;
1629  %s = ashr i4 %x, 2
1630  %c = icmp slt i4 %s, 14
1631  ret i1 %c
1632}
1633
1634define i1 @ashrslt_02_15(i4 %x) {
1635; CHECK-LABEL: @ashrslt_02_15(
1636; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], -4
1637; CHECK-NEXT:    ret i1 [[C]]
1638;
1639  %s = ashr i4 %x, 2
1640  %c = icmp slt i4 %s, 15
1641  ret i1 %c
1642}
1643
1644define i1 @ashrslt_03_00(i4 %x) {
1645; CHECK-LABEL: @ashrslt_03_00(
1646; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 0
1647; CHECK-NEXT:    ret i1 [[C]]
1648;
1649  %s = ashr i4 %x, 3
1650  %c = icmp slt i4 %s, 0
1651  ret i1 %c
1652}
1653
1654define i1 @ashrslt_03_01(i4 %x) {
1655; CHECK-LABEL: @ashrslt_03_01(
1656; CHECK-NEXT:    ret i1 true
1657;
1658  %s = ashr i4 %x, 3
1659  %c = icmp slt i4 %s, 1
1660  ret i1 %c
1661}
1662
1663define i1 @ashrslt_03_02(i4 %x) {
1664; CHECK-LABEL: @ashrslt_03_02(
1665; CHECK-NEXT:    ret i1 true
1666;
1667  %s = ashr i4 %x, 3
1668  %c = icmp slt i4 %s, 2
1669  ret i1 %c
1670}
1671
1672define i1 @ashrslt_03_03(i4 %x) {
1673; CHECK-LABEL: @ashrslt_03_03(
1674; CHECK-NEXT:    ret i1 true
1675;
1676  %s = ashr i4 %x, 3
1677  %c = icmp slt i4 %s, 3
1678  ret i1 %c
1679}
1680
1681define i1 @ashrslt_03_04(i4 %x) {
1682; CHECK-LABEL: @ashrslt_03_04(
1683; CHECK-NEXT:    ret i1 true
1684;
1685  %s = ashr i4 %x, 3
1686  %c = icmp slt i4 %s, 4
1687  ret i1 %c
1688}
1689
1690define i1 @ashrslt_03_05(i4 %x) {
1691; CHECK-LABEL: @ashrslt_03_05(
1692; CHECK-NEXT:    ret i1 true
1693;
1694  %s = ashr i4 %x, 3
1695  %c = icmp slt i4 %s, 5
1696  ret i1 %c
1697}
1698
1699define i1 @ashrslt_03_06(i4 %x) {
1700; CHECK-LABEL: @ashrslt_03_06(
1701; CHECK-NEXT:    ret i1 true
1702;
1703  %s = ashr i4 %x, 3
1704  %c = icmp slt i4 %s, 6
1705  ret i1 %c
1706}
1707
1708define i1 @ashrslt_03_07(i4 %x) {
1709; CHECK-LABEL: @ashrslt_03_07(
1710; CHECK-NEXT:    ret i1 true
1711;
1712  %s = ashr i4 %x, 3
1713  %c = icmp slt i4 %s, 7
1714  ret i1 %c
1715}
1716
1717define i1 @ashrslt_03_08(i4 %x) {
1718; CHECK-LABEL: @ashrslt_03_08(
1719; CHECK-NEXT:    ret i1 false
1720;
1721  %s = ashr i4 %x, 3
1722  %c = icmp slt i4 %s, 8
1723  ret i1 %c
1724}
1725
1726define i1 @ashrslt_03_09(i4 %x) {
1727; CHECK-LABEL: @ashrslt_03_09(
1728; CHECK-NEXT:    ret i1 false
1729;
1730  %s = ashr i4 %x, 3
1731  %c = icmp slt i4 %s, 9
1732  ret i1 %c
1733}
1734
1735define i1 @ashrslt_03_10(i4 %x) {
1736; CHECK-LABEL: @ashrslt_03_10(
1737; CHECK-NEXT:    ret i1 false
1738;
1739  %s = ashr i4 %x, 3
1740  %c = icmp slt i4 %s, 10
1741  ret i1 %c
1742}
1743
1744define i1 @ashrslt_03_11(i4 %x) {
1745; CHECK-LABEL: @ashrslt_03_11(
1746; CHECK-NEXT:    ret i1 false
1747;
1748  %s = ashr i4 %x, 3
1749  %c = icmp slt i4 %s, 11
1750  ret i1 %c
1751}
1752
1753define i1 @ashrslt_03_12(i4 %x) {
1754; CHECK-LABEL: @ashrslt_03_12(
1755; CHECK-NEXT:    ret i1 false
1756;
1757  %s = ashr i4 %x, 3
1758  %c = icmp slt i4 %s, 12
1759  ret i1 %c
1760}
1761
1762define i1 @ashrslt_03_13(i4 %x) {
1763; CHECK-LABEL: @ashrslt_03_13(
1764; CHECK-NEXT:    ret i1 false
1765;
1766  %s = ashr i4 %x, 3
1767  %c = icmp slt i4 %s, 13
1768  ret i1 %c
1769}
1770
1771define i1 @ashrslt_03_14(i4 %x) {
1772; CHECK-LABEL: @ashrslt_03_14(
1773; CHECK-NEXT:    ret i1 false
1774;
1775  %s = ashr i4 %x, 3
1776  %c = icmp slt i4 %s, 14
1777  ret i1 %c
1778}
1779
1780define i1 @ashrslt_03_15(i4 %x) {
1781; CHECK-LABEL: @ashrslt_03_15(
1782; CHECK-NEXT:    ret i1 false
1783;
1784  %s = ashr i4 %x, 3
1785  %c = icmp slt i4 %s, 15
1786  ret i1 %c
1787}
1788
1789define i1 @lshrugt_01_00_exact(i4 %x) {
1790; CHECK-LABEL: @lshrugt_01_00_exact(
1791; CHECK-NEXT:    [[C:%.*]] = icmp ne i4 [[X:%.*]], 0
1792; CHECK-NEXT:    ret i1 [[C]]
1793;
1794  %s = lshr exact i4 %x, 1
1795  %c = icmp ugt i4 %s, 0
1796  ret i1 %c
1797}
1798
1799define i1 @lshrugt_01_01_exact(i4 %x) {
1800; CHECK-LABEL: @lshrugt_01_01_exact(
1801; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], 2
1802; CHECK-NEXT:    ret i1 [[C]]
1803;
1804  %s = lshr exact i4 %x, 1
1805  %c = icmp ugt i4 %s, 1
1806  ret i1 %c
1807}
1808
1809define i1 @lshrugt_01_02_exact(i4 %x) {
1810; CHECK-LABEL: @lshrugt_01_02_exact(
1811; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], 4
1812; CHECK-NEXT:    ret i1 [[C]]
1813;
1814  %s = lshr exact i4 %x, 1
1815  %c = icmp ugt i4 %s, 2
1816  ret i1 %c
1817}
1818
1819define i1 @lshrugt_01_03_exact(i4 %x) {
1820; CHECK-LABEL: @lshrugt_01_03_exact(
1821; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], 6
1822; CHECK-NEXT:    ret i1 [[C]]
1823;
1824  %s = lshr exact i4 %x, 1
1825  %c = icmp ugt i4 %s, 3
1826  ret i1 %c
1827}
1828
1829define i1 @lshrugt_01_04_exact(i4 %x) {
1830; CHECK-LABEL: @lshrugt_01_04_exact(
1831; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], -8
1832; CHECK-NEXT:    ret i1 [[C]]
1833;
1834  %s = lshr exact i4 %x, 1
1835  %c = icmp ugt i4 %s, 4
1836  ret i1 %c
1837}
1838
1839define i1 @lshrugt_01_05_exact(i4 %x) {
1840; CHECK-LABEL: @lshrugt_01_05_exact(
1841; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], -6
1842; CHECK-NEXT:    ret i1 [[C]]
1843;
1844  %s = lshr exact i4 %x, 1
1845  %c = icmp ugt i4 %s, 5
1846  ret i1 %c
1847}
1848
1849define i1 @lshrugt_01_06_exact(i4 %x) {
1850; CHECK-LABEL: @lshrugt_01_06_exact(
1851; CHECK-NEXT:    [[C:%.*]] = icmp eq i4 [[X:%.*]], -2
1852; CHECK-NEXT:    ret i1 [[C]]
1853;
1854  %s = lshr exact i4 %x, 1
1855  %c = icmp ugt i4 %s, 6
1856  ret i1 %c
1857}
1858
1859define i1 @lshrugt_01_07_exact(i4 %x) {
1860; CHECK-LABEL: @lshrugt_01_07_exact(
1861; CHECK-NEXT:    ret i1 false
1862;
1863  %s = lshr exact i4 %x, 1
1864  %c = icmp ugt i4 %s, 7
1865  ret i1 %c
1866}
1867
1868define i1 @lshrugt_01_08_exact(i4 %x) {
1869; CHECK-LABEL: @lshrugt_01_08_exact(
1870; CHECK-NEXT:    ret i1 false
1871;
1872  %s = lshr exact i4 %x, 1
1873  %c = icmp ugt i4 %s, 8
1874  ret i1 %c
1875}
1876
1877define i1 @lshrugt_01_09_exact(i4 %x) {
1878; CHECK-LABEL: @lshrugt_01_09_exact(
1879; CHECK-NEXT:    ret i1 false
1880;
1881  %s = lshr exact i4 %x, 1
1882  %c = icmp ugt i4 %s, 9
1883  ret i1 %c
1884}
1885
1886define i1 @lshrugt_01_10_exact(i4 %x) {
1887; CHECK-LABEL: @lshrugt_01_10_exact(
1888; CHECK-NEXT:    ret i1 false
1889;
1890  %s = lshr exact i4 %x, 1
1891  %c = icmp ugt i4 %s, 10
1892  ret i1 %c
1893}
1894
1895define i1 @lshrugt_01_11_exact(i4 %x) {
1896; CHECK-LABEL: @lshrugt_01_11_exact(
1897; CHECK-NEXT:    ret i1 false
1898;
1899  %s = lshr exact i4 %x, 1
1900  %c = icmp ugt i4 %s, 11
1901  ret i1 %c
1902}
1903
1904define i1 @lshrugt_01_12_exact(i4 %x) {
1905; CHECK-LABEL: @lshrugt_01_12_exact(
1906; CHECK-NEXT:    ret i1 false
1907;
1908  %s = lshr exact i4 %x, 1
1909  %c = icmp ugt i4 %s, 12
1910  ret i1 %c
1911}
1912
1913define i1 @lshrugt_01_13_exact(i4 %x) {
1914; CHECK-LABEL: @lshrugt_01_13_exact(
1915; CHECK-NEXT:    ret i1 false
1916;
1917  %s = lshr exact i4 %x, 1
1918  %c = icmp ugt i4 %s, 13
1919  ret i1 %c
1920}
1921
1922define i1 @lshrugt_01_14_exact(i4 %x) {
1923; CHECK-LABEL: @lshrugt_01_14_exact(
1924; CHECK-NEXT:    ret i1 false
1925;
1926  %s = lshr exact i4 %x, 1
1927  %c = icmp ugt i4 %s, 14
1928  ret i1 %c
1929}
1930
1931define i1 @lshrugt_01_15_exact(i4 %x) {
1932; CHECK-LABEL: @lshrugt_01_15_exact(
1933; CHECK-NEXT:    ret i1 false
1934;
1935  %s = lshr exact i4 %x, 1
1936  %c = icmp ugt i4 %s, 15
1937  ret i1 %c
1938}
1939
1940define i1 @lshrugt_02_00_exact(i4 %x) {
1941; CHECK-LABEL: @lshrugt_02_00_exact(
1942; CHECK-NEXT:    [[C:%.*]] = icmp ne i4 [[X:%.*]], 0
1943; CHECK-NEXT:    ret i1 [[C]]
1944;
1945  %s = lshr exact i4 %x, 2
1946  %c = icmp ugt i4 %s, 0
1947  ret i1 %c
1948}
1949
1950define i1 @lshrugt_02_01_exact(i4 %x) {
1951; CHECK-LABEL: @lshrugt_02_01_exact(
1952; CHECK-NEXT:    [[C:%.*]] = icmp ugt i4 [[X:%.*]], 4
1953; CHECK-NEXT:    ret i1 [[C]]
1954;
1955  %s = lshr exact i4 %x, 2
1956  %c = icmp ugt i4 %s, 1
1957  ret i1 %c
1958}
1959
1960define i1 @lshrugt_02_02_exact(i4 %x) {
1961; CHECK-LABEL: @lshrugt_02_02_exact(
1962; CHECK-NEXT:    [[C:%.*]] = icmp eq i4 [[X:%.*]], -4
1963; CHECK-NEXT:    ret i1 [[C]]
1964;
1965  %s = lshr exact i4 %x, 2
1966  %c = icmp ugt i4 %s, 2
1967  ret i1 %c
1968}
1969
1970define i1 @lshrugt_02_03_exact(i4 %x) {
1971; CHECK-LABEL: @lshrugt_02_03_exact(
1972; CHECK-NEXT:    ret i1 false
1973;
1974  %s = lshr exact i4 %x, 2
1975  %c = icmp ugt i4 %s, 3
1976  ret i1 %c
1977}
1978
1979define i1 @lshrugt_02_04_exact(i4 %x) {
1980; CHECK-LABEL: @lshrugt_02_04_exact(
1981; CHECK-NEXT:    ret i1 false
1982;
1983  %s = lshr exact i4 %x, 2
1984  %c = icmp ugt i4 %s, 4
1985  ret i1 %c
1986}
1987
1988define i1 @lshrugt_02_05_exact(i4 %x) {
1989; CHECK-LABEL: @lshrugt_02_05_exact(
1990; CHECK-NEXT:    ret i1 false
1991;
1992  %s = lshr exact i4 %x, 2
1993  %c = icmp ugt i4 %s, 5
1994  ret i1 %c
1995}
1996
1997define i1 @lshrugt_02_06_exact(i4 %x) {
1998; CHECK-LABEL: @lshrugt_02_06_exact(
1999; CHECK-NEXT:    ret i1 false
2000;
2001  %s = lshr exact i4 %x, 2
2002  %c = icmp ugt i4 %s, 6
2003  ret i1 %c
2004}
2005
2006define i1 @lshrugt_02_07_exact(i4 %x) {
2007; CHECK-LABEL: @lshrugt_02_07_exact(
2008; CHECK-NEXT:    ret i1 false
2009;
2010  %s = lshr exact i4 %x, 2
2011  %c = icmp ugt i4 %s, 7
2012  ret i1 %c
2013}
2014
2015define i1 @lshrugt_02_08_exact(i4 %x) {
2016; CHECK-LABEL: @lshrugt_02_08_exact(
2017; CHECK-NEXT:    ret i1 false
2018;
2019  %s = lshr exact i4 %x, 2
2020  %c = icmp ugt i4 %s, 8
2021  ret i1 %c
2022}
2023
2024define i1 @lshrugt_02_09_exact(i4 %x) {
2025; CHECK-LABEL: @lshrugt_02_09_exact(
2026; CHECK-NEXT:    ret i1 false
2027;
2028  %s = lshr exact i4 %x, 2
2029  %c = icmp ugt i4 %s, 9
2030  ret i1 %c
2031}
2032
2033define i1 @lshrugt_02_10_exact(i4 %x) {
2034; CHECK-LABEL: @lshrugt_02_10_exact(
2035; CHECK-NEXT:    ret i1 false
2036;
2037  %s = lshr exact i4 %x, 2
2038  %c = icmp ugt i4 %s, 10
2039  ret i1 %c
2040}
2041
2042define i1 @lshrugt_02_11_exact(i4 %x) {
2043; CHECK-LABEL: @lshrugt_02_11_exact(
2044; CHECK-NEXT:    ret i1 false
2045;
2046  %s = lshr exact i4 %x, 2
2047  %c = icmp ugt i4 %s, 11
2048  ret i1 %c
2049}
2050
2051define i1 @lshrugt_02_12_exact(i4 %x) {
2052; CHECK-LABEL: @lshrugt_02_12_exact(
2053; CHECK-NEXT:    ret i1 false
2054;
2055  %s = lshr exact i4 %x, 2
2056  %c = icmp ugt i4 %s, 12
2057  ret i1 %c
2058}
2059
2060define i1 @lshrugt_02_13_exact(i4 %x) {
2061; CHECK-LABEL: @lshrugt_02_13_exact(
2062; CHECK-NEXT:    ret i1 false
2063;
2064  %s = lshr exact i4 %x, 2
2065  %c = icmp ugt i4 %s, 13
2066  ret i1 %c
2067}
2068
2069define i1 @lshrugt_02_14_exact(i4 %x) {
2070; CHECK-LABEL: @lshrugt_02_14_exact(
2071; CHECK-NEXT:    ret i1 false
2072;
2073  %s = lshr exact i4 %x, 2
2074  %c = icmp ugt i4 %s, 14
2075  ret i1 %c
2076}
2077
2078define i1 @lshrugt_02_15_exact(i4 %x) {
2079; CHECK-LABEL: @lshrugt_02_15_exact(
2080; CHECK-NEXT:    ret i1 false
2081;
2082  %s = lshr exact i4 %x, 2
2083  %c = icmp ugt i4 %s, 15
2084  ret i1 %c
2085}
2086
2087define i1 @lshrugt_03_00_exact(i4 %x) {
2088; CHECK-LABEL: @lshrugt_03_00_exact(
2089; CHECK-NEXT:    [[C:%.*]] = icmp ne i4 [[X:%.*]], 0
2090; CHECK-NEXT:    ret i1 [[C]]
2091;
2092  %s = lshr exact i4 %x, 3
2093  %c = icmp ugt i4 %s, 0
2094  ret i1 %c
2095}
2096
2097define i1 @lshrugt_03_01_exact(i4 %x) {
2098; CHECK-LABEL: @lshrugt_03_01_exact(
2099; CHECK-NEXT:    ret i1 false
2100;
2101  %s = lshr exact i4 %x, 3
2102  %c = icmp ugt i4 %s, 1
2103  ret i1 %c
2104}
2105
2106define i1 @lshrugt_03_02_exact(i4 %x) {
2107; CHECK-LABEL: @lshrugt_03_02_exact(
2108; CHECK-NEXT:    ret i1 false
2109;
2110  %s = lshr exact i4 %x, 3
2111  %c = icmp ugt i4 %s, 2
2112  ret i1 %c
2113}
2114
2115define i1 @lshrugt_03_03_exact(i4 %x) {
2116; CHECK-LABEL: @lshrugt_03_03_exact(
2117; CHECK-NEXT:    ret i1 false
2118;
2119  %s = lshr exact i4 %x, 3
2120  %c = icmp ugt i4 %s, 3
2121  ret i1 %c
2122}
2123
2124define i1 @lshrugt_03_04_exact(i4 %x) {
2125; CHECK-LABEL: @lshrugt_03_04_exact(
2126; CHECK-NEXT:    ret i1 false
2127;
2128  %s = lshr exact i4 %x, 3
2129  %c = icmp ugt i4 %s, 4
2130  ret i1 %c
2131}
2132
2133define i1 @lshrugt_03_05_exact(i4 %x) {
2134; CHECK-LABEL: @lshrugt_03_05_exact(
2135; CHECK-NEXT:    ret i1 false
2136;
2137  %s = lshr exact i4 %x, 3
2138  %c = icmp ugt i4 %s, 5
2139  ret i1 %c
2140}
2141
2142define i1 @lshrugt_03_06_exact(i4 %x) {
2143; CHECK-LABEL: @lshrugt_03_06_exact(
2144; CHECK-NEXT:    ret i1 false
2145;
2146  %s = lshr exact i4 %x, 3
2147  %c = icmp ugt i4 %s, 6
2148  ret i1 %c
2149}
2150
2151define i1 @lshrugt_03_07_exact(i4 %x) {
2152; CHECK-LABEL: @lshrugt_03_07_exact(
2153; CHECK-NEXT:    ret i1 false
2154;
2155  %s = lshr exact i4 %x, 3
2156  %c = icmp ugt i4 %s, 7
2157  ret i1 %c
2158}
2159
2160define i1 @lshrugt_03_08_exact(i4 %x) {
2161; CHECK-LABEL: @lshrugt_03_08_exact(
2162; CHECK-NEXT:    ret i1 false
2163;
2164  %s = lshr exact i4 %x, 3
2165  %c = icmp ugt i4 %s, 8
2166  ret i1 %c
2167}
2168
2169define i1 @lshrugt_03_09_exact(i4 %x) {
2170; CHECK-LABEL: @lshrugt_03_09_exact(
2171; CHECK-NEXT:    ret i1 false
2172;
2173  %s = lshr exact i4 %x, 3
2174  %c = icmp ugt i4 %s, 9
2175  ret i1 %c
2176}
2177
2178define i1 @lshrugt_03_10_exact(i4 %x) {
2179; CHECK-LABEL: @lshrugt_03_10_exact(
2180; CHECK-NEXT:    ret i1 false
2181;
2182  %s = lshr exact i4 %x, 3
2183  %c = icmp ugt i4 %s, 10
2184  ret i1 %c
2185}
2186
2187define i1 @lshrugt_03_11_exact(i4 %x) {
2188; CHECK-LABEL: @lshrugt_03_11_exact(
2189; CHECK-NEXT:    ret i1 false
2190;
2191  %s = lshr exact i4 %x, 3
2192  %c = icmp ugt i4 %s, 11
2193  ret i1 %c
2194}
2195
2196define i1 @lshrugt_03_12_exact(i4 %x) {
2197; CHECK-LABEL: @lshrugt_03_12_exact(
2198; CHECK-NEXT:    ret i1 false
2199;
2200  %s = lshr exact i4 %x, 3
2201  %c = icmp ugt i4 %s, 12
2202  ret i1 %c
2203}
2204
2205define i1 @lshrugt_03_13_exact(i4 %x) {
2206; CHECK-LABEL: @lshrugt_03_13_exact(
2207; CHECK-NEXT:    ret i1 false
2208;
2209  %s = lshr exact i4 %x, 3
2210  %c = icmp ugt i4 %s, 13
2211  ret i1 %c
2212}
2213
2214define i1 @lshrugt_03_14_exact(i4 %x) {
2215; CHECK-LABEL: @lshrugt_03_14_exact(
2216; CHECK-NEXT:    ret i1 false
2217;
2218  %s = lshr exact i4 %x, 3
2219  %c = icmp ugt i4 %s, 14
2220  ret i1 %c
2221}
2222
2223define i1 @lshrugt_03_15_exact(i4 %x) {
2224; CHECK-LABEL: @lshrugt_03_15_exact(
2225; CHECK-NEXT:    ret i1 false
2226;
2227  %s = lshr exact i4 %x, 3
2228  %c = icmp ugt i4 %s, 15
2229  ret i1 %c
2230}
2231
2232define i1 @ashr_eq_exact(i8 %x) {
2233; CHECK-LABEL: @ashr_eq_exact(
2234; CHECK-NEXT:    [[C:%.*]] = icmp eq i8 [[X:%.*]], 80
2235; CHECK-NEXT:    ret i1 [[C]]
2236;
2237  %s = ashr exact i8 %x, 3
2238  %c = icmp eq i8 %s, 10
2239  ret i1 %c
2240}
2241
2242define i1 @ashr_ne_exact(i8 %x) {
2243; CHECK-LABEL: @ashr_ne_exact(
2244; CHECK-NEXT:    [[C:%.*]] = icmp ne i8 [[X:%.*]], 80
2245; CHECK-NEXT:    ret i1 [[C]]
2246;
2247  %s = ashr exact i8 %x, 3
2248  %c = icmp ne i8 %s, 10
2249  ret i1 %c
2250}
2251
2252define i1 @ashr_ugt_exact(i8 %x) {
2253; CHECK-LABEL: @ashr_ugt_exact(
2254; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[X:%.*]], 80
2255; CHECK-NEXT:    ret i1 [[C]]
2256;
2257  %s = ashr exact i8 %x, 3
2258  %c = icmp ugt i8 %s, 10
2259  ret i1 %c
2260}
2261
2262
2263define i1 @ashr_uge_exact(i8 %x) {
2264; CHECK-LABEL: @ashr_uge_exact(
2265; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[X:%.*]], 72
2266; CHECK-NEXT:    ret i1 [[C]]
2267;
2268  %s = ashr exact i8 %x, 3
2269  %c = icmp uge i8 %s, 10
2270  ret i1 %c
2271}
2272
2273define i1 @ashr_ult_exact(i8 %x) {
2274; CHECK-LABEL: @ashr_ult_exact(
2275; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], 80
2276; CHECK-NEXT:    ret i1 [[C]]
2277;
2278  %s = ashr exact i8 %x, 3
2279  %c = icmp ult i8 %s, 10
2280  ret i1 %c
2281}
2282
2283
2284define i1 @ashr_ule_exact(i8 %x) {
2285; CHECK-LABEL: @ashr_ule_exact(
2286; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], 88
2287; CHECK-NEXT:    ret i1 [[C]]
2288;
2289  %s = ashr exact i8 %x, 3
2290  %c = icmp ule i8 %s, 10
2291  ret i1 %c
2292}
2293
2294
2295define i1 @ashr_sgt_exact(i8 %x) {
2296; CHECK-LABEL: @ashr_sgt_exact(
2297; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[X:%.*]], 80
2298; CHECK-NEXT:    ret i1 [[C]]
2299;
2300  %s = ashr exact i8 %x, 3
2301  %c = icmp sgt i8 %s, 10
2302  ret i1 %c
2303}
2304
2305
2306define i1 @ashr_sge_exact(i8 %x) {
2307; CHECK-LABEL: @ashr_sge_exact(
2308; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[X:%.*]], 72
2309; CHECK-NEXT:    ret i1 [[C]]
2310;
2311  %s = ashr exact i8 %x, 3
2312  %c = icmp sge i8 %s, 10
2313  ret i1 %c
2314}
2315
2316define i1 @ashr_slt_exact(i8 %x) {
2317; CHECK-LABEL: @ashr_slt_exact(
2318; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], 80
2319; CHECK-NEXT:    ret i1 [[C]]
2320;
2321  %s = ashr exact i8 %x, 3
2322  %c = icmp slt i8 %s, 10
2323  ret i1 %c
2324}
2325
2326define i1 @ashr_sle_exact(i8 %x) {
2327; CHECK-LABEL: @ashr_sle_exact(
2328; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], 88
2329; CHECK-NEXT:    ret i1 [[C]]
2330;
2331  %s = ashr exact i8 %x, 3
2332  %c = icmp sle i8 %s, 10
2333  ret i1 %c
2334}
2335
2336define i1 @ashr_eq_noexact(i8 %x) {
2337; CHECK-LABEL: @ashr_eq_noexact(
2338; CHECK-NEXT:    [[S_MASK:%.*]] = and i8 [[X:%.*]], -8
2339; CHECK-NEXT:    [[C:%.*]] = icmp eq i8 [[S_MASK]], 80
2340; CHECK-NEXT:    ret i1 [[C]]
2341;
2342  %s = ashr i8 %x, 3
2343  %c = icmp eq i8 %s, 10
2344  ret i1 %c
2345}
2346
2347define i1 @ashr_ne_noexact(i8 %x) {
2348; CHECK-LABEL: @ashr_ne_noexact(
2349; CHECK-NEXT:    [[S_MASK:%.*]] = and i8 [[X:%.*]], -8
2350; CHECK-NEXT:    [[C:%.*]] = icmp ne i8 [[S_MASK]], 80
2351; CHECK-NEXT:    ret i1 [[C]]
2352;
2353  %s = ashr i8 %x, 3
2354  %c = icmp ne i8 %s, 10
2355  ret i1 %c
2356}
2357
2358define i1 @ashr_ugt_noexact(i8 %x) {
2359; CHECK-LABEL: @ashr_ugt_noexact(
2360; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[X:%.*]], 87
2361; CHECK-NEXT:    ret i1 [[C]]
2362;
2363  %s = ashr i8 %x, 3
2364  %c = icmp ugt i8 %s, 10
2365  ret i1 %c
2366}
2367
2368
2369define i1 @ashr_uge_noexact(i8 %x) {
2370; CHECK-LABEL: @ashr_uge_noexact(
2371; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[X:%.*]], 79
2372; CHECK-NEXT:    ret i1 [[C]]
2373;
2374  %s = ashr i8 %x, 3
2375  %c = icmp uge i8 %s, 10
2376  ret i1 %c
2377}
2378
2379define i1 @ashr_ult_noexact(i8 %x) {
2380; CHECK-LABEL: @ashr_ult_noexact(
2381; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], 80
2382; CHECK-NEXT:    ret i1 [[C]]
2383;
2384  %s = ashr i8 %x, 3
2385  %c = icmp ult i8 %s, 10
2386  ret i1 %c
2387}
2388
2389
2390define i1 @ashr_ule_noexact(i8 %x) {
2391; CHECK-LABEL: @ashr_ule_noexact(
2392; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], 88
2393; CHECK-NEXT:    ret i1 [[C]]
2394;
2395  %s = ashr i8 %x, 3
2396  %c = icmp ule i8 %s, 10
2397  ret i1 %c
2398}
2399
2400
2401define i1 @ashr_sgt_noexact(i8 %x) {
2402; CHECK-LABEL: @ashr_sgt_noexact(
2403; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[X:%.*]], 87
2404; CHECK-NEXT:    ret i1 [[C]]
2405;
2406  %s = ashr i8 %x, 3
2407  %c = icmp sgt i8 %s, 10
2408  ret i1 %c
2409}
2410
2411
2412define i1 @ashr_sge_noexact(i8 %x) {
2413; CHECK-LABEL: @ashr_sge_noexact(
2414; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[X:%.*]], 79
2415; CHECK-NEXT:    ret i1 [[C]]
2416;
2417  %s = ashr i8 %x, 3
2418  %c = icmp sge i8 %s, 10
2419  ret i1 %c
2420}
2421
2422define i1 @ashr_slt_noexact(i8 %x) {
2423; CHECK-LABEL: @ashr_slt_noexact(
2424; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], 80
2425; CHECK-NEXT:    ret i1 [[C]]
2426;
2427  %s = ashr i8 %x, 3
2428  %c = icmp slt i8 %s, 10
2429  ret i1 %c
2430}
2431
2432define i1 @ashr_sle_noexact(i8 %x) {
2433; CHECK-LABEL: @ashr_sle_noexact(
2434; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], 88
2435; CHECK-NEXT:    ret i1 [[C]]
2436;
2437  %s = ashr i8 %x, 3
2438  %c = icmp sle i8 %s, 10
2439  ret i1 %c
2440}
2441
2442define i1 @ashr_00_00_ashr_extra_use(i8 %x, ptr %ptr) {
2443; CHECK-LABEL: @ashr_00_00_ashr_extra_use(
2444; CHECK-NEXT:    [[S:%.*]] = ashr exact i8 [[X:%.*]], 3
2445; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[S]], 11
2446; CHECK-NEXT:    store i8 [[S]], ptr [[PTR:%.*]], align 1
2447; CHECK-NEXT:    ret i1 [[C]]
2448;
2449  %s = ashr exact i8 %x, 3
2450  %c = icmp ule i8 %s, 10
2451  store i8 %s, ptr %ptr
2452  ret i1 %c
2453}
2454
2455define <4 x i1> @ashr_00_00_vec(<4 x i8> %x) {
2456; CHECK-LABEL: @ashr_00_00_vec(
2457; CHECK-NEXT:    [[C:%.*]] = icmp ult <4 x i8> [[X:%.*]], splat (i8 88)
2458; CHECK-NEXT:    ret <4 x i1> [[C]]
2459;
2460  %s = ashr exact <4 x i8> %x, <i8 3,i8 3, i8 3, i8 3>
2461  %c = icmp ule <4 x i8> %s, <i8 10,i8 10,i8 10,i8 10>
2462  ret <4 x i1> %c
2463}
2464
2465define i1 @ashr_sgt_overflow(i8 %x) {
2466; CHECK-LABEL: @ashr_sgt_overflow(
2467; CHECK-NEXT:    ret i1 false
2468;
2469  %s = ashr i8 %x, 1
2470  %c = icmp sgt i8 %s, 63
2471  ret i1 %c
2472}
2473
2474define i1 @lshrult_01_00_exact(i4 %x) {
2475; CHECK-LABEL: @lshrult_01_00_exact(
2476; CHECK-NEXT:    ret i1 false
2477;
2478  %s = lshr exact i4 %x, 1
2479  %c = icmp ult i4 %s, 0
2480  ret i1 %c
2481}
2482
2483define i1 @lshrult_01_01_exact(i4 %x) {
2484; CHECK-LABEL: @lshrult_01_01_exact(
2485; CHECK-NEXT:    [[C:%.*]] = icmp eq i4 [[X:%.*]], 0
2486; CHECK-NEXT:    ret i1 [[C]]
2487;
2488  %s = lshr exact i4 %x, 1
2489  %c = icmp ult i4 %s, 1
2490  ret i1 %c
2491}
2492
2493define i1 @lshrult_01_02_exact(i4 %x) {
2494; CHECK-LABEL: @lshrult_01_02_exact(
2495; CHECK-NEXT:    [[C:%.*]] = icmp ult i4 [[X:%.*]], 4
2496; CHECK-NEXT:    ret i1 [[C]]
2497;
2498  %s = lshr exact i4 %x, 1
2499  %c = icmp ult i4 %s, 2
2500  ret i1 %c
2501}
2502
2503define i1 @lshrult_01_03_exact(i4 %x) {
2504; CHECK-LABEL: @lshrult_01_03_exact(
2505; CHECK-NEXT:    [[C:%.*]] = icmp ult i4 [[X:%.*]], 6
2506; CHECK-NEXT:    ret i1 [[C]]
2507;
2508  %s = lshr exact i4 %x, 1
2509  %c = icmp ult i4 %s, 3
2510  ret i1 %c
2511}
2512
2513define i1 @lshrult_01_04_exact(i4 %x) {
2514; CHECK-LABEL: @lshrult_01_04_exact(
2515; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -1
2516; CHECK-NEXT:    ret i1 [[C]]
2517;
2518  %s = lshr exact i4 %x, 1
2519  %c = icmp ult i4 %s, 4
2520  ret i1 %c
2521}
2522
2523define i1 @lshrult_01_05_exact(i4 %x) {
2524; CHECK-LABEL: @lshrult_01_05_exact(
2525; CHECK-NEXT:    [[C:%.*]] = icmp ult i4 [[X:%.*]], -6
2526; CHECK-NEXT:    ret i1 [[C]]
2527;
2528  %s = lshr exact i4 %x, 1
2529  %c = icmp ult i4 %s, 5
2530  ret i1 %c
2531}
2532
2533define i1 @lshrult_01_06_exact(i4 %x) {
2534; CHECK-LABEL: @lshrult_01_06_exact(
2535; CHECK-NEXT:    [[C:%.*]] = icmp ult i4 [[X:%.*]], -4
2536; CHECK-NEXT:    ret i1 [[C]]
2537;
2538  %s = lshr exact i4 %x, 1
2539  %c = icmp ult i4 %s, 6
2540  ret i1 %c
2541}
2542
2543define i1 @lshrult_01_07_exact(i4 %x) {
2544; CHECK-LABEL: @lshrult_01_07_exact(
2545; CHECK-NEXT:    [[C:%.*]] = icmp ne i4 [[X:%.*]], -2
2546; CHECK-NEXT:    ret i1 [[C]]
2547;
2548  %s = lshr exact i4 %x, 1
2549  %c = icmp ult i4 %s, 7
2550  ret i1 %c
2551}
2552
2553define i1 @lshrult_01_08_exact(i4 %x) {
2554; CHECK-LABEL: @lshrult_01_08_exact(
2555; CHECK-NEXT:    ret i1 true
2556;
2557  %s = lshr exact i4 %x, 1
2558  %c = icmp ult i4 %s, 8
2559  ret i1 %c
2560}
2561
2562define i1 @lshrult_01_09_exact(i4 %x) {
2563; CHECK-LABEL: @lshrult_01_09_exact(
2564; CHECK-NEXT:    ret i1 true
2565;
2566  %s = lshr exact i4 %x, 1
2567  %c = icmp ult i4 %s, 9
2568  ret i1 %c
2569}
2570
2571define i1 @lshrult_01_10_exact(i4 %x) {
2572; CHECK-LABEL: @lshrult_01_10_exact(
2573; CHECK-NEXT:    ret i1 true
2574;
2575  %s = lshr exact i4 %x, 1
2576  %c = icmp ult i4 %s, 10
2577  ret i1 %c
2578}
2579
2580define i1 @lshrult_01_11_exact(i4 %x) {
2581; CHECK-LABEL: @lshrult_01_11_exact(
2582; CHECK-NEXT:    ret i1 true
2583;
2584  %s = lshr exact i4 %x, 1
2585  %c = icmp ult i4 %s, 11
2586  ret i1 %c
2587}
2588
2589define i1 @lshrult_01_12_exact(i4 %x) {
2590; CHECK-LABEL: @lshrult_01_12_exact(
2591; CHECK-NEXT:    ret i1 true
2592;
2593  %s = lshr exact i4 %x, 1
2594  %c = icmp ult i4 %s, 12
2595  ret i1 %c
2596}
2597
2598define i1 @lshrult_01_13_exact(i4 %x) {
2599; CHECK-LABEL: @lshrult_01_13_exact(
2600; CHECK-NEXT:    ret i1 true
2601;
2602  %s = lshr exact i4 %x, 1
2603  %c = icmp ult i4 %s, 13
2604  ret i1 %c
2605}
2606
2607define i1 @lshrult_01_14_exact(i4 %x) {
2608; CHECK-LABEL: @lshrult_01_14_exact(
2609; CHECK-NEXT:    ret i1 true
2610;
2611  %s = lshr exact i4 %x, 1
2612  %c = icmp ult i4 %s, 14
2613  ret i1 %c
2614}
2615
2616define i1 @lshrult_01_15_exact(i4 %x) {
2617; CHECK-LABEL: @lshrult_01_15_exact(
2618; CHECK-NEXT:    ret i1 true
2619;
2620  %s = lshr exact i4 %x, 1
2621  %c = icmp ult i4 %s, 15
2622  ret i1 %c
2623}
2624
2625define i1 @lshrult_02_00_exact(i4 %x) {
2626; CHECK-LABEL: @lshrult_02_00_exact(
2627; CHECK-NEXT:    ret i1 false
2628;
2629  %s = lshr exact i4 %x, 2
2630  %c = icmp ult i4 %s, 0
2631  ret i1 %c
2632}
2633
2634define i1 @lshrult_02_01_exact(i4 %x) {
2635; CHECK-LABEL: @lshrult_02_01_exact(
2636; CHECK-NEXT:    [[C:%.*]] = icmp eq i4 [[X:%.*]], 0
2637; CHECK-NEXT:    ret i1 [[C]]
2638;
2639  %s = lshr exact i4 %x, 2
2640  %c = icmp ult i4 %s, 1
2641  ret i1 %c
2642}
2643
2644define i1 @lshrult_02_02_exact(i4 %x) {
2645; CHECK-LABEL: @lshrult_02_02_exact(
2646; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -1
2647; CHECK-NEXT:    ret i1 [[C]]
2648;
2649  %s = lshr exact i4 %x, 2
2650  %c = icmp ult i4 %s, 2
2651  ret i1 %c
2652}
2653
2654define i1 @lshrult_02_03_exact(i4 %x) {
2655; CHECK-LABEL: @lshrult_02_03_exact(
2656; CHECK-NEXT:    [[C:%.*]] = icmp ne i4 [[X:%.*]], -4
2657; CHECK-NEXT:    ret i1 [[C]]
2658;
2659  %s = lshr exact i4 %x, 2
2660  %c = icmp ult i4 %s, 3
2661  ret i1 %c
2662}
2663
2664define i1 @lshrult_02_04_exact(i4 %x) {
2665; CHECK-LABEL: @lshrult_02_04_exact(
2666; CHECK-NEXT:    ret i1 true
2667;
2668  %s = lshr exact i4 %x, 2
2669  %c = icmp ult i4 %s, 4
2670  ret i1 %c
2671}
2672
2673define i1 @lshrult_02_05_exact(i4 %x) {
2674; CHECK-LABEL: @lshrult_02_05_exact(
2675; CHECK-NEXT:    ret i1 true
2676;
2677  %s = lshr exact i4 %x, 2
2678  %c = icmp ult i4 %s, 5
2679  ret i1 %c
2680}
2681
2682define i1 @lshrult_02_06_exact(i4 %x) {
2683; CHECK-LABEL: @lshrult_02_06_exact(
2684; CHECK-NEXT:    ret i1 true
2685;
2686  %s = lshr exact i4 %x, 2
2687  %c = icmp ult i4 %s, 6
2688  ret i1 %c
2689}
2690
2691define i1 @lshrult_02_07_exact(i4 %x) {
2692; CHECK-LABEL: @lshrult_02_07_exact(
2693; CHECK-NEXT:    ret i1 true
2694;
2695  %s = lshr exact i4 %x, 2
2696  %c = icmp ult i4 %s, 7
2697  ret i1 %c
2698}
2699
2700define i1 @lshrult_02_08_exact(i4 %x) {
2701; CHECK-LABEL: @lshrult_02_08_exact(
2702; CHECK-NEXT:    ret i1 true
2703;
2704  %s = lshr exact i4 %x, 2
2705  %c = icmp ult i4 %s, 8
2706  ret i1 %c
2707}
2708
2709define i1 @lshrult_02_09_exact(i4 %x) {
2710; CHECK-LABEL: @lshrult_02_09_exact(
2711; CHECK-NEXT:    ret i1 true
2712;
2713  %s = lshr exact i4 %x, 2
2714  %c = icmp ult i4 %s, 9
2715  ret i1 %c
2716}
2717
2718define i1 @lshrult_02_10_exact(i4 %x) {
2719; CHECK-LABEL: @lshrult_02_10_exact(
2720; CHECK-NEXT:    ret i1 true
2721;
2722  %s = lshr exact i4 %x, 2
2723  %c = icmp ult i4 %s, 10
2724  ret i1 %c
2725}
2726
2727define i1 @lshrult_02_11_exact(i4 %x) {
2728; CHECK-LABEL: @lshrult_02_11_exact(
2729; CHECK-NEXT:    ret i1 true
2730;
2731  %s = lshr exact i4 %x, 2
2732  %c = icmp ult i4 %s, 11
2733  ret i1 %c
2734}
2735
2736define i1 @lshrult_02_12_exact(i4 %x) {
2737; CHECK-LABEL: @lshrult_02_12_exact(
2738; CHECK-NEXT:    ret i1 true
2739;
2740  %s = lshr exact i4 %x, 2
2741  %c = icmp ult i4 %s, 12
2742  ret i1 %c
2743}
2744
2745define i1 @lshrult_02_13_exact(i4 %x) {
2746; CHECK-LABEL: @lshrult_02_13_exact(
2747; CHECK-NEXT:    ret i1 true
2748;
2749  %s = lshr exact i4 %x, 2
2750  %c = icmp ult i4 %s, 13
2751  ret i1 %c
2752}
2753
2754define i1 @lshrult_02_14_exact(i4 %x) {
2755; CHECK-LABEL: @lshrult_02_14_exact(
2756; CHECK-NEXT:    ret i1 true
2757;
2758  %s = lshr exact i4 %x, 2
2759  %c = icmp ult i4 %s, 14
2760  ret i1 %c
2761}
2762
2763define i1 @lshrult_02_15_exact(i4 %x) {
2764; CHECK-LABEL: @lshrult_02_15_exact(
2765; CHECK-NEXT:    ret i1 true
2766;
2767  %s = lshr exact i4 %x, 2
2768  %c = icmp ult i4 %s, 15
2769  ret i1 %c
2770}
2771
2772define i1 @lshrult_03_00_exact(i4 %x) {
2773; CHECK-LABEL: @lshrult_03_00_exact(
2774; CHECK-NEXT:    ret i1 false
2775;
2776  %s = lshr exact i4 %x, 3
2777  %c = icmp ult i4 %s, 0
2778  ret i1 %c
2779}
2780
2781define i1 @lshrult_03_01_exact(i4 %x) {
2782; CHECK-LABEL: @lshrult_03_01_exact(
2783; CHECK-NEXT:    [[C:%.*]] = icmp eq i4 [[X:%.*]], 0
2784; CHECK-NEXT:    ret i1 [[C]]
2785;
2786  %s = lshr exact i4 %x, 3
2787  %c = icmp ult i4 %s, 1
2788  ret i1 %c
2789}
2790
2791define i1 @lshrult_03_02_exact(i4 %x) {
2792; CHECK-LABEL: @lshrult_03_02_exact(
2793; CHECK-NEXT:    ret i1 true
2794;
2795  %s = lshr exact i4 %x, 3
2796  %c = icmp ult i4 %s, 2
2797  ret i1 %c
2798}
2799
2800define i1 @lshrult_03_03_exact(i4 %x) {
2801; CHECK-LABEL: @lshrult_03_03_exact(
2802; CHECK-NEXT:    ret i1 true
2803;
2804  %s = lshr exact i4 %x, 3
2805  %c = icmp ult i4 %s, 3
2806  ret i1 %c
2807}
2808
2809define i1 @lshrult_03_04_exact(i4 %x) {
2810; CHECK-LABEL: @lshrult_03_04_exact(
2811; CHECK-NEXT:    ret i1 true
2812;
2813  %s = lshr exact i4 %x, 3
2814  %c = icmp ult i4 %s, 4
2815  ret i1 %c
2816}
2817
2818define i1 @lshrult_03_05_exact(i4 %x) {
2819; CHECK-LABEL: @lshrult_03_05_exact(
2820; CHECK-NEXT:    ret i1 true
2821;
2822  %s = lshr exact i4 %x, 3
2823  %c = icmp ult i4 %s, 5
2824  ret i1 %c
2825}
2826
2827define i1 @lshrult_03_06_exact(i4 %x) {
2828; CHECK-LABEL: @lshrult_03_06_exact(
2829; CHECK-NEXT:    ret i1 true
2830;
2831  %s = lshr exact i4 %x, 3
2832  %c = icmp ult i4 %s, 6
2833  ret i1 %c
2834}
2835
2836define i1 @lshrult_03_07_exact(i4 %x) {
2837; CHECK-LABEL: @lshrult_03_07_exact(
2838; CHECK-NEXT:    ret i1 true
2839;
2840  %s = lshr exact i4 %x, 3
2841  %c = icmp ult i4 %s, 7
2842  ret i1 %c
2843}
2844
2845define i1 @lshrult_03_08_exact(i4 %x) {
2846; CHECK-LABEL: @lshrult_03_08_exact(
2847; CHECK-NEXT:    ret i1 true
2848;
2849  %s = lshr exact i4 %x, 3
2850  %c = icmp ult i4 %s, 8
2851  ret i1 %c
2852}
2853
2854define i1 @lshrult_03_09_exact(i4 %x) {
2855; CHECK-LABEL: @lshrult_03_09_exact(
2856; CHECK-NEXT:    ret i1 true
2857;
2858  %s = lshr exact i4 %x, 3
2859  %c = icmp ult i4 %s, 9
2860  ret i1 %c
2861}
2862
2863define i1 @lshrult_03_10_exact(i4 %x) {
2864; CHECK-LABEL: @lshrult_03_10_exact(
2865; CHECK-NEXT:    ret i1 true
2866;
2867  %s = lshr exact i4 %x, 3
2868  %c = icmp ult i4 %s, 10
2869  ret i1 %c
2870}
2871
2872define i1 @lshrult_03_11_exact(i4 %x) {
2873; CHECK-LABEL: @lshrult_03_11_exact(
2874; CHECK-NEXT:    ret i1 true
2875;
2876  %s = lshr exact i4 %x, 3
2877  %c = icmp ult i4 %s, 11
2878  ret i1 %c
2879}
2880
2881define i1 @lshrult_03_12_exact(i4 %x) {
2882; CHECK-LABEL: @lshrult_03_12_exact(
2883; CHECK-NEXT:    ret i1 true
2884;
2885  %s = lshr exact i4 %x, 3
2886  %c = icmp ult i4 %s, 12
2887  ret i1 %c
2888}
2889
2890define i1 @lshrult_03_13_exact(i4 %x) {
2891; CHECK-LABEL: @lshrult_03_13_exact(
2892; CHECK-NEXT:    ret i1 true
2893;
2894  %s = lshr exact i4 %x, 3
2895  %c = icmp ult i4 %s, 13
2896  ret i1 %c
2897}
2898
2899define i1 @lshrult_03_14_exact(i4 %x) {
2900; CHECK-LABEL: @lshrult_03_14_exact(
2901; CHECK-NEXT:    ret i1 true
2902;
2903  %s = lshr exact i4 %x, 3
2904  %c = icmp ult i4 %s, 14
2905  ret i1 %c
2906}
2907
2908define i1 @lshrult_03_15_exact(i4 %x) {
2909; CHECK-LABEL: @lshrult_03_15_exact(
2910; CHECK-NEXT:    ret i1 true
2911;
2912  %s = lshr exact i4 %x, 3
2913  %c = icmp ult i4 %s, 15
2914  ret i1 %c
2915}
2916
2917define i1 @ashrsgt_01_00_exact(i4 %x) {
2918; CHECK-LABEL: @ashrsgt_01_00_exact(
2919; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], 0
2920; CHECK-NEXT:    ret i1 [[C]]
2921;
2922  %s = ashr exact i4 %x, 1
2923  %c = icmp sgt i4 %s, 0
2924  ret i1 %c
2925}
2926
2927define i1 @ashrsgt_01_01_exact(i4 %x) {
2928; CHECK-LABEL: @ashrsgt_01_01_exact(
2929; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], 2
2930; CHECK-NEXT:    ret i1 [[C]]
2931;
2932  %s = ashr exact i4 %x, 1
2933  %c = icmp sgt i4 %s, 1
2934  ret i1 %c
2935}
2936
2937define i1 @ashrsgt_01_02_exact(i4 %x) {
2938; CHECK-LABEL: @ashrsgt_01_02_exact(
2939; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], 4
2940; CHECK-NEXT:    ret i1 [[C]]
2941;
2942  %s = ashr exact i4 %x, 1
2943  %c = icmp sgt i4 %s, 2
2944  ret i1 %c
2945}
2946
2947define i1 @ashrsgt_01_03_exact(i4 %x) {
2948; CHECK-LABEL: @ashrsgt_01_03_exact(
2949; CHECK-NEXT:    ret i1 false
2950;
2951  %s = ashr exact i4 %x, 1
2952  %c = icmp sgt i4 %s, 3
2953  ret i1 %c
2954}
2955
2956define i1 @ashrsgt_01_04_exact(i4 %x) {
2957; CHECK-LABEL: @ashrsgt_01_04_exact(
2958; CHECK-NEXT:    ret i1 false
2959;
2960  %s = ashr exact i4 %x, 1
2961  %c = icmp sgt i4 %s, 4
2962  ret i1 %c
2963}
2964
2965define i1 @ashrsgt_01_05_exact(i4 %x) {
2966; CHECK-LABEL: @ashrsgt_01_05_exact(
2967; CHECK-NEXT:    ret i1 false
2968;
2969  %s = ashr exact i4 %x, 1
2970  %c = icmp sgt i4 %s, 5
2971  ret i1 %c
2972}
2973
2974define i1 @ashrsgt_01_06_exact(i4 %x) {
2975; CHECK-LABEL: @ashrsgt_01_06_exact(
2976; CHECK-NEXT:    ret i1 false
2977;
2978  %s = ashr exact i4 %x, 1
2979  %c = icmp sgt i4 %s, 6
2980  ret i1 %c
2981}
2982
2983define i1 @ashrsgt_01_07_exact(i4 %x) {
2984; CHECK-LABEL: @ashrsgt_01_07_exact(
2985; CHECK-NEXT:    ret i1 false
2986;
2987  %s = ashr exact i4 %x, 1
2988  %c = icmp sgt i4 %s, 7
2989  ret i1 %c
2990}
2991
2992define i1 @ashrsgt_01_08_exact(i4 %x) {
2993; CHECK-LABEL: @ashrsgt_01_08_exact(
2994; CHECK-NEXT:    ret i1 true
2995;
2996  %s = ashr exact i4 %x, 1
2997  %c = icmp sgt i4 %s, 8
2998  ret i1 %c
2999}
3000
3001define i1 @ashrsgt_01_09_exact(i4 %x) {
3002; CHECK-LABEL: @ashrsgt_01_09_exact(
3003; CHECK-NEXT:    ret i1 true
3004;
3005  %s = ashr exact i4 %x, 1
3006  %c = icmp sgt i4 %s, 9
3007  ret i1 %c
3008}
3009
3010define i1 @ashrsgt_01_10_exact(i4 %x) {
3011; CHECK-LABEL: @ashrsgt_01_10_exact(
3012; CHECK-NEXT:    ret i1 true
3013;
3014  %s = ashr exact i4 %x, 1
3015  %c = icmp sgt i4 %s, 10
3016  ret i1 %c
3017}
3018
3019define i1 @ashrsgt_01_11_exact(i4 %x) {
3020; CHECK-LABEL: @ashrsgt_01_11_exact(
3021; CHECK-NEXT:    ret i1 true
3022;
3023  %s = ashr exact i4 %x, 1
3024  %c = icmp sgt i4 %s, 11
3025  ret i1 %c
3026}
3027
3028define i1 @ashrsgt_01_12_exact(i4 %x) {
3029; CHECK-LABEL: @ashrsgt_01_12_exact(
3030; CHECK-NEXT:    [[C:%.*]] = icmp ne i4 [[X:%.*]], -8
3031; CHECK-NEXT:    ret i1 [[C]]
3032;
3033  %s = ashr exact i4 %x, 1
3034  %c = icmp sgt i4 %s, 12
3035  ret i1 %c
3036}
3037
3038define i1 @ashrsgt_01_13_exact(i4 %x) {
3039; CHECK-LABEL: @ashrsgt_01_13_exact(
3040; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -6
3041; CHECK-NEXT:    ret i1 [[C]]
3042;
3043  %s = ashr exact i4 %x, 1
3044  %c = icmp sgt i4 %s, 13
3045  ret i1 %c
3046}
3047
3048define i1 @ashrsgt_01_14_exact(i4 %x) {
3049; CHECK-LABEL: @ashrsgt_01_14_exact(
3050; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -4
3051; CHECK-NEXT:    ret i1 [[C]]
3052;
3053  %s = ashr exact i4 %x, 1
3054  %c = icmp sgt i4 %s, 14
3055  ret i1 %c
3056}
3057
3058define i1 @ashrsgt_01_15_exact(i4 %x) {
3059; CHECK-LABEL: @ashrsgt_01_15_exact(
3060; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -1
3061; CHECK-NEXT:    ret i1 [[C]]
3062;
3063  %s = ashr exact i4 %x, 1
3064  %c = icmp sgt i4 %s, 15
3065  ret i1 %c
3066}
3067
3068define i1 @ashrsgt_02_00_exact(i4 %x) {
3069; CHECK-LABEL: @ashrsgt_02_00_exact(
3070; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], 0
3071; CHECK-NEXT:    ret i1 [[C]]
3072;
3073  %s = ashr exact i4 %x, 2
3074  %c = icmp sgt i4 %s, 0
3075  ret i1 %c
3076}
3077
3078define i1 @ashrsgt_02_01_exact(i4 %x) {
3079; CHECK-LABEL: @ashrsgt_02_01_exact(
3080; CHECK-NEXT:    ret i1 false
3081;
3082  %s = ashr exact i4 %x, 2
3083  %c = icmp sgt i4 %s, 1
3084  ret i1 %c
3085}
3086
3087define i1 @ashrsgt_02_02_exact(i4 %x) {
3088; CHECK-LABEL: @ashrsgt_02_02_exact(
3089; CHECK-NEXT:    ret i1 false
3090;
3091  %s = ashr exact i4 %x, 2
3092  %c = icmp sgt i4 %s, 2
3093  ret i1 %c
3094}
3095
3096define i1 @ashrsgt_02_03_exact(i4 %x) {
3097; CHECK-LABEL: @ashrsgt_02_03_exact(
3098; CHECK-NEXT:    ret i1 false
3099;
3100  %s = ashr exact i4 %x, 2
3101  %c = icmp sgt i4 %s, 3
3102  ret i1 %c
3103}
3104
3105define i1 @ashrsgt_02_04_exact(i4 %x) {
3106; CHECK-LABEL: @ashrsgt_02_04_exact(
3107; CHECK-NEXT:    ret i1 false
3108;
3109  %s = ashr exact i4 %x, 2
3110  %c = icmp sgt i4 %s, 4
3111  ret i1 %c
3112}
3113
3114define i1 @ashrsgt_02_05_exact(i4 %x) {
3115; CHECK-LABEL: @ashrsgt_02_05_exact(
3116; CHECK-NEXT:    ret i1 false
3117;
3118  %s = ashr exact i4 %x, 2
3119  %c = icmp sgt i4 %s, 5
3120  ret i1 %c
3121}
3122
3123define i1 @ashrsgt_02_06_exact(i4 %x) {
3124; CHECK-LABEL: @ashrsgt_02_06_exact(
3125; CHECK-NEXT:    ret i1 false
3126;
3127  %s = ashr exact i4 %x, 2
3128  %c = icmp sgt i4 %s, 6
3129  ret i1 %c
3130}
3131
3132define i1 @ashrsgt_02_07_exact(i4 %x) {
3133; CHECK-LABEL: @ashrsgt_02_07_exact(
3134; CHECK-NEXT:    ret i1 false
3135;
3136  %s = ashr exact i4 %x, 2
3137  %c = icmp sgt i4 %s, 7
3138  ret i1 %c
3139}
3140
3141define i1 @ashrsgt_02_08_exact(i4 %x) {
3142; CHECK-LABEL: @ashrsgt_02_08_exact(
3143; CHECK-NEXT:    ret i1 true
3144;
3145  %s = ashr exact i4 %x, 2
3146  %c = icmp sgt i4 %s, 8
3147  ret i1 %c
3148}
3149
3150define i1 @ashrsgt_02_09_exact(i4 %x) {
3151; CHECK-LABEL: @ashrsgt_02_09_exact(
3152; CHECK-NEXT:    ret i1 true
3153;
3154  %s = ashr exact i4 %x, 2
3155  %c = icmp sgt i4 %s, 9
3156  ret i1 %c
3157}
3158
3159define i1 @ashrsgt_02_10_exact(i4 %x) {
3160; CHECK-LABEL: @ashrsgt_02_10_exact(
3161; CHECK-NEXT:    ret i1 true
3162;
3163  %s = ashr exact i4 %x, 2
3164  %c = icmp sgt i4 %s, 10
3165  ret i1 %c
3166}
3167
3168define i1 @ashrsgt_02_11_exact(i4 %x) {
3169; CHECK-LABEL: @ashrsgt_02_11_exact(
3170; CHECK-NEXT:    ret i1 true
3171;
3172  %s = ashr exact i4 %x, 2
3173  %c = icmp sgt i4 %s, 11
3174  ret i1 %c
3175}
3176
3177define i1 @ashrsgt_02_12_exact(i4 %x) {
3178; CHECK-LABEL: @ashrsgt_02_12_exact(
3179; CHECK-NEXT:    ret i1 true
3180;
3181  %s = ashr exact i4 %x, 2
3182  %c = icmp sgt i4 %s, 12
3183  ret i1 %c
3184}
3185
3186define i1 @ashrsgt_02_13_exact(i4 %x) {
3187; CHECK-LABEL: @ashrsgt_02_13_exact(
3188; CHECK-NEXT:    ret i1 true
3189;
3190  %s = ashr exact i4 %x, 2
3191  %c = icmp sgt i4 %s, 13
3192  ret i1 %c
3193}
3194
3195define i1 @ashrsgt_02_14_exact(i4 %x) {
3196; CHECK-LABEL: @ashrsgt_02_14_exact(
3197; CHECK-NEXT:    [[C:%.*]] = icmp ne i4 [[X:%.*]], -8
3198; CHECK-NEXT:    ret i1 [[C]]
3199;
3200  %s = ashr exact i4 %x, 2
3201  %c = icmp sgt i4 %s, 14
3202  ret i1 %c
3203}
3204
3205define i1 @ashrsgt_02_15_exact(i4 %x) {
3206; CHECK-LABEL: @ashrsgt_02_15_exact(
3207; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -1
3208; CHECK-NEXT:    ret i1 [[C]]
3209;
3210  %s = ashr exact i4 %x, 2
3211  %c = icmp sgt i4 %s, 15
3212  ret i1 %c
3213}
3214
3215define i1 @ashrsgt_03_00_exact(i4 %x) {
3216; CHECK-LABEL: @ashrsgt_03_00_exact(
3217; CHECK-NEXT:    ret i1 false
3218;
3219  %s = ashr exact i4 %x, 3
3220  %c = icmp sgt i4 %s, 0
3221  ret i1 %c
3222}
3223
3224define i1 @ashrsgt_03_01_exact(i4 %x) {
3225; CHECK-LABEL: @ashrsgt_03_01_exact(
3226; CHECK-NEXT:    ret i1 false
3227;
3228  %s = ashr exact i4 %x, 3
3229  %c = icmp sgt i4 %s, 1
3230  ret i1 %c
3231}
3232
3233define i1 @ashrsgt_03_02_exact(i4 %x) {
3234; CHECK-LABEL: @ashrsgt_03_02_exact(
3235; CHECK-NEXT:    ret i1 false
3236;
3237  %s = ashr exact i4 %x, 3
3238  %c = icmp sgt i4 %s, 2
3239  ret i1 %c
3240}
3241
3242define i1 @ashrsgt_03_03_exact(i4 %x) {
3243; CHECK-LABEL: @ashrsgt_03_03_exact(
3244; CHECK-NEXT:    ret i1 false
3245;
3246  %s = ashr exact i4 %x, 3
3247  %c = icmp sgt i4 %s, 3
3248  ret i1 %c
3249}
3250
3251define i1 @ashrsgt_03_04_exact(i4 %x) {
3252; CHECK-LABEL: @ashrsgt_03_04_exact(
3253; CHECK-NEXT:    ret i1 false
3254;
3255  %s = ashr exact i4 %x, 3
3256  %c = icmp sgt i4 %s, 4
3257  ret i1 %c
3258}
3259
3260define i1 @ashrsgt_03_05_exact(i4 %x) {
3261; CHECK-LABEL: @ashrsgt_03_05_exact(
3262; CHECK-NEXT:    ret i1 false
3263;
3264  %s = ashr exact i4 %x, 3
3265  %c = icmp sgt i4 %s, 5
3266  ret i1 %c
3267}
3268
3269define i1 @ashrsgt_03_06_exact(i4 %x) {
3270; CHECK-LABEL: @ashrsgt_03_06_exact(
3271; CHECK-NEXT:    ret i1 false
3272;
3273  %s = ashr exact i4 %x, 3
3274  %c = icmp sgt i4 %s, 6
3275  ret i1 %c
3276}
3277
3278define i1 @ashrsgt_03_07_exact(i4 %x) {
3279; CHECK-LABEL: @ashrsgt_03_07_exact(
3280; CHECK-NEXT:    ret i1 false
3281;
3282  %s = ashr exact i4 %x, 3
3283  %c = icmp sgt i4 %s, 7
3284  ret i1 %c
3285}
3286
3287define i1 @ashrsgt_03_08_exact(i4 %x) {
3288; CHECK-LABEL: @ashrsgt_03_08_exact(
3289; CHECK-NEXT:    ret i1 true
3290;
3291  %s = ashr exact i4 %x, 3
3292  %c = icmp sgt i4 %s, 8
3293  ret i1 %c
3294}
3295
3296define i1 @ashrsgt_03_09_exact(i4 %x) {
3297; CHECK-LABEL: @ashrsgt_03_09_exact(
3298; CHECK-NEXT:    ret i1 true
3299;
3300  %s = ashr exact i4 %x, 3
3301  %c = icmp sgt i4 %s, 9
3302  ret i1 %c
3303}
3304
3305define i1 @ashrsgt_03_10_exact(i4 %x) {
3306; CHECK-LABEL: @ashrsgt_03_10_exact(
3307; CHECK-NEXT:    ret i1 true
3308;
3309  %s = ashr exact i4 %x, 3
3310  %c = icmp sgt i4 %s, 10
3311  ret i1 %c
3312}
3313
3314define i1 @ashrsgt_03_11_exact(i4 %x) {
3315; CHECK-LABEL: @ashrsgt_03_11_exact(
3316; CHECK-NEXT:    ret i1 true
3317;
3318  %s = ashr exact i4 %x, 3
3319  %c = icmp sgt i4 %s, 11
3320  ret i1 %c
3321}
3322
3323define i1 @ashrsgt_03_12_exact(i4 %x) {
3324; CHECK-LABEL: @ashrsgt_03_12_exact(
3325; CHECK-NEXT:    ret i1 true
3326;
3327  %s = ashr exact i4 %x, 3
3328  %c = icmp sgt i4 %s, 12
3329  ret i1 %c
3330}
3331
3332define i1 @ashrsgt_03_13_exact(i4 %x) {
3333; CHECK-LABEL: @ashrsgt_03_13_exact(
3334; CHECK-NEXT:    ret i1 true
3335;
3336  %s = ashr exact i4 %x, 3
3337  %c = icmp sgt i4 %s, 13
3338  ret i1 %c
3339}
3340
3341define i1 @ashrsgt_03_14_exact(i4 %x) {
3342; CHECK-LABEL: @ashrsgt_03_14_exact(
3343; CHECK-NEXT:    ret i1 true
3344;
3345  %s = ashr exact i4 %x, 3
3346  %c = icmp sgt i4 %s, 14
3347  ret i1 %c
3348}
3349
3350define i1 @ashrsgt_03_15_exact(i4 %x) {
3351; CHECK-LABEL: @ashrsgt_03_15_exact(
3352; CHECK-NEXT:    [[C:%.*]] = icmp sgt i4 [[X:%.*]], -1
3353; CHECK-NEXT:    ret i1 [[C]]
3354;
3355  %s = ashr exact i4 %x, 3
3356  %c = icmp sgt i4 %s, 15
3357  ret i1 %c
3358}
3359
3360define i1 @ashrslt_01_00_exact(i4 %x) {
3361; CHECK-LABEL: @ashrslt_01_00_exact(
3362; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 0
3363; CHECK-NEXT:    ret i1 [[C]]
3364;
3365  %s = ashr exact i4 %x, 1
3366  %c = icmp slt i4 %s, 0
3367  ret i1 %c
3368}
3369
3370define i1 @ashrslt_01_01_exact(i4 %x) {
3371; CHECK-LABEL: @ashrslt_01_01_exact(
3372; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 2
3373; CHECK-NEXT:    ret i1 [[C]]
3374;
3375  %s = ashr exact i4 %x, 1
3376  %c = icmp slt i4 %s, 1
3377  ret i1 %c
3378}
3379
3380define i1 @ashrslt_01_02_exact(i4 %x) {
3381; CHECK-LABEL: @ashrslt_01_02_exact(
3382; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 3
3383; CHECK-NEXT:    ret i1 [[C]]
3384;
3385  %s = ashr exact i4 %x, 1
3386  %c = icmp slt i4 %s, 2
3387  ret i1 %c
3388}
3389
3390define i1 @ashrslt_01_03_exact(i4 %x) {
3391; CHECK-LABEL: @ashrslt_01_03_exact(
3392; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 5
3393; CHECK-NEXT:    ret i1 [[C]]
3394;
3395  %s = ashr exact i4 %x, 1
3396  %c = icmp slt i4 %s, 3
3397  ret i1 %c
3398}
3399
3400define i1 @ashrslt_01_04_exact(i4 %x) {
3401; CHECK-LABEL: @ashrslt_01_04_exact(
3402; CHECK-NEXT:    ret i1 true
3403;
3404  %s = ashr exact i4 %x, 1
3405  %c = icmp slt i4 %s, 4
3406  ret i1 %c
3407}
3408
3409define i1 @ashrslt_01_05_exact(i4 %x) {
3410; CHECK-LABEL: @ashrslt_01_05_exact(
3411; CHECK-NEXT:    ret i1 true
3412;
3413  %s = ashr exact i4 %x, 1
3414  %c = icmp slt i4 %s, 5
3415  ret i1 %c
3416}
3417
3418define i1 @ashrslt_01_06_exact(i4 %x) {
3419; CHECK-LABEL: @ashrslt_01_06_exact(
3420; CHECK-NEXT:    ret i1 true
3421;
3422  %s = ashr exact i4 %x, 1
3423  %c = icmp slt i4 %s, 6
3424  ret i1 %c
3425}
3426
3427define i1 @ashrslt_01_07_exact(i4 %x) {
3428; CHECK-LABEL: @ashrslt_01_07_exact(
3429; CHECK-NEXT:    ret i1 true
3430;
3431  %s = ashr exact i4 %x, 1
3432  %c = icmp slt i4 %s, 7
3433  ret i1 %c
3434}
3435
3436define i1 @ashrslt_01_08_exact(i4 %x) {
3437; CHECK-LABEL: @ashrslt_01_08_exact(
3438; CHECK-NEXT:    ret i1 false
3439;
3440  %s = ashr exact i4 %x, 1
3441  %c = icmp slt i4 %s, 8
3442  ret i1 %c
3443}
3444
3445define i1 @ashrslt_01_09_exact(i4 %x) {
3446; CHECK-LABEL: @ashrslt_01_09_exact(
3447; CHECK-NEXT:    ret i1 false
3448;
3449  %s = ashr exact i4 %x, 1
3450  %c = icmp slt i4 %s, 9
3451  ret i1 %c
3452}
3453
3454define i1 @ashrslt_01_10_exact(i4 %x) {
3455; CHECK-LABEL: @ashrslt_01_10_exact(
3456; CHECK-NEXT:    ret i1 false
3457;
3458  %s = ashr exact i4 %x, 1
3459  %c = icmp slt i4 %s, 10
3460  ret i1 %c
3461}
3462
3463define i1 @ashrslt_01_11_exact(i4 %x) {
3464; CHECK-LABEL: @ashrslt_01_11_exact(
3465; CHECK-NEXT:    ret i1 false
3466;
3467  %s = ashr exact i4 %x, 1
3468  %c = icmp slt i4 %s, 11
3469  ret i1 %c
3470}
3471
3472define i1 @ashrslt_01_12_exact(i4 %x) {
3473; CHECK-LABEL: @ashrslt_01_12_exact(
3474; CHECK-NEXT:    ret i1 false
3475;
3476  %s = ashr exact i4 %x, 1
3477  %c = icmp slt i4 %s, 12
3478  ret i1 %c
3479}
3480
3481define i1 @ashrslt_01_13_exact(i4 %x) {
3482; CHECK-LABEL: @ashrslt_01_13_exact(
3483; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], -6
3484; CHECK-NEXT:    ret i1 [[C]]
3485;
3486  %s = ashr exact i4 %x, 1
3487  %c = icmp slt i4 %s, 13
3488  ret i1 %c
3489}
3490
3491define i1 @ashrslt_01_14_exact(i4 %x) {
3492; CHECK-LABEL: @ashrslt_01_14_exact(
3493; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], -4
3494; CHECK-NEXT:    ret i1 [[C]]
3495;
3496  %s = ashr exact i4 %x, 1
3497  %c = icmp slt i4 %s, 14
3498  ret i1 %c
3499}
3500
3501define i1 @ashrslt_01_15_exact(i4 %x) {
3502; CHECK-LABEL: @ashrslt_01_15_exact(
3503; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], -2
3504; CHECK-NEXT:    ret i1 [[C]]
3505;
3506  %s = ashr exact i4 %x, 1
3507  %c = icmp slt i4 %s, 15
3508  ret i1 %c
3509}
3510
3511define i1 @ashrslt_02_00_exact(i4 %x) {
3512; CHECK-LABEL: @ashrslt_02_00_exact(
3513; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 0
3514; CHECK-NEXT:    ret i1 [[C]]
3515;
3516  %s = ashr exact i4 %x, 2
3517  %c = icmp slt i4 %s, 0
3518  ret i1 %c
3519}
3520
3521define i1 @ashrslt_02_01_exact(i4 %x) {
3522; CHECK-LABEL: @ashrslt_02_01_exact(
3523; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 4
3524; CHECK-NEXT:    ret i1 [[C]]
3525;
3526  %s = ashr exact i4 %x, 2
3527  %c = icmp slt i4 %s, 1
3528  ret i1 %c
3529}
3530
3531define i1 @ashrslt_02_02_exact(i4 %x) {
3532; CHECK-LABEL: @ashrslt_02_02_exact(
3533; CHECK-NEXT:    ret i1 true
3534;
3535  %s = ashr exact i4 %x, 2
3536  %c = icmp slt i4 %s, 2
3537  ret i1 %c
3538}
3539
3540define i1 @ashrslt_02_03_exact(i4 %x) {
3541; CHECK-LABEL: @ashrslt_02_03_exact(
3542; CHECK-NEXT:    ret i1 true
3543;
3544  %s = ashr exact i4 %x, 2
3545  %c = icmp slt i4 %s, 3
3546  ret i1 %c
3547}
3548
3549define i1 @ashrslt_02_04_exact(i4 %x) {
3550; CHECK-LABEL: @ashrslt_02_04_exact(
3551; CHECK-NEXT:    ret i1 true
3552;
3553  %s = ashr exact i4 %x, 2
3554  %c = icmp slt i4 %s, 4
3555  ret i1 %c
3556}
3557
3558define i1 @ashrslt_02_05_exact(i4 %x) {
3559; CHECK-LABEL: @ashrslt_02_05_exact(
3560; CHECK-NEXT:    ret i1 true
3561;
3562  %s = ashr exact i4 %x, 2
3563  %c = icmp slt i4 %s, 5
3564  ret i1 %c
3565}
3566
3567define i1 @ashrslt_02_06_exact(i4 %x) {
3568; CHECK-LABEL: @ashrslt_02_06_exact(
3569; CHECK-NEXT:    ret i1 true
3570;
3571  %s = ashr exact i4 %x, 2
3572  %c = icmp slt i4 %s, 6
3573  ret i1 %c
3574}
3575
3576define i1 @ashrslt_02_07_exact(i4 %x) {
3577; CHECK-LABEL: @ashrslt_02_07_exact(
3578; CHECK-NEXT:    ret i1 true
3579;
3580  %s = ashr exact i4 %x, 2
3581  %c = icmp slt i4 %s, 7
3582  ret i1 %c
3583}
3584
3585define i1 @ashrslt_02_08_exact(i4 %x) {
3586; CHECK-LABEL: @ashrslt_02_08_exact(
3587; CHECK-NEXT:    ret i1 false
3588;
3589  %s = ashr exact i4 %x, 2
3590  %c = icmp slt i4 %s, 8
3591  ret i1 %c
3592}
3593
3594define i1 @ashrslt_02_09_exact(i4 %x) {
3595; CHECK-LABEL: @ashrslt_02_09_exact(
3596; CHECK-NEXT:    ret i1 false
3597;
3598  %s = ashr exact i4 %x, 2
3599  %c = icmp slt i4 %s, 9
3600  ret i1 %c
3601}
3602
3603define i1 @ashrslt_02_10_exact(i4 %x) {
3604; CHECK-LABEL: @ashrslt_02_10_exact(
3605; CHECK-NEXT:    ret i1 false
3606;
3607  %s = ashr exact i4 %x, 2
3608  %c = icmp slt i4 %s, 10
3609  ret i1 %c
3610}
3611
3612define i1 @ashrslt_02_11_exact(i4 %x) {
3613; CHECK-LABEL: @ashrslt_02_11_exact(
3614; CHECK-NEXT:    ret i1 false
3615;
3616  %s = ashr exact i4 %x, 2
3617  %c = icmp slt i4 %s, 11
3618  ret i1 %c
3619}
3620
3621define i1 @ashrslt_02_12_exact(i4 %x) {
3622; CHECK-LABEL: @ashrslt_02_12_exact(
3623; CHECK-NEXT:    ret i1 false
3624;
3625  %s = ashr exact i4 %x, 2
3626  %c = icmp slt i4 %s, 12
3627  ret i1 %c
3628}
3629
3630define i1 @ashrslt_02_13_exact(i4 %x) {
3631; CHECK-LABEL: @ashrslt_02_13_exact(
3632; CHECK-NEXT:    ret i1 false
3633;
3634  %s = ashr exact i4 %x, 2
3635  %c = icmp slt i4 %s, 13
3636  ret i1 %c
3637}
3638
3639define i1 @ashrslt_02_14_exact(i4 %x) {
3640; CHECK-LABEL: @ashrslt_02_14_exact(
3641; CHECK-NEXT:    ret i1 false
3642;
3643  %s = ashr exact i4 %x, 2
3644  %c = icmp slt i4 %s, 14
3645  ret i1 %c
3646}
3647
3648define i1 @ashrslt_02_15_exact(i4 %x) {
3649; CHECK-LABEL: @ashrslt_02_15_exact(
3650; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], -4
3651; CHECK-NEXT:    ret i1 [[C]]
3652;
3653  %s = ashr exact i4 %x, 2
3654  %c = icmp slt i4 %s, 15
3655  ret i1 %c
3656}
3657
3658define i1 @ashrslt_03_00_exact(i4 %x) {
3659; CHECK-LABEL: @ashrslt_03_00_exact(
3660; CHECK-NEXT:    [[C:%.*]] = icmp slt i4 [[X:%.*]], 0
3661; CHECK-NEXT:    ret i1 [[C]]
3662;
3663  %s = ashr exact i4 %x, 3
3664  %c = icmp slt i4 %s, 0
3665  ret i1 %c
3666}
3667
3668define i1 @ashrslt_03_01_exact(i4 %x) {
3669; CHECK-LABEL: @ashrslt_03_01_exact(
3670; CHECK-NEXT:    ret i1 true
3671;
3672  %s = ashr exact i4 %x, 3
3673  %c = icmp slt i4 %s, 1
3674  ret i1 %c
3675}
3676
3677define i1 @ashrslt_03_02_exact(i4 %x) {
3678; CHECK-LABEL: @ashrslt_03_02_exact(
3679; CHECK-NEXT:    ret i1 true
3680;
3681  %s = ashr exact i4 %x, 3
3682  %c = icmp slt i4 %s, 2
3683  ret i1 %c
3684}
3685
3686define i1 @ashrslt_03_03_exact(i4 %x) {
3687; CHECK-LABEL: @ashrslt_03_03_exact(
3688; CHECK-NEXT:    ret i1 true
3689;
3690  %s = ashr exact i4 %x, 3
3691  %c = icmp slt i4 %s, 3
3692  ret i1 %c
3693}
3694
3695define i1 @ashrslt_03_04_exact(i4 %x) {
3696; CHECK-LABEL: @ashrslt_03_04_exact(
3697; CHECK-NEXT:    ret i1 true
3698;
3699  %s = ashr exact i4 %x, 3
3700  %c = icmp slt i4 %s, 4
3701  ret i1 %c
3702}
3703
3704define i1 @ashrslt_03_05_exact(i4 %x) {
3705; CHECK-LABEL: @ashrslt_03_05_exact(
3706; CHECK-NEXT:    ret i1 true
3707;
3708  %s = ashr exact i4 %x, 3
3709  %c = icmp slt i4 %s, 5
3710  ret i1 %c
3711}
3712
3713define i1 @ashrslt_03_06_exact(i4 %x) {
3714; CHECK-LABEL: @ashrslt_03_06_exact(
3715; CHECK-NEXT:    ret i1 true
3716;
3717  %s = ashr exact i4 %x, 3
3718  %c = icmp slt i4 %s, 6
3719  ret i1 %c
3720}
3721
3722define i1 @ashrslt_03_07_exact(i4 %x) {
3723; CHECK-LABEL: @ashrslt_03_07_exact(
3724; CHECK-NEXT:    ret i1 true
3725;
3726  %s = ashr exact i4 %x, 3
3727  %c = icmp slt i4 %s, 7
3728  ret i1 %c
3729}
3730
3731define i1 @ashrslt_03_08_exact(i4 %x) {
3732; CHECK-LABEL: @ashrslt_03_08_exact(
3733; CHECK-NEXT:    ret i1 false
3734;
3735  %s = ashr exact i4 %x, 3
3736  %c = icmp slt i4 %s, 8
3737  ret i1 %c
3738}
3739
3740define i1 @ashrslt_03_09_exact(i4 %x) {
3741; CHECK-LABEL: @ashrslt_03_09_exact(
3742; CHECK-NEXT:    ret i1 false
3743;
3744  %s = ashr exact i4 %x, 3
3745  %c = icmp slt i4 %s, 9
3746  ret i1 %c
3747}
3748
3749define i1 @ashrslt_03_10_exact(i4 %x) {
3750; CHECK-LABEL: @ashrslt_03_10_exact(
3751; CHECK-NEXT:    ret i1 false
3752;
3753  %s = ashr exact i4 %x, 3
3754  %c = icmp slt i4 %s, 10
3755  ret i1 %c
3756}
3757
3758define i1 @ashrslt_03_11_exact(i4 %x) {
3759; CHECK-LABEL: @ashrslt_03_11_exact(
3760; CHECK-NEXT:    ret i1 false
3761;
3762  %s = ashr exact i4 %x, 3
3763  %c = icmp slt i4 %s, 11
3764  ret i1 %c
3765}
3766
3767define i1 @ashrslt_03_12_exact(i4 %x) {
3768; CHECK-LABEL: @ashrslt_03_12_exact(
3769; CHECK-NEXT:    ret i1 false
3770;
3771  %s = ashr exact i4 %x, 3
3772  %c = icmp slt i4 %s, 12
3773  ret i1 %c
3774}
3775
3776define i1 @ashrslt_03_13_exact(i4 %x) {
3777; CHECK-LABEL: @ashrslt_03_13_exact(
3778; CHECK-NEXT:    ret i1 false
3779;
3780  %s = ashr exact i4 %x, 3
3781  %c = icmp slt i4 %s, 13
3782  ret i1 %c
3783}
3784
3785define i1 @ashrslt_03_14_exact(i4 %x) {
3786; CHECK-LABEL: @ashrslt_03_14_exact(
3787; CHECK-NEXT:    ret i1 false
3788;
3789  %s = ashr exact i4 %x, 3
3790  %c = icmp slt i4 %s, 14
3791  ret i1 %c
3792}
3793
3794define i1 @ashrslt_03_15_exact(i4 %x) {
3795; CHECK-LABEL: @ashrslt_03_15_exact(
3796; CHECK-NEXT:    ret i1 false
3797;
3798  %s = ashr exact i4 %x, 3
3799  %c = icmp slt i4 %s, 15
3800  ret i1 %c
3801}
3802
3803define i1 @ashr_slt_exact_near_pow2_cmpval(i8 %x) {
3804; CHECK-LABEL: @ashr_slt_exact_near_pow2_cmpval(
3805; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], 9
3806; CHECK-NEXT:    ret i1 [[C]]
3807;
3808  %s = ashr exact i8 %x, 1
3809  %c = icmp slt i8 %s, 5
3810  ret i1 %c
3811}
3812
3813define i1 @ashr_ult_exact_near_pow2_cmpval(i8 %x) {
3814; CHECK-LABEL: @ashr_ult_exact_near_pow2_cmpval(
3815; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], 9
3816; CHECK-NEXT:    ret i1 [[C]]
3817;
3818  %s = ashr exact i8 %x, 1
3819  %c = icmp ult i8 %s, 5
3820  ret i1 %c
3821}
3822
3823define i1 @negtest_near_pow2_cmpval_ashr_slt_noexact(i8 %x) {
3824; CHECK-LABEL: @negtest_near_pow2_cmpval_ashr_slt_noexact(
3825; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], 10
3826; CHECK-NEXT:    ret i1 [[C]]
3827;
3828  %s = ashr i8 %x, 1
3829  %c = icmp slt i8 %s, 5
3830  ret i1 %c
3831}
3832
3833define i1 @negtest_near_pow2_cmpval_ashr_wrong_cmp_pred(i8 %x) {
3834; CHECK-LABEL: @negtest_near_pow2_cmpval_ashr_wrong_cmp_pred(
3835; CHECK-NEXT:    [[C:%.*]] = icmp eq i8 [[X:%.*]], 10
3836; CHECK-NEXT:    ret i1 [[C]]
3837;
3838  %s = ashr exact i8 %x, 1
3839  %c = icmp eq i8 %s, 5
3840  ret i1 %c
3841}
3842
3843define i1 @negtest_near_pow2_cmpval_isnt_close_to_pow2(i8 %x) {
3844; CHECK-LABEL: @negtest_near_pow2_cmpval_isnt_close_to_pow2(
3845; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], 12
3846; CHECK-NEXT:    ret i1 [[C]]
3847;
3848  %s = ashr exact i8 %x, 1
3849  %c = icmp slt i8 %s, 6
3850  ret i1 %c
3851}
3852
3853define i1 @negtest_near_pow2_cmpval_would_overflow_into_signbit(i8 %x) {
3854; CHECK-LABEL: @negtest_near_pow2_cmpval_would_overflow_into_signbit(
3855; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[X:%.*]], -1
3856; CHECK-NEXT:    ret i1 [[C]]
3857;
3858  %s = ashr exact i8 %x, 2
3859  %c = icmp ult i8 %s, 33
3860  ret i1 %c
3861}
3862