xref: /llvm-project/llvm/test/Transforms/InstCombine/icmp-and-lowbit-mask.ll (revision a105877646d68e48cdeeeadd9d1e075dc3c5d68d) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=instcombine -S | FileCheck %s
3
4declare void @use.i8(i8)
5declare void @use.i16(i16)
6define i1 @src_is_mask_zext(i16 %x_in, i8 %y) {
7; CHECK-LABEL: @src_is_mask_zext(
8; CHECK-NEXT:    [[M_IN:%.*]] = lshr i8 -1, [[Y:%.*]]
9; CHECK-NEXT:    [[MASK:%.*]] = zext i8 [[M_IN]] to i16
10; CHECK-NEXT:    [[TMP1:%.*]] = xor i16 [[X_IN:%.*]], 123
11; CHECK-NEXT:    [[R:%.*]] = icmp ule i16 [[TMP1]], [[MASK]]
12; CHECK-NEXT:    ret i1 [[R]]
13;
14  %x = xor i16 %x_in, 123
15  %m_in = lshr i8 -1, %y
16  %mask = zext i8 %m_in to i16
17
18  %and = and i16 %x, %mask
19  %r = icmp eq i16 %and, %x
20  ret i1 %r
21}
22
23define i1 @src_is_mask_zext_fail_not_mask(i16 %x_in, i8 %y) {
24; CHECK-LABEL: @src_is_mask_zext_fail_not_mask(
25; CHECK-NEXT:    [[M_IN:%.*]] = lshr i8 -2, [[Y:%.*]]
26; CHECK-NEXT:    [[MASK:%.*]] = zext i8 [[M_IN]] to i16
27; CHECK-NEXT:    [[TMP1:%.*]] = xor i16 [[X_IN:%.*]], -124
28; CHECK-NEXT:    [[TMP2:%.*]] = or i16 [[TMP1]], [[MASK]]
29; CHECK-NEXT:    [[R:%.*]] = icmp eq i16 [[TMP2]], -1
30; CHECK-NEXT:    ret i1 [[R]]
31;
32  %x = xor i16 %x_in, 123
33  %m_in = lshr i8 -2, %y
34  %mask = zext i8 %m_in to i16
35
36  %and = and i16 %x, %mask
37  %r = icmp eq i16 %and, %x
38  ret i1 %r
39}
40
41define i1 @src_is_mask_sext(i16 %x_in, i8 %y) {
42; CHECK-LABEL: @src_is_mask_sext(
43; CHECK-NEXT:    [[X:%.*]] = xor i16 [[X_IN:%.*]], 123
44; CHECK-NEXT:    [[TMP1:%.*]] = lshr i8 31, [[Y:%.*]]
45; CHECK-NEXT:    [[TMP2:%.*]] = zext nneg i8 [[TMP1]] to i16
46; CHECK-NEXT:    [[R:%.*]] = icmp ule i16 [[X]], [[TMP2]]
47; CHECK-NEXT:    ret i1 [[R]]
48;
49  %x = xor i16 %x_in, 123
50  %m_in = lshr i8 31, %y
51  %mask = sext i8 %m_in to i16
52  %notmask = xor i16 %mask, -1
53
54  %and = and i16 %notmask, %x
55  %r = icmp eq i16 %and, 0
56  ret i1 %r
57}
58
59define i1 @src_is_mask_sext_fail_multiuse(i16 %x_in, i8 %y) {
60; CHECK-LABEL: @src_is_mask_sext_fail_multiuse(
61; CHECK-NEXT:    [[X:%.*]] = xor i16 [[X_IN:%.*]], 122
62; CHECK-NEXT:    [[M_IN:%.*]] = lshr i8 -1, [[Y:%.*]]
63; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[M_IN]], -1
64; CHECK-NEXT:    [[NOTMASK:%.*]] = sext i8 [[TMP1]] to i16
65; CHECK-NEXT:    [[AND:%.*]] = and i16 [[X]], [[NOTMASK]]
66; CHECK-NEXT:    call void @use.i16(i16 [[AND]])
67; CHECK-NEXT:    [[R:%.*]] = icmp eq i16 [[AND]], 0
68; CHECK-NEXT:    ret i1 [[R]]
69;
70  %x = xor i16 %x_in, 123
71  %m_in = lshr i8 -1, %y
72  %mask = sext i8 %m_in to i16
73  %notmask = xor i16 %mask, -1
74
75  %and = and i16 %notmask, %x
76  call void @use.i16(i16 %and)
77  %r = icmp eq i16 %and, 0
78  ret i1 %r
79}
80
81define i1 @src_is_mask_and(i8 %x_in, i8 %y, i8 %z) {
82; CHECK-LABEL: @src_is_mask_and(
83; CHECK-NEXT:    [[MY:%.*]] = lshr i8 7, [[Y:%.*]]
84; CHECK-NEXT:    [[MZ:%.*]] = lshr i8 -1, [[Z:%.*]]
85; CHECK-NEXT:    [[MASK:%.*]] = and i8 [[MY]], [[MZ]]
86; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
87; CHECK-NEXT:    [[R:%.*]] = icmp ule i8 [[TMP1]], [[MASK]]
88; CHECK-NEXT:    ret i1 [[R]]
89;
90  %x = xor i8 %x_in, 123
91  %my = ashr i8 7, %y
92  %mz = lshr i8 -1, %z
93  %mask = and i8 %my, %mz
94
95  %and = and i8 %x, %mask
96  %r = icmp eq i8 %x, %and
97  ret i1 %r
98}
99
100define i1 @src_is_mask_and_fail_mixed(i8 %x_in, i8 %y, i8 %z) {
101; CHECK-LABEL: @src_is_mask_and_fail_mixed(
102; CHECK-NEXT:    [[MY:%.*]] = ashr i8 -8, [[Y:%.*]]
103; CHECK-NEXT:    [[MZ:%.*]] = lshr i8 -1, [[Z:%.*]]
104; CHECK-NEXT:    [[MASK:%.*]] = and i8 [[MY]], [[MZ]]
105; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], -124
106; CHECK-NEXT:    [[TMP2:%.*]] = or i8 [[MASK]], [[TMP1]]
107; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[TMP2]], -1
108; CHECK-NEXT:    ret i1 [[R]]
109;
110  %x = xor i8 %x_in, 123
111  %my = ashr i8 -8, %y
112  %mz = lshr i8 -1, %z
113  %mask = and i8 %my, %mz
114
115  %and = and i8 %x, %mask
116  %r = icmp eq i8 %x, %and
117  ret i1 %r
118}
119
120define i1 @src_is_mask_or(i8 %x_in, i8 %y) {
121; CHECK-LABEL: @src_is_mask_or(
122; CHECK-NEXT:    [[MY:%.*]] = lshr i8 -1, [[Y:%.*]]
123; CHECK-NEXT:    [[MASK:%.*]] = and i8 [[MY]], 7
124; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
125; CHECK-NEXT:    [[R:%.*]] = icmp ule i8 [[TMP1]], [[MASK]]
126; CHECK-NEXT:    ret i1 [[R]]
127;
128  %x = xor i8 %x_in, 123
129  %my = lshr i8 -1, %y
130  %mask = and i8 %my, 7
131
132  %and = and i8 %mask, %x
133  %r = icmp eq i8 %x, %and
134  ret i1 %r
135}
136
137define i1 @src_is_mask_xor(i8 %x_in, i8 %y) {
138; CHECK-LABEL: @src_is_mask_xor(
139; CHECK-NEXT:    [[Y_M1:%.*]] = add i8 [[Y:%.*]], -1
140; CHECK-NEXT:    [[MASK:%.*]] = xor i8 [[Y]], [[Y_M1]]
141; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
142; CHECK-NEXT:    [[R:%.*]] = icmp ugt i8 [[TMP1]], [[MASK]]
143; CHECK-NEXT:    ret i1 [[R]]
144;
145  %x = xor i8 %x_in, 123
146  %y_m1 = add i8 %y, -1
147  %mask = xor i8 %y, %y_m1
148  %and = and i8 %x, %mask
149  %r = icmp ne i8 %and, %x
150  ret i1 %r
151}
152
153define i1 @src_is_mask_xor_fail_notmask(i8 %x_in, i8 %y) {
154; CHECK-LABEL: @src_is_mask_xor_fail_notmask(
155; CHECK-NEXT:    [[TMP1:%.*]] = sub i8 0, [[Y:%.*]]
156; CHECK-NEXT:    [[NOTMASK:%.*]] = xor i8 [[Y]], [[TMP1]]
157; CHECK-NEXT:    [[TMP2:%.*]] = xor i8 [[X_IN:%.*]], -124
158; CHECK-NEXT:    [[TMP3:%.*]] = or i8 [[NOTMASK]], [[TMP2]]
159; CHECK-NEXT:    [[R:%.*]] = icmp ne i8 [[TMP3]], -1
160; CHECK-NEXT:    ret i1 [[R]]
161;
162  %x = xor i8 %x_in, 123
163  %y_m1 = add i8 %y, -1
164  %mask = xor i8 %y, %y_m1
165  %notmask = xor i8 %mask, -1
166  %and = and i8 %x, %notmask
167  %r = icmp ne i8 %and, %x
168  ret i1 %r
169}
170
171define i1 @src_is_mask_select(i8 %x_in, i8 %y, i1 %cond) {
172; CHECK-LABEL: @src_is_mask_select(
173; CHECK-NEXT:    [[Y_M1:%.*]] = add i8 [[Y:%.*]], -1
174; CHECK-NEXT:    [[YMASK:%.*]] = xor i8 [[Y]], [[Y_M1]]
175; CHECK-NEXT:    [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[YMASK]], i8 15
176; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
177; CHECK-NEXT:    [[R:%.*]] = icmp ugt i8 [[TMP1]], [[MASK]]
178; CHECK-NEXT:    ret i1 [[R]]
179;
180  %x = xor i8 %x_in, 123
181  %y_m1 = add i8 %y, -1
182  %ymask = xor i8 %y, %y_m1
183  %mask = select i1 %cond, i8 %ymask, i8 15
184
185  %and = and i8 %mask, %x
186  %r = icmp ne i8 %and, %x
187  ret i1 %r
188}
189
190define i1 @src_is_mask_select_fail_wrong_pattern(i8 %x_in, i8 %y, i1 %cond, i8 %z) {
191; CHECK-LABEL: @src_is_mask_select_fail_wrong_pattern(
192; CHECK-NEXT:    [[X:%.*]] = xor i8 [[X_IN:%.*]], 123
193; CHECK-NEXT:    [[Y_M1:%.*]] = add i8 [[Y:%.*]], -1
194; CHECK-NEXT:    [[YMASK:%.*]] = xor i8 [[Y]], [[Y_M1]]
195; CHECK-NEXT:    [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[YMASK]], i8 15
196; CHECK-NEXT:    [[AND:%.*]] = and i8 [[MASK]], [[X]]
197; CHECK-NEXT:    [[R:%.*]] = icmp ne i8 [[AND]], [[Z:%.*]]
198; CHECK-NEXT:    ret i1 [[R]]
199;
200  %x = xor i8 %x_in, 123
201  %y_m1 = add i8 %y, -1
202  %ymask = xor i8 %y, %y_m1
203  %mask = select i1 %cond, i8 %ymask, i8 15
204
205  %and = and i8 %mask, %x
206  %r = icmp ne i8 %and, %z
207  ret i1 %r
208}
209
210define i1 @src_is_mask_shl_lshr(i8 %x_in, i8 %y, i1 %cond) {
211; CHECK-LABEL: @src_is_mask_shl_lshr(
212; CHECK-NEXT:    [[X:%.*]] = xor i8 [[X_IN:%.*]], 122
213; CHECK-NEXT:    [[TMP1:%.*]] = lshr i8 -1, [[Y:%.*]]
214; CHECK-NEXT:    [[R:%.*]] = icmp ugt i8 [[X]], [[TMP1]]
215; CHECK-NEXT:    ret i1 [[R]]
216;
217  %x = xor i8 %x_in, 123
218  %m_shl = shl i8 -1, %y
219  %mask = lshr i8 %m_shl, %y
220  %notmask = xor i8 %mask, -1
221
222  %and = and i8 %x, %notmask
223  %r = icmp ne i8 0, %and
224  ret i1 %r
225}
226
227define i1 @src_is_mask_shl_lshr_fail_not_allones(i8 %x_in, i8 %y, i1 %cond) {
228; CHECK-LABEL: @src_is_mask_shl_lshr_fail_not_allones(
229; CHECK-NEXT:    [[TMP1:%.*]] = lshr i8 -1, [[Y:%.*]]
230; CHECK-NEXT:    [[MASK:%.*]] = and i8 [[TMP1]], -2
231; CHECK-NEXT:    [[TMP2:%.*]] = xor i8 [[X_IN:%.*]], -124
232; CHECK-NEXT:    [[TMP3:%.*]] = or i8 [[TMP2]], [[MASK]]
233; CHECK-NEXT:    [[R:%.*]] = icmp ne i8 [[TMP3]], -1
234; CHECK-NEXT:    ret i1 [[R]]
235;
236  %x = xor i8 %x_in, 123
237  %m_shl = shl i8 -2, %y
238  %mask = lshr i8 %m_shl, %y
239  %notmask = xor i8 %mask, -1
240
241  %and = and i8 %x, %notmask
242  %r = icmp ne i8 0, %and
243  ret i1 %r
244}
245
246define i1 @src_is_mask_lshr(i8 %x_in, i8 %y, i8 %z, i1 %cond) {
247; CHECK-LABEL: @src_is_mask_lshr(
248; CHECK-NEXT:    [[Y_M1:%.*]] = add i8 [[Y:%.*]], -1
249; CHECK-NEXT:    [[YMASK:%.*]] = xor i8 [[Y]], [[Y_M1]]
250; CHECK-NEXT:    [[SMASK:%.*]] = select i1 [[COND:%.*]], i8 [[YMASK]], i8 15
251; CHECK-NEXT:    [[MASK:%.*]] = lshr i8 [[SMASK]], [[Z:%.*]]
252; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
253; CHECK-NEXT:    [[R:%.*]] = icmp ugt i8 [[TMP1]], [[MASK]]
254; CHECK-NEXT:    ret i1 [[R]]
255;
256  %x = xor i8 %x_in, 123
257  %y_m1 = add i8 %y, -1
258  %ymask = xor i8 %y, %y_m1
259  %smask = select i1 %cond, i8 %ymask, i8 15
260  %mask = lshr i8 %smask, %z
261  %and = and i8 %mask, %x
262  %r = icmp ne i8 %x, %and
263  ret i1 %r
264}
265
266define i1 @src_is_mask_ashr(i8 %x_in, i8 %y, i8 %z, i1 %cond) {
267; CHECK-LABEL: @src_is_mask_ashr(
268; CHECK-NEXT:    [[Y_M1:%.*]] = add i8 [[Y:%.*]], -1
269; CHECK-NEXT:    [[YMASK:%.*]] = xor i8 [[Y]], [[Y_M1]]
270; CHECK-NEXT:    [[SMASK:%.*]] = select i1 [[COND:%.*]], i8 [[YMASK]], i8 15
271; CHECK-NEXT:    [[MASK:%.*]] = ashr i8 [[SMASK]], [[Z:%.*]]
272; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
273; CHECK-NEXT:    [[R:%.*]] = icmp ugt i8 [[TMP1]], [[MASK]]
274; CHECK-NEXT:    ret i1 [[R]]
275;
276  %x = xor i8 %x_in, 123
277  %y_m1 = add i8 %y, -1
278  %ymask = xor i8 %y, %y_m1
279  %smask = select i1 %cond, i8 %ymask, i8 15
280  %mask = ashr i8 %smask, %z
281  %and = and i8 %x, %mask
282  %r = icmp ult i8 %and, %x
283  ret i1 %r
284}
285
286define i1 @src_is_mask_p2_m1(i8 %x_in, i8 %y) {
287; CHECK-LABEL: @src_is_mask_p2_m1(
288; CHECK-NEXT:    [[P2ORZ:%.*]] = shl i8 2, [[Y:%.*]]
289; CHECK-NEXT:    [[MASK:%.*]] = add i8 [[P2ORZ]], -1
290; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
291; CHECK-NEXT:    [[R:%.*]] = icmp ugt i8 [[TMP1]], [[MASK]]
292; CHECK-NEXT:    ret i1 [[R]]
293;
294  %x = xor i8 %x_in, 123
295  %p2orz = shl i8 2, %y
296  %mask = add i8 %p2orz, -1
297  %and = and i8 %mask, %x
298  %r = icmp ult i8 %and, %x
299  ret i1 %r
300}
301
302define i1 @src_is_mask_umax(i8 %x_in, i8 %y) {
303; CHECK-LABEL: @src_is_mask_umax(
304; CHECK-NEXT:    [[Y_M1:%.*]] = add i8 [[Y:%.*]], -1
305; CHECK-NEXT:    [[YMASK:%.*]] = xor i8 [[Y]], [[Y_M1]]
306; CHECK-NEXT:    [[MASK:%.*]] = call i8 @llvm.umax.i8(i8 [[YMASK]], i8 3)
307; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
308; CHECK-NEXT:    [[R:%.*]] = icmp ugt i8 [[TMP1]], [[MASK]]
309; CHECK-NEXT:    ret i1 [[R]]
310;
311  %x = xor i8 %x_in, 123
312  %y_m1 = add i8 %y, -1
313  %ymask = xor i8 %y, %y_m1
314  %mask = call i8 @llvm.umax.i8(i8 %ymask, i8 3)
315
316  %and = and i8 %x, %mask
317  %r = icmp ugt i8 %x, %and
318  ret i1 %r
319}
320
321define i1 @src_is_mask_umin(i8 %x_in, i8 %y, i8 %z) {
322; CHECK-LABEL: @src_is_mask_umin(
323; CHECK-NEXT:    [[Y_M1:%.*]] = add i8 [[Y:%.*]], -1
324; CHECK-NEXT:    [[YMASK:%.*]] = xor i8 [[Y]], [[Y_M1]]
325; CHECK-NEXT:    [[ZMASK:%.*]] = lshr i8 15, [[Z:%.*]]
326; CHECK-NEXT:    [[MASK:%.*]] = call i8 @llvm.umin.i8(i8 [[YMASK]], i8 [[ZMASK]])
327; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
328; CHECK-NEXT:    [[R:%.*]] = icmp ugt i8 [[TMP1]], [[MASK]]
329; CHECK-NEXT:    ret i1 [[R]]
330;
331  %x = xor i8 %x_in, 123
332  %y_m1 = add i8 %y, -1
333  %ymask = xor i8 %y, %y_m1
334  %zmask = lshr i8 15, %z
335  %mask = call i8 @llvm.umin.i8(i8 %ymask, i8 %zmask)
336
337  %and = and i8 %mask, %x
338  %r = icmp ugt i8 %x, %and
339  ret i1 %r
340}
341
342define i1 @src_is_mask_umin_fail_mismatch(i8 %x_in, i8 %y) {
343; CHECK-LABEL: @src_is_mask_umin_fail_mismatch(
344; CHECK-NEXT:    [[Y_M1:%.*]] = add i8 [[Y:%.*]], -1
345; CHECK-NEXT:    [[YMASK:%.*]] = xor i8 [[Y]], [[Y_M1]]
346; CHECK-NEXT:    [[MASK:%.*]] = call i8 @llvm.umin.i8(i8 [[YMASK]], i8 -32)
347; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], -124
348; CHECK-NEXT:    [[TMP2:%.*]] = or i8 [[MASK]], [[TMP1]]
349; CHECK-NEXT:    [[R:%.*]] = icmp ne i8 [[TMP2]], -1
350; CHECK-NEXT:    ret i1 [[R]]
351;
352  %x = xor i8 %x_in, 123
353  %y_m1 = add i8 %y, -1
354  %ymask = xor i8 %y, %y_m1
355  %mask = call i8 @llvm.umin.i8(i8 %ymask, i8 -32)
356
357  %and = and i8 %mask, %x
358  %r = icmp ugt i8 %x, %and
359  ret i1 %r
360}
361
362define i1 @src_is_mask_smax(i8 %x_in, i8 %y) {
363; CHECK-LABEL: @src_is_mask_smax(
364; CHECK-NEXT:    [[Y_M1:%.*]] = add i8 [[Y:%.*]], -1
365; CHECK-NEXT:    [[YMASK:%.*]] = xor i8 [[Y]], [[Y_M1]]
366; CHECK-NEXT:    [[MASK:%.*]] = call i8 @llvm.smax.i8(i8 [[YMASK]], i8 -1)
367; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
368; CHECK-NEXT:    [[R:%.*]] = icmp ule i8 [[TMP1]], [[MASK]]
369; CHECK-NEXT:    ret i1 [[R]]
370;
371  %x = xor i8 %x_in, 123
372  %y_m1 = add i8 %y, -1
373  %ymask = xor i8 %y, %y_m1
374  %mask = call i8 @llvm.smax.i8(i8 %ymask, i8 -1)
375
376  %and = and i8 %x, %mask
377  %r = icmp uge i8 %and, %x
378  ret i1 %r
379}
380
381define i1 @src_is_mask_smin(i8 %x_in, i8 %y) {
382; CHECK-LABEL: @src_is_mask_smin(
383; CHECK-NEXT:    [[Y_M1:%.*]] = add i8 [[Y:%.*]], -1
384; CHECK-NEXT:    [[YMASK:%.*]] = xor i8 [[Y]], [[Y_M1]]
385; CHECK-NEXT:    [[MASK:%.*]] = call i8 @llvm.smin.i8(i8 [[YMASK]], i8 0)
386; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
387; CHECK-NEXT:    [[R:%.*]] = icmp ule i8 [[TMP1]], [[MASK]]
388; CHECK-NEXT:    ret i1 [[R]]
389;
390  %x = xor i8 %x_in, 123
391  %y_m1 = add i8 %y, -1
392  %ymask = xor i8 %y, %y_m1
393  %mask = call i8 @llvm.smin.i8(i8 %ymask, i8 0)
394
395  %and = and i8 %mask, %x
396  %r = icmp uge i8 %and, %x
397  ret i1 %r
398}
399
400define i1 @src_is_mask_bitreverse_not_mask(i8 %x_in, i8 %y) {
401; CHECK-LABEL: @src_is_mask_bitreverse_not_mask(
402; CHECK-NEXT:    [[NMASK:%.*]] = shl nsw i8 -1, [[Y:%.*]]
403; CHECK-NEXT:    [[MASK:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[NMASK]])
404; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
405; CHECK-NEXT:    [[R:%.*]] = icmp ule i8 [[TMP1]], [[MASK]]
406; CHECK-NEXT:    ret i1 [[R]]
407;
408  %x = xor i8 %x_in, 123
409  %nmask = shl i8 -1, %y
410  %mask = call i8 @llvm.bitreverse.i8(i8 %nmask)
411
412  %and = and i8 %x, %mask
413  %r = icmp ule i8 %x, %and
414  ret i1 %r
415}
416
417define i1 @src_is_notmask_sext(i16 %x_in, i8 %y) {
418; CHECK-LABEL: @src_is_notmask_sext(
419; CHECK-NEXT:    [[M_IN:%.*]] = shl i8 -8, [[Y:%.*]]
420; CHECK-NEXT:    [[TMP1:%.*]] = xor i16 [[X_IN:%.*]], -128
421; CHECK-NEXT:    [[TMP2:%.*]] = sext i8 [[M_IN]] to i16
422; CHECK-NEXT:    [[R:%.*]] = icmp uge i16 [[TMP1]], [[TMP2]]
423; CHECK-NEXT:    ret i1 [[R]]
424;
425  %x = xor i16 %x_in, 123
426  %m_in = shl i8 -8, %y
427  %nmask = sext i8 %m_in to i16
428  %mask = xor i16 %nmask, -1
429  %and = and i16 %mask, %x
430  %r = icmp ule i16 %x, %and
431  ret i1 %r
432}
433
434define i1 @src_is_notmask_shl(i8 %x_in, i8 %y, i1 %cond) {
435; CHECK-LABEL: @src_is_notmask_shl(
436; CHECK-NEXT:    [[X:%.*]] = xor i8 [[X_IN:%.*]], 122
437; CHECK-NEXT:    [[NMASK:%.*]] = shl nsw i8 -1, [[Y:%.*]]
438; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[NMASK]], -1
439; CHECK-NEXT:    [[NOTMASK0:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TMP1]])
440; CHECK-NEXT:    [[NOTMASK:%.*]] = select i1 [[COND:%.*]], i8 [[NOTMASK0]], i8 -8
441; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X]], [[NOTMASK]]
442; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[AND]], 0
443; CHECK-NEXT:    ret i1 [[R]]
444;
445  %x = xor i8 %x_in, 123
446  %nmask = shl i8 -1, %y
447  %mask = call i8 @llvm.bitreverse.i8(i8 %nmask)
448  %notmask0 = xor i8 %mask, -1
449  %notmask = select i1 %cond, i8 %notmask0, i8 -8
450  %and = and i8 %x, %notmask
451  %r = icmp eq i8 %and, 0
452  ret i1 %r
453}
454
455define i1 @src_is_notmask_x_xor_neg_x(i8 %x_in, i8 %y, i1 %cond) {
456; CHECK-LABEL: @src_is_notmask_x_xor_neg_x(
457; CHECK-NEXT:    [[X:%.*]] = xor i8 [[X_IN:%.*]], 123
458; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[Y:%.*]], -1
459; CHECK-NEXT:    [[TMP2:%.*]] = xor i8 [[Y]], [[TMP1]]
460; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[COND:%.*]], i8 [[TMP2]], i8 7
461; CHECK-NEXT:    [[R:%.*]] = icmp ule i8 [[X]], [[TMP3]]
462; CHECK-NEXT:    ret i1 [[R]]
463;
464  %x = xor i8 %x_in, 123
465  %neg_y = sub i8 0, %y
466  %nmask0 = xor i8 %y, %neg_y
467  %notmask = select i1 %cond, i8 %nmask0, i8 -8
468  %and = and i8 %x, %notmask
469  %r = icmp eq i8 %and, 0
470  ret i1 %r
471}
472
473define i1 @src_is_notmask_x_xor_neg_x_inv(i8 %x_in, i8 %y, i1 %cond) {
474; CHECK-LABEL: @src_is_notmask_x_xor_neg_x_inv(
475; CHECK-NEXT:    [[X:%.*]] = xor i8 [[X_IN:%.*]], 123
476; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[Y:%.*]], -1
477; CHECK-NEXT:    [[TMP2:%.*]] = xor i8 [[Y]], [[TMP1]]
478; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[COND:%.*]], i8 [[TMP2]], i8 7
479; CHECK-NEXT:    [[R:%.*]] = icmp ule i8 [[X]], [[TMP3]]
480; CHECK-NEXT:    ret i1 [[R]]
481;
482  %x = xor i8 %x_in, 123
483  %neg_y = sub i8 0, %y
484  %nmask0 = xor i8 %y, %neg_y
485  %notmask = select i1 %cond, i8 %nmask0, i8 -8
486  %and = and i8 %notmask, %x
487  %r = icmp eq i8 %and, 0
488  ret i1 %r
489}
490
491define i1 @src_is_notmask_shl_fail_multiuse_invert(i8 %x_in, i8 %y, i1 %cond) {
492; CHECK-LABEL: @src_is_notmask_shl_fail_multiuse_invert(
493; CHECK-NEXT:    [[X:%.*]] = xor i8 [[X_IN:%.*]], 122
494; CHECK-NEXT:    [[NMASK:%.*]] = shl nsw i8 -1, [[Y:%.*]]
495; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[NMASK]], -1
496; CHECK-NEXT:    [[NOTMASK0:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TMP1]])
497; CHECK-NEXT:    [[NOTMASK:%.*]] = select i1 [[COND:%.*]], i8 [[NOTMASK0]], i8 -8
498; CHECK-NEXT:    call void @use.i8(i8 [[NOTMASK]])
499; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X]], [[NOTMASK]]
500; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[AND]], 0
501; CHECK-NEXT:    ret i1 [[R]]
502;
503  %x = xor i8 %x_in, 123
504  %nmask = shl i8 -1, %y
505  %mask = call i8 @llvm.bitreverse.i8(i8 %nmask)
506  %notmask0 = xor i8 %mask, -1
507  %notmask = select i1 %cond, i8 %notmask0, i8 -8
508  call void @use.i8(i8 %notmask)
509  %and = and i8 %x, %notmask
510  %r = icmp eq i8 %and, 0
511  ret i1 %r
512}
513
514define i1 @src_is_notmask_lshr_shl(i8 %x_in, i8 %y) {
515; CHECK-LABEL: @src_is_notmask_lshr_shl(
516; CHECK-NEXT:    [[TMP1:%.*]] = shl nsw i8 -1, [[Y:%.*]]
517; CHECK-NEXT:    [[TMP2:%.*]] = xor i8 [[X_IN:%.*]], -124
518; CHECK-NEXT:    [[R:%.*]] = icmp uge i8 [[TMP2]], [[TMP1]]
519; CHECK-NEXT:    ret i1 [[R]]
520;
521  %x = xor i8 %x_in, 123
522  %mask_shr = lshr i8 -1, %y
523  %nmask = shl i8 %mask_shr, %y
524  %mask = xor i8 %nmask, -1
525  %and = and i8 %mask, %x
526  %r = icmp eq i8 %and, %x
527  ret i1 %r
528}
529
530define i1 @src_is_notmask_lshr_shl_fail_mismatch_shifts(i8 %x_in, i8 %y, i8 %z) {
531; CHECK-LABEL: @src_is_notmask_lshr_shl_fail_mismatch_shifts(
532; CHECK-NEXT:    [[MASK_SHR:%.*]] = lshr i8 -1, [[Y:%.*]]
533; CHECK-NEXT:    [[NMASK:%.*]] = shl i8 [[MASK_SHR]], [[Z:%.*]]
534; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], 123
535; CHECK-NEXT:    [[TMP2:%.*]] = and i8 [[TMP1]], [[NMASK]]
536; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[TMP2]], 0
537; CHECK-NEXT:    ret i1 [[R]]
538;
539  %x = xor i8 %x_in, 123
540  %mask_shr = lshr i8 -1, %y
541  %nmask = shl i8 %mask_shr, %z
542  %mask = xor i8 %nmask, -1
543  %and = and i8 %mask, %x
544  %r = icmp eq i8 %and, %x
545  ret i1 %r
546}
547
548define i1 @src_is_notmask_ashr(i16 %x_in, i8 %y, i16 %z) {
549; CHECK-LABEL: @src_is_notmask_ashr(
550; CHECK-NEXT:    [[M_IN:%.*]] = shl i8 -32, [[Y:%.*]]
551; CHECK-NEXT:    [[NMASK:%.*]] = sext i8 [[M_IN]] to i16
552; CHECK-NEXT:    [[NMASK_SHR:%.*]] = ashr i16 [[NMASK]], [[Z:%.*]]
553; CHECK-NEXT:    [[TMP1:%.*]] = xor i16 [[X_IN:%.*]], -124
554; CHECK-NEXT:    [[R:%.*]] = icmp uge i16 [[TMP1]], [[NMASK_SHR]]
555; CHECK-NEXT:    ret i1 [[R]]
556;
557  %x = xor i16 %x_in, 123
558  %m_in = shl i8 -32, %y
559  %nmask = sext i8 %m_in to i16
560  %nmask_shr = ashr i16 %nmask, %z
561  %mask = xor i16 %nmask_shr, -1
562  %and = and i16 %x, %mask
563  %r = icmp eq i16 %x, %and
564  ret i1 %r
565}
566
567define i1 @src_is_notmask_neg_p2(i8 %x_in, i8 %y) {
568; CHECK-LABEL: @src_is_notmask_neg_p2(
569; CHECK-NEXT:    [[X:%.*]] = xor i8 [[X_IN:%.*]], 123
570; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[Y:%.*]], -1
571; CHECK-NEXT:    [[TMP2:%.*]] = xor i8 [[Y]], -1
572; CHECK-NEXT:    [[TMP3:%.*]] = and i8 [[TMP1]], [[TMP2]]
573; CHECK-NEXT:    [[NOTMASK:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TMP3]])
574; CHECK-NEXT:    [[AND:%.*]] = and i8 [[NOTMASK]], [[X]]
575; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[AND]], 0
576; CHECK-NEXT:    ret i1 [[R]]
577;
578  %x = xor i8 %x_in, 123
579  %ny = sub i8 0, %y
580  %p2 = and i8 %ny, %y
581  %nmask = sub i8 0, %p2
582  %mask = call i8 @llvm.bitreverse.i8(i8 %nmask)
583  %notmask = xor i8 %mask, -1
584  %and = and i8 %notmask, %x
585  %r = icmp eq i8 0, %and
586  ret i1 %r
587}
588
589define i1 @src_is_notmask_neg_p2_fail_not_invertable(i8 %x_in, i8 %y) {
590; CHECK-LABEL: @src_is_notmask_neg_p2_fail_not_invertable(
591; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X_IN:%.*]], -124
592; CHECK-NEXT:    [[TMP2:%.*]] = sub i8 0, [[Y:%.*]]
593; CHECK-NEXT:    [[TMP3:%.*]] = or i8 [[Y]], [[TMP2]]
594; CHECK-NEXT:    [[R:%.*]] = icmp uge i8 [[TMP1]], [[TMP3]]
595; CHECK-NEXT:    ret i1 [[R]]
596;
597  %x = xor i8 %x_in, 123
598  %ny = sub i8 0, %y
599  %p2 = and i8 %ny, %y
600  %notmask = sub i8 0, %p2
601  %and = and i8 %notmask, %x
602  %r = icmp eq i8 0, %and
603  ret i1 %r
604}
605
606define i1 @src_is_notmask_xor_fail(i8 %x_in, i8 %y) {
607; CHECK-LABEL: @src_is_notmask_xor_fail(
608; CHECK-NEXT:    [[X:%.*]] = xor i8 [[X_IN:%.*]], 123
609; CHECK-NEXT:    [[TMP1:%.*]] = sub i8 0, [[Y:%.*]]
610; CHECK-NEXT:    [[NOTMASK_REV:%.*]] = xor i8 [[Y]], [[TMP1]]
611; CHECK-NEXT:    [[NOTMASK:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[NOTMASK_REV]])
612; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X]], [[NOTMASK]]
613; CHECK-NEXT:    [[R:%.*]] = icmp slt i8 [[AND]], [[X]]
614; CHECK-NEXT:    ret i1 [[R]]
615;
616  %x = xor i8 %x_in, 123
617  %y_m1 = add i8 %y, -1
618  %mask = xor i8 %y, %y_m1
619  %notmask_rev = xor i8 %mask, -1
620  %notmask = call i8 @llvm.bitreverse.i8(i8 %notmask_rev)
621  %and = and i8 %x, %notmask
622  %r = icmp slt i8 %and, %x
623  ret i1 %r
624}
625
626define i1 @src_is_mask_const_slt(i8 %x_in) {
627; CHECK-LABEL: @src_is_mask_const_slt(
628; CHECK-NEXT:    [[R:%.*]] = icmp slt i8 [[X_IN:%.*]], 0
629; CHECK-NEXT:    ret i1 [[R]]
630;
631  %x = xor i8 %x_in, 123
632  %and = and i8 %x, 7
633  %r = icmp slt i8 %x, %and
634  ret i1 %r
635}
636
637define i1 @src_is_mask_const_sgt(i8 %x_in) {
638; CHECK-LABEL: @src_is_mask_const_sgt(
639; CHECK-NEXT:    [[X:%.*]] = xor i8 [[X_IN:%.*]], 123
640; CHECK-NEXT:    [[R:%.*]] = icmp sgt i8 [[X]], 7
641; CHECK-NEXT:    ret i1 [[R]]
642;
643  %x = xor i8 %x_in, 123
644  %and = and i8 %x, 7
645  %r = icmp sgt i8 %x, %and
646  ret i1 %r
647}
648
649define i1 @src_is_mask_const_sle(i8 %x_in) {
650; CHECK-LABEL: @src_is_mask_const_sle(
651; CHECK-NEXT:    [[R:%.*]] = icmp sgt i8 [[X_IN:%.*]], -1
652; CHECK-NEXT:    ret i1 [[R]]
653;
654  %x = xor i8 %x_in, 123
655  %and = and i8 %x, 31
656  %r = icmp sle i8 %and, %x
657  ret i1 %r
658}
659
660define i1 @src_is_mask_const_sge(i8 %x_in) {
661; CHECK-LABEL: @src_is_mask_const_sge(
662; CHECK-NEXT:    [[X:%.*]] = xor i8 [[X_IN:%.*]], 123
663; CHECK-NEXT:    [[R:%.*]] = icmp slt i8 [[X]], 32
664; CHECK-NEXT:    ret i1 [[R]]
665;
666  %x = xor i8 %x_in, 123
667  %and = and i8 %x, 31
668  %r = icmp sge i8 %and, %x
669  ret i1 %r
670}
671
672define i1 @src_x_and_mask_slt(i8 %x, i8 %y, i1 %cond) {
673; CHECK-LABEL: @src_x_and_mask_slt(
674; CHECK-NEXT:    [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
675; CHECK-NEXT:    [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
676; CHECK-NEXT:    [[MASK_POS:%.*]] = icmp sgt i8 [[MASK]], -1
677; CHECK-NEXT:    call void @llvm.assume(i1 [[MASK_POS]])
678; CHECK-NEXT:    [[R:%.*]] = icmp sgt i8 [[X:%.*]], [[MASK]]
679; CHECK-NEXT:    ret i1 [[R]]
680;
681  %mask0 = lshr i8 -1, %y
682  %mask = select i1 %cond, i8 %mask0, i8 0
683  %mask_pos = icmp sge i8 %mask, 0
684  call void @llvm.assume(i1 %mask_pos)
685  %and = and i8 %x, %mask
686  %r = icmp slt i8 %and, %x
687  ret i1 %r
688}
689
690define i1 @src_x_and_mask_sge(i8 %x, i8 %y, i1 %cond) {
691; CHECK-LABEL: @src_x_and_mask_sge(
692; CHECK-NEXT:    [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
693; CHECK-NEXT:    [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
694; CHECK-NEXT:    [[MASK_POS:%.*]] = icmp sgt i8 [[MASK]], -1
695; CHECK-NEXT:    call void @llvm.assume(i1 [[MASK_POS]])
696; CHECK-NEXT:    [[R:%.*]] = icmp sle i8 [[X:%.*]], [[MASK]]
697; CHECK-NEXT:    ret i1 [[R]]
698;
699  %mask0 = lshr i8 -1, %y
700  %mask = select i1 %cond, i8 %mask0, i8 0
701  %mask_pos = icmp sge i8 %mask, 0
702  call void @llvm.assume(i1 %mask_pos)
703  %and = and i8 %x, %mask
704  %r = icmp sge i8 %and, %x
705  ret i1 %r
706}
707
708define i1 @src_x_and_mask_slt_fail_maybe_neg(i8 %x, i8 %y, i1 %cond) {
709; CHECK-LABEL: @src_x_and_mask_slt_fail_maybe_neg(
710; CHECK-NEXT:    [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
711; CHECK-NEXT:    [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
712; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X:%.*]], [[MASK]]
713; CHECK-NEXT:    [[R:%.*]] = icmp slt i8 [[AND]], [[X]]
714; CHECK-NEXT:    ret i1 [[R]]
715;
716  %mask0 = lshr i8 -1, %y
717  %mask = select i1 %cond, i8 %mask0, i8 0
718  %and = and i8 %x, %mask
719  %r = icmp slt i8 %and, %x
720  ret i1 %r
721}
722
723define i1 @src_x_and_mask_sge_fail_maybe_neg(i8 %x, i8 %y, i1 %cond) {
724; CHECK-LABEL: @src_x_and_mask_sge_fail_maybe_neg(
725; CHECK-NEXT:    [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
726; CHECK-NEXT:    [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
727; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X:%.*]], [[MASK]]
728; CHECK-NEXT:    [[R:%.*]] = icmp sge i8 [[AND]], [[X]]
729; CHECK-NEXT:    ret i1 [[R]]
730;
731  %mask0 = lshr i8 -1, %y
732  %mask = select i1 %cond, i8 %mask0, i8 0
733  %and = and i8 %x, %mask
734  %r = icmp sge i8 %and, %x
735  ret i1 %r
736}
737
738define i1 @src_x_and_nmask_eq(i8 %x, i8 %y, i1 %cond) {
739; CHECK-LABEL: @src_x_and_nmask_eq(
740; CHECK-NEXT:    [[NOT_MASK0:%.*]] = shl nsw i8 -1, [[Y:%.*]]
741; CHECK-NEXT:    [[R1:%.*]] = icmp ule i8 [[NOT_MASK0]], [[X:%.*]]
742; CHECK-NEXT:    [[NOT_COND:%.*]] = xor i1 [[COND:%.*]], true
743; CHECK-NEXT:    [[R:%.*]] = select i1 [[NOT_COND]], i1 true, i1 [[R1]]
744; CHECK-NEXT:    ret i1 [[R]]
745;
746  %not_mask0 = shl i8 -1, %y
747  %not_mask = select i1 %cond, i8 %not_mask0, i8 0
748  %and = and i8 %x, %not_mask
749  %r = icmp eq i8 %not_mask, %and
750  ret i1 %r
751}
752
753define i1 @src_x_and_nmask_ne(i8 %x, i8 %y, i1 %cond) {
754; CHECK-LABEL: @src_x_and_nmask_ne(
755; CHECK-NEXT:    [[NOT_MASK0:%.*]] = shl nsw i8 -1, [[Y:%.*]]
756; CHECK-NEXT:    [[R1:%.*]] = icmp ugt i8 [[NOT_MASK0]], [[X:%.*]]
757; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i1 [[R1]], i1 false
758; CHECK-NEXT:    ret i1 [[R]]
759;
760  %not_mask0 = shl i8 -1, %y
761  %not_mask = select i1 %cond, i8 %not_mask0, i8 0
762  %and = and i8 %x, %not_mask
763  %r = icmp ne i8 %and, %not_mask
764  ret i1 %r
765}
766
767define i1 @src_x_and_nmask_ult(i8 %x, i8 %y, i1 %cond) {
768; CHECK-LABEL: @src_x_and_nmask_ult(
769; CHECK-NEXT:    [[NOT_MASK0:%.*]] = shl nsw i8 -1, [[Y:%.*]]
770; CHECK-NEXT:    [[R1:%.*]] = icmp ugt i8 [[NOT_MASK0]], [[X:%.*]]
771; CHECK-NEXT:    [[R:%.*]] = select i1 [[COND:%.*]], i1 [[R1]], i1 false
772; CHECK-NEXT:    ret i1 [[R]]
773;
774  %not_mask0 = shl i8 -1, %y
775  %not_mask = select i1 %cond, i8 %not_mask0, i8 0
776  %and = and i8 %x, %not_mask
777  %r = icmp ult i8 %and, %not_mask
778  ret i1 %r
779}
780
781define i1 @src_x_and_nmask_uge(i8 %x, i8 %y, i1 %cond) {
782; CHECK-LABEL: @src_x_and_nmask_uge(
783; CHECK-NEXT:    [[NOT_MASK0:%.*]] = shl nsw i8 -1, [[Y:%.*]]
784; CHECK-NEXT:    [[R1:%.*]] = icmp ule i8 [[NOT_MASK0]], [[X:%.*]]
785; CHECK-NEXT:    [[NOT_COND:%.*]] = xor i1 [[COND:%.*]], true
786; CHECK-NEXT:    [[R:%.*]] = select i1 [[NOT_COND]], i1 true, i1 [[R1]]
787; CHECK-NEXT:    ret i1 [[R]]
788;
789  %not_mask0 = shl i8 -1, %y
790  %not_mask = select i1 %cond, i8 %not_mask0, i8 0
791  %and = and i8 %x, %not_mask
792  %r = icmp uge i8 %and, %not_mask
793  ret i1 %r
794}
795
796define i1 @src_x_and_nmask_slt(i8 %x, i8 %y) {
797; CHECK-LABEL: @src_x_and_nmask_slt(
798; CHECK-NEXT:    [[NOT_MASK:%.*]] = shl nsw i8 -1, [[Y:%.*]]
799; CHECK-NEXT:    [[R:%.*]] = icmp sgt i8 [[NOT_MASK]], [[X:%.*]]
800; CHECK-NEXT:    ret i1 [[R]]
801;
802  %not_mask = shl i8 -1, %y
803  %and = and i8 %x, %not_mask
804  %r = icmp slt i8 %and, %not_mask
805  ret i1 %r
806}
807
808define i1 @src_x_and_nmask_sge(i8 %x, i8 %y) {
809; CHECK-LABEL: @src_x_and_nmask_sge(
810; CHECK-NEXT:    [[NOT_MASK:%.*]] = shl nsw i8 -1, [[Y:%.*]]
811; CHECK-NEXT:    [[R:%.*]] = icmp sle i8 [[NOT_MASK]], [[X:%.*]]
812; CHECK-NEXT:    ret i1 [[R]]
813;
814  %not_mask = shl i8 -1, %y
815  %and = and i8 %x, %not_mask
816  %r = icmp sge i8 %and, %not_mask
817  ret i1 %r
818}
819
820define i1 @src_x_and_nmask_slt_fail_maybe_z(i8 %x, i8 %y, i1 %cond) {
821; CHECK-LABEL: @src_x_and_nmask_slt_fail_maybe_z(
822; CHECK-NEXT:    [[NOT_MASK0:%.*]] = shl nsw i8 -1, [[Y:%.*]]
823; CHECK-NEXT:    [[NOT_MASK:%.*]] = select i1 [[COND:%.*]], i8 [[NOT_MASK0]], i8 0
824; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X:%.*]], [[NOT_MASK]]
825; CHECK-NEXT:    [[R:%.*]] = icmp slt i8 [[AND]], [[NOT_MASK]]
826; CHECK-NEXT:    ret i1 [[R]]
827;
828  %not_mask0 = shl i8 -1, %y
829  %not_mask = select i1 %cond, i8 %not_mask0, i8 0
830  %and = and i8 %x, %not_mask
831  %r = icmp slt i8 %and, %not_mask
832  ret i1 %r
833}
834
835define i1 @src_x_and_nmask_sge_fail_maybe_z(i8 %x, i8 %y, i1 %cond) {
836; CHECK-LABEL: @src_x_and_nmask_sge_fail_maybe_z(
837; CHECK-NEXT:    [[NOT_MASK0:%.*]] = shl nsw i8 -1, [[Y:%.*]]
838; CHECK-NEXT:    [[NOT_MASK:%.*]] = select i1 [[COND:%.*]], i8 [[NOT_MASK0]], i8 0
839; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X:%.*]], [[NOT_MASK]]
840; CHECK-NEXT:    [[R:%.*]] = icmp sge i8 [[AND]], [[NOT_MASK]]
841; CHECK-NEXT:    ret i1 [[R]]
842;
843  %not_mask0 = shl i8 -1, %y
844  %not_mask = select i1 %cond, i8 %not_mask0, i8 0
845  %and = and i8 %x, %not_mask
846  %r = icmp sge i8 %and, %not_mask
847  ret i1 %r
848}
849
850define i1 @src_x_or_mask_eq(i8 %x, i8 %y, i8 %z, i1 %c2, i1 %cond) {
851; CHECK-LABEL: @src_x_or_mask_eq(
852; CHECK-NEXT:    [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
853; CHECK-NEXT:    [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
854; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[X:%.*]], -124
855; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[C2:%.*]], i8 [[TMP1]], i8 -46
856; CHECK-NEXT:    [[TMP3:%.*]] = call i8 @llvm.umax.i8(i8 [[Z:%.*]], i8 [[TMP2]])
857; CHECK-NEXT:    [[TMP4:%.*]] = add i8 [[TMP3]], -12
858; CHECK-NEXT:    [[R:%.*]] = icmp ule i8 [[TMP4]], [[MASK]]
859; CHECK-NEXT:    ret i1 [[R]]
860;
861  %mask0 = lshr i8 -1, %y
862  %mask = select i1 %cond, i8 %mask0, i8 0
863  %nx = xor i8 %x, 123
864  %nx_c = select i1 %c2, i8 %nx, i8 45
865  %nz = xor i8 %z, -1
866  %nx_cc = call i8 @llvm.umin.i8(i8 %nz, i8 %nx_c)
867  %nx_ccc = add i8 %nx_cc, 12
868  %or = or i8 %nx_ccc, %mask
869  %r = icmp eq i8 %or, -1
870  ret i1 %r
871}
872
873define i1 @src_x_or_mask_ne(i8 %x, i8 %y, i1 %cond) {
874; CHECK-LABEL: @src_x_or_mask_ne(
875; CHECK-NEXT:    [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
876; CHECK-NEXT:    [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
877; CHECK-NEXT:    [[R:%.*]] = icmp ugt i8 [[X:%.*]], [[MASK]]
878; CHECK-NEXT:    ret i1 [[R]]
879;
880  %mask0 = lshr i8 -1, %y
881  %mask = select i1 %cond, i8 %mask0, i8 0
882  %nx = xor i8 %x, -1
883  %or = or i8 %mask, %nx
884  %r = icmp ne i8 %or, -1
885  ret i1 %r
886}
887
888define i1 @src_x_or_mask_ne_fail_multiuse(i8 %x, i8 %y, i1 %cond) {
889; CHECK-LABEL: @src_x_or_mask_ne_fail_multiuse(
890; CHECK-NEXT:    [[MASK0:%.*]] = lshr i8 -1, [[Y:%.*]]
891; CHECK-NEXT:    [[MASK:%.*]] = select i1 [[COND:%.*]], i8 [[MASK0]], i8 0
892; CHECK-NEXT:    [[NX:%.*]] = xor i8 [[X:%.*]], -1
893; CHECK-NEXT:    [[OR:%.*]] = or i8 [[MASK]], [[NX]]
894; CHECK-NEXT:    call void @use.i8(i8 [[OR]])
895; CHECK-NEXT:    [[R:%.*]] = icmp ne i8 [[OR]], -1
896; CHECK-NEXT:    ret i1 [[R]]
897;
898  %mask0 = lshr i8 -1, %y
899  %mask = select i1 %cond, i8 %mask0, i8 0
900  %nx = xor i8 %x, -1
901  %or = or i8 %mask, %nx
902  call void @use.i8(i8 %or)
903  %r = icmp ne i8 %or, -1
904  ret i1 %r
905}
906