xref: /llvm-project/llvm/test/Transforms/InstCombine/abs_abs.ll (revision 2caaec65c04ea7d0e9568b7895b7a46d6100cb75) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=instcombine -S | FileCheck %s
3
4define i32 @abs_abs_x01(i32 %x) {
5; CHECK-LABEL: @abs_abs_x01(
6; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
7; CHECK-NEXT:    ret i32 [[COND]]
8;
9  %cmp = icmp sgt i32 %x, -1
10  %sub = sub nsw i32 0, %x
11  %cond = select i1 %cmp, i32 %x, i32 %sub
12  %cmp1 = icmp sgt i32 %cond, -1
13  %sub16 = sub nsw i32 0, %cond
14  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
15  ret i32 %cond18
16}
17
18define <2 x i32> @abs_abs_x01_vec(<2 x i32> %x) {
19; CHECK-LABEL: @abs_abs_x01_vec(
20; CHECK-NEXT:    [[COND:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
21; CHECK-NEXT:    ret <2 x i32> [[COND]]
22;
23  %cmp = icmp sgt <2 x i32> %x, <i32 -1, i32 -1>
24  %sub = sub nsw <2 x i32> zeroinitializer, %x
25  %cond = select <2 x i1> %cmp, <2 x i32> %x, <2 x i32> %sub
26  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
27  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
28  %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
29  ret <2 x i32> %cond18
30}
31
32define i32 @abs_abs_x02(i32 %x) {
33; CHECK-LABEL: @abs_abs_x02(
34; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
35; CHECK-NEXT:    ret i32 [[COND]]
36;
37  %cmp = icmp sgt i32 %x, 0
38  %sub = sub nsw i32 0, %x
39  %cond = select i1 %cmp, i32 %x, i32 %sub
40  %cmp1 = icmp sgt i32 %cond, -1
41  %sub16 = sub nsw i32 0, %cond
42  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
43  ret i32 %cond18
44}
45
46define i32 @abs_abs_x03(i32 %x) {
47; CHECK-LABEL: @abs_abs_x03(
48; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
49; CHECK-NEXT:    ret i32 [[COND]]
50;
51  %cmp = icmp slt i32 %x, 0
52  %sub = sub nsw i32 0, %x
53  %cond = select i1 %cmp, i32 %sub, i32 %x
54  %cmp1 = icmp sgt i32 %cond, -1
55  %sub16 = sub nsw i32 0, %cond
56  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
57  ret i32 %cond18
58}
59
60define i32 @abs_abs_x04(i32 %x) {
61; CHECK-LABEL: @abs_abs_x04(
62; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
63; CHECK-NEXT:    ret i32 [[COND]]
64;
65  %cmp = icmp slt i32 %x, 1
66  %sub = sub nsw i32 0, %x
67  %cond = select i1 %cmp, i32 %sub, i32 %x
68  %cmp1 = icmp sgt i32 %cond, -1
69  %sub16 = sub nsw i32 0, %cond
70  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
71  ret i32 %cond18
72}
73
74define <2 x i32> @abs_abs_x04_vec(<2 x i32> %x) {
75; CHECK-LABEL: @abs_abs_x04_vec(
76; CHECK-NEXT:    [[COND:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
77; CHECK-NEXT:    ret <2 x i32> [[COND]]
78;
79  %cmp = icmp slt <2 x i32> %x, <i32 1, i32 1>
80  %sub = sub nsw <2 x i32> zeroinitializer, %x
81  %cond = select <2 x i1> %cmp, <2 x i32> %sub, <2 x i32> %x
82  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
83  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
84  %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
85  ret <2 x i32> %cond18
86}
87
88define i32 @abs_abs_x05(i32 %x) {
89; CHECK-LABEL: @abs_abs_x05(
90; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
91; CHECK-NEXT:    ret i32 [[COND]]
92;
93  %cmp = icmp sgt i32 %x, -1
94  %sub = sub nsw i32 0, %x
95  %cond = select i1 %cmp, i32 %x, i32 %sub
96  %cmp1 = icmp sgt i32 %cond, 0
97  %sub16 = sub nsw i32 0, %cond
98  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
99  ret i32 %cond18
100}
101
102define i32 @abs_abs_x06(i32 %x) {
103; CHECK-LABEL: @abs_abs_x06(
104; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
105; CHECK-NEXT:    ret i32 [[COND]]
106;
107  %cmp = icmp sgt i32 %x, 0
108  %sub = sub nsw i32 0, %x
109  %cond = select i1 %cmp, i32 %x, i32 %sub
110  %cmp1 = icmp sgt i32 %cond, 0
111  %sub16 = sub nsw i32 0, %cond
112  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
113  ret i32 %cond18
114}
115
116define i32 @abs_abs_x07(i32 %x) {
117; CHECK-LABEL: @abs_abs_x07(
118; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
119; CHECK-NEXT:    ret i32 [[COND]]
120;
121  %cmp = icmp slt i32 %x, 0
122  %sub = sub nsw i32 0, %x
123  %cond = select i1 %cmp, i32 %sub, i32 %x
124  %cmp1 = icmp sgt i32 %cond, 0
125  %sub16 = sub nsw i32 0, %cond
126  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
127  ret i32 %cond18
128}
129
130define i32 @abs_abs_x08(i32 %x) {
131; CHECK-LABEL: @abs_abs_x08(
132; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
133; CHECK-NEXT:    ret i32 [[COND]]
134;
135  %cmp = icmp slt i32 %x, 1
136  %sub = sub nsw i32 0, %x
137  %cond = select i1 %cmp, i32 %sub, i32 %x
138  %cmp1 = icmp sgt i32 %cond, 0
139  %sub16 = sub nsw i32 0, %cond
140  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
141  ret i32 %cond18
142}
143
144define i32 @abs_abs_x09(i32 %x) {
145; CHECK-LABEL: @abs_abs_x09(
146; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
147; CHECK-NEXT:    ret i32 [[COND]]
148;
149  %cmp = icmp sgt i32 %x, -1
150  %sub = sub nsw i32 0, %x
151  %cond = select i1 %cmp, i32 %x, i32 %sub
152  %cmp1 = icmp slt i32 %cond, 0
153  %sub9 = sub nsw i32 0, %cond
154  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
155  ret i32 %cond18
156}
157
158define i32 @abs_abs_x10(i32 %x) {
159; CHECK-LABEL: @abs_abs_x10(
160; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
161; CHECK-NEXT:    ret i32 [[COND]]
162;
163  %cmp = icmp sgt i32 %x, 0
164  %sub = sub nsw i32 0, %x
165  %cond = select i1 %cmp, i32 %x, i32 %sub
166  %cmp1 = icmp slt i32 %cond, 0
167  %sub9 = sub nsw i32 0, %cond
168  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
169  ret i32 %cond18
170}
171
172define i32 @abs_abs_x11(i32 %x) {
173; CHECK-LABEL: @abs_abs_x11(
174; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
175; CHECK-NEXT:    ret i32 [[COND]]
176;
177  %cmp = icmp slt i32 %x, 0
178  %sub = sub nsw i32 0, %x
179  %cond = select i1 %cmp, i32 %sub, i32 %x
180  %cmp1 = icmp slt i32 %cond, 0
181  %sub9 = sub nsw i32 0, %cond
182  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
183  ret i32 %cond18
184}
185
186define i32 @abs_abs_x12(i32 %x) {
187; CHECK-LABEL: @abs_abs_x12(
188; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
189; CHECK-NEXT:    ret i32 [[COND]]
190;
191  %cmp = icmp slt i32 %x, 1
192  %sub = sub nsw i32 0, %x
193  %cond = select i1 %cmp, i32 %sub, i32 %x
194  %cmp1 = icmp slt i32 %cond, 0
195  %sub9 = sub nsw i32 0, %cond
196  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
197  ret i32 %cond18
198}
199
200define i32 @abs_abs_x13(i32 %x) {
201; CHECK-LABEL: @abs_abs_x13(
202; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
203; CHECK-NEXT:    ret i32 [[COND]]
204;
205  %cmp = icmp sgt i32 %x, -1
206  %sub = sub nsw i32 0, %x
207  %cond = select i1 %cmp, i32 %x, i32 %sub
208  %cmp1 = icmp slt i32 %cond, 1
209  %sub9 = sub nsw i32 0, %cond
210  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
211  ret i32 %cond18
212}
213
214define i32 @abs_abs_x14(i32 %x) {
215; CHECK-LABEL: @abs_abs_x14(
216; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
217; CHECK-NEXT:    ret i32 [[COND]]
218;
219  %cmp = icmp sgt i32 %x, 0
220  %sub = sub nsw i32 0, %x
221  %cond = select i1 %cmp, i32 %x, i32 %sub
222  %cmp1 = icmp slt i32 %cond, 1
223  %sub9 = sub nsw i32 0, %cond
224  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
225  ret i32 %cond18
226}
227
228define i32 @abs_abs_x15(i32 %x) {
229; CHECK-LABEL: @abs_abs_x15(
230; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
231; CHECK-NEXT:    ret i32 [[COND]]
232;
233  %cmp = icmp slt i32 %x, 0
234  %sub = sub nsw i32 0, %x
235  %cond = select i1 %cmp, i32 %sub, i32 %x
236  %cmp1 = icmp slt i32 %cond, 1
237  %sub9 = sub nsw i32 0, %cond
238  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
239  ret i32 %cond18
240}
241
242define i32 @abs_abs_x16(i32 %x) {
243; CHECK-LABEL: @abs_abs_x16(
244; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
245; CHECK-NEXT:    ret i32 [[COND]]
246;
247  %cmp = icmp slt i32 %x, 1
248  %sub = sub nsw i32 0, %x
249  %cond = select i1 %cmp, i32 %sub, i32 %x
250  %cmp1 = icmp slt i32 %cond, 1
251  %sub9 = sub nsw i32 0, %cond
252  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
253  ret i32 %cond18
254}
255
256; abs(abs(-x)) -> abs(-x) -> abs(x)
257define i32 @abs_abs_x17(i32 %x) {
258; CHECK-LABEL: @abs_abs_x17(
259; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
260; CHECK-NEXT:    ret i32 [[COND]]
261;
262  %sub = sub nsw i32 0, %x
263  %cmp = icmp sgt i32 %sub, -1
264  %cond = select i1 %cmp, i32 %sub, i32 %x
265  %cmp1 = icmp sgt i32 %cond, -1
266  %sub16 = sub nsw i32 0, %cond
267  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
268  ret i32 %cond18
269}
270
271; abs(abs(x - y)) -> abs(x - y)
272define i32 @abs_abs_x18(i32 %x, i32 %y) {
273; CHECK-LABEL: @abs_abs_x18(
274; CHECK-NEXT:    [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
275; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false)
276; CHECK-NEXT:    ret i32 [[COND]]
277;
278  %a = sub nsw i32 %x, %y
279  %b = sub nsw i32 %y, %x
280  %cmp = icmp sgt i32 %a, -1
281  %cond = select i1 %cmp, i32 %a, i32 %b
282  %cmp1 = icmp sgt i32 %cond, -1
283  %sub16 = sub nsw i32 0, %cond
284  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
285  ret i32 %cond18
286}
287
288; abs(abs(-x)) -> abs(-x) -> abs(x)
289define <2 x i32> @abs_abs_x02_vec(<2 x i32> %x) {
290; CHECK-LABEL: @abs_abs_x02_vec(
291; CHECK-NEXT:    [[COND:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
292; CHECK-NEXT:    ret <2 x i32> [[COND]]
293;
294  %sub = sub nsw <2 x i32> zeroinitializer, %x
295  %cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
296  %cond = select <2 x i1> %cmp, <2 x i32> %sub, <2 x i32> %x
297  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
298  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
299  %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
300  ret <2 x i32> %cond18
301}
302
303; abs(abs(x - y)) -> abs(x - y)
304define <2 x i32> @abs_abs_x03_vec(<2 x i32> %x, <2 x i32> %y) {
305; CHECK-LABEL: @abs_abs_x03_vec(
306; CHECK-NEXT:    [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
307; CHECK-NEXT:    [[COND:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[A]], i1 false)
308; CHECK-NEXT:    ret <2 x i32> [[COND]]
309;
310  %a = sub nsw <2 x i32> %x, %y
311  %b = sub nsw <2 x i32> %y, %x
312  %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
313  %cond = select <2 x i1> %cmp, <2 x i32> %a, <2 x i32> %b
314  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
315  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
316  %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
317  ret <2 x i32> %cond18
318}
319
320define i32 @nabs_nabs_x01(i32 %x) {
321; CHECK-LABEL: @nabs_nabs_x01(
322; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
323; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
324; CHECK-NEXT:    ret i32 [[COND18]]
325;
326  %cmp = icmp sgt i32 %x, -1
327  %sub = sub nsw i32 0, %x
328  %cond = select i1 %cmp, i32 %sub, i32 %x
329  %cmp1 = icmp sgt i32 %cond, -1
330  %sub9 = sub nsw i32 0, %cond
331  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
332  ret i32 %cond18
333}
334
335define i32 @nabs_nabs_x02(i32 %x) {
336; CHECK-LABEL: @nabs_nabs_x02(
337; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
338; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
339; CHECK-NEXT:    ret i32 [[COND18]]
340;
341  %cmp = icmp sgt i32 %x, 0
342  %sub = sub nsw i32 0, %x
343  %cond = select i1 %cmp, i32 %sub, i32 %x
344  %cmp1 = icmp sgt i32 %cond, -1
345  %sub9 = sub nsw i32 0, %cond
346  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
347  ret i32 %cond18
348}
349
350define i32 @nabs_nabs_x03(i32 %x) {
351; CHECK-LABEL: @nabs_nabs_x03(
352; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
353; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
354; CHECK-NEXT:    ret i32 [[COND18]]
355;
356  %cmp = icmp slt i32 %x, 0
357  %sub = sub nsw i32 0, %x
358  %cond = select i1 %cmp, i32 %x, i32 %sub
359  %cmp1 = icmp sgt i32 %cond, -1
360  %sub9 = sub nsw i32 0, %cond
361  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
362  ret i32 %cond18
363}
364
365define i32 @nabs_nabs_x04(i32 %x) {
366; CHECK-LABEL: @nabs_nabs_x04(
367; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
368; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
369; CHECK-NEXT:    ret i32 [[COND18]]
370;
371  %cmp = icmp slt i32 %x, 1
372  %sub = sub nsw i32 0, %x
373  %cond = select i1 %cmp, i32 %x, i32 %sub
374  %cmp1 = icmp sgt i32 %cond, -1
375  %sub9 = sub nsw i32 0, %cond
376  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
377  ret i32 %cond18
378}
379
380define i32 @nabs_nabs_x05(i32 %x) {
381; CHECK-LABEL: @nabs_nabs_x05(
382; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
383; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
384; CHECK-NEXT:    ret i32 [[COND18]]
385;
386  %cmp = icmp sgt i32 %x, -1
387  %sub = sub nsw i32 0, %x
388  %cond = select i1 %cmp, i32 %sub, i32 %x
389  %cmp1 = icmp sgt i32 %cond, 0
390  %sub9 = sub nsw i32 0, %cond
391  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
392  ret i32 %cond18
393}
394
395define i32 @nabs_nabs_x06(i32 %x) {
396; CHECK-LABEL: @nabs_nabs_x06(
397; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
398; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
399; CHECK-NEXT:    ret i32 [[COND18]]
400;
401  %cmp = icmp sgt i32 %x, 0
402  %sub = sub nsw i32 0, %x
403  %cond = select i1 %cmp, i32 %sub, i32 %x
404  %cmp1 = icmp sgt i32 %cond, 0
405  %sub9 = sub nsw i32 0, %cond
406  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
407  ret i32 %cond18
408}
409
410define i32 @nabs_nabs_x07(i32 %x) {
411; CHECK-LABEL: @nabs_nabs_x07(
412; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
413; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
414; CHECK-NEXT:    ret i32 [[COND18]]
415;
416  %cmp = icmp slt i32 %x, 0
417  %sub = sub nsw i32 0, %x
418  %cond = select i1 %cmp, i32 %x, i32 %sub
419  %cmp1 = icmp sgt i32 %cond, 0
420  %sub9 = sub nsw i32 0, %cond
421  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
422  ret i32 %cond18
423}
424
425define i32 @nabs_nabs_x08(i32 %x) {
426; CHECK-LABEL: @nabs_nabs_x08(
427; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
428; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
429; CHECK-NEXT:    ret i32 [[COND18]]
430;
431  %cmp = icmp slt i32 %x, 1
432  %sub = sub nsw i32 0, %x
433  %cond = select i1 %cmp, i32 %x, i32 %sub
434  %cmp1 = icmp sgt i32 %cond, 0
435  %sub9 = sub nsw i32 0, %cond
436  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
437  ret i32 %cond18
438}
439
440define i32 @nabs_nabs_x09(i32 %x) {
441; CHECK-LABEL: @nabs_nabs_x09(
442; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
443; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
444; CHECK-NEXT:    ret i32 [[COND18]]
445;
446  %cmp = icmp sgt i32 %x, -1
447  %sub = sub nsw i32 0, %x
448  %cond = select i1 %cmp, i32 %sub, i32 %x
449  %cmp1 = icmp slt i32 %cond, 0
450  %sub16 = sub nsw i32 0, %cond
451  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
452  ret i32 %cond18
453}
454
455define i32 @nabs_nabs_x10(i32 %x) {
456; CHECK-LABEL: @nabs_nabs_x10(
457; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
458; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
459; CHECK-NEXT:    ret i32 [[COND18]]
460;
461  %cmp = icmp sgt i32 %x, 0
462  %sub = sub nsw i32 0, %x
463  %cond = select i1 %cmp, i32 %sub, i32 %x
464  %cmp1 = icmp slt i32 %cond, 0
465  %sub16 = sub nsw i32 0, %cond
466  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
467  ret i32 %cond18
468}
469
470define i32 @nabs_nabs_x11(i32 %x) {
471; CHECK-LABEL: @nabs_nabs_x11(
472; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
473; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
474; CHECK-NEXT:    ret i32 [[COND18]]
475;
476  %cmp = icmp slt i32 %x, 0
477  %sub = sub nsw i32 0, %x
478  %cond = select i1 %cmp, i32 %x, i32 %sub
479  %cmp1 = icmp slt i32 %cond, 0
480  %sub16 = sub nsw i32 0, %cond
481  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
482  ret i32 %cond18
483}
484
485define i32 @nabs_nabs_x12(i32 %x) {
486; CHECK-LABEL: @nabs_nabs_x12(
487; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
488; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
489; CHECK-NEXT:    ret i32 [[COND18]]
490;
491  %cmp = icmp slt i32 %x, 1
492  %sub = sub nsw i32 0, %x
493  %cond = select i1 %cmp, i32 %x, i32 %sub
494  %cmp1 = icmp slt i32 %cond, 0
495  %sub16 = sub nsw i32 0, %cond
496  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
497  ret i32 %cond18
498}
499
500define i32 @nabs_nabs_x13(i32 %x) {
501; CHECK-LABEL: @nabs_nabs_x13(
502; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
503; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
504; CHECK-NEXT:    ret i32 [[COND18]]
505;
506  %cmp = icmp sgt i32 %x, -1
507  %sub = sub nsw i32 0, %x
508  %cond = select i1 %cmp, i32 %sub, i32 %x
509  %cmp1 = icmp slt i32 %cond, 1
510  %sub16 = sub nsw i32 0, %cond
511  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
512  ret i32 %cond18
513}
514
515define i32 @nabs_nabs_x14(i32 %x) {
516; CHECK-LABEL: @nabs_nabs_x14(
517; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
518; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
519; CHECK-NEXT:    ret i32 [[COND18]]
520;
521  %cmp = icmp sgt i32 %x, 0
522  %sub = sub nsw i32 0, %x
523  %cond = select i1 %cmp, i32 %sub, i32 %x
524  %cmp1 = icmp slt i32 %cond, 1
525  %sub16 = sub nsw i32 0, %cond
526  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
527  ret i32 %cond18
528}
529
530define i32 @nabs_nabs_x15(i32 %x) {
531; CHECK-LABEL: @nabs_nabs_x15(
532; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
533; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
534; CHECK-NEXT:    ret i32 [[COND18]]
535;
536  %cmp = icmp slt i32 %x, 0
537  %sub = sub nsw i32 0, %x
538  %cond = select i1 %cmp, i32 %x, i32 %sub
539  %cmp1 = icmp slt i32 %cond, 1
540  %sub16 = sub nsw i32 0, %cond
541  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
542  ret i32 %cond18
543}
544
545define i32 @nabs_nabs_x16(i32 %x) {
546; CHECK-LABEL: @nabs_nabs_x16(
547; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
548; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
549; CHECK-NEXT:    ret i32 [[COND18]]
550;
551  %cmp = icmp slt i32 %x, 1
552  %sub = sub nsw i32 0, %x
553  %cond = select i1 %cmp, i32 %x, i32 %sub
554  %cmp1 = icmp slt i32 %cond, 1
555  %sub16 = sub nsw i32 0, %cond
556  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
557  ret i32 %cond18
558}
559
560; nabs(nabs(-x)) -> nabs(-x) -> nabs(x)
561define i32 @nabs_nabs_x17(i32 %x) {
562; CHECK-LABEL: @nabs_nabs_x17(
563; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
564; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
565; CHECK-NEXT:    ret i32 [[COND18]]
566;
567  %sub = sub nsw i32 0, %x
568  %cmp = icmp sgt i32 %sub, -1
569  %cond = select i1 %cmp, i32 %x, i32 %sub
570  %cmp1 = icmp sgt i32 %cond, -1
571  %sub16 = sub nsw i32 0, %cond
572  %cond18 = select i1 %cmp1, i32 %sub16, i32 %cond
573  ret i32 %cond18
574}
575
576; nabs(nabs(x - y)) -> nabs(x - y)
577define i32 @nabs_nabs_x18(i32 %x, i32 %y) {
578; CHECK-LABEL: @nabs_nabs_x18(
579; CHECK-NEXT:    [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
580; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false)
581; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[TMP1]]
582; CHECK-NEXT:    ret i32 [[COND18]]
583;
584  %a = sub nsw i32 %x, %y
585  %b = sub nsw i32 %y, %x
586  %cmp = icmp sgt i32 %a, -1
587  %cond = select i1 %cmp, i32 %b, i32 %a
588  %cmp1 = icmp sgt i32 %cond, -1
589  %sub16 = sub nsw i32 0, %cond
590  %cond18 = select i1 %cmp1, i32 %sub16, i32 %cond
591  ret i32 %cond18
592}
593
594; nabs(nabs(-x)) -> nabs(-x) -> nabs(x)
595define <2 x i32> @nabs_nabs_x01_vec(<2 x i32> %x) {
596; CHECK-LABEL: @nabs_nabs_x01_vec(
597; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 false)
598; CHECK-NEXT:    [[COND18:%.*]] = sub <2 x i32> zeroinitializer, [[TMP1]]
599; CHECK-NEXT:    ret <2 x i32> [[COND18]]
600;
601  %sub = sub nsw <2 x i32> zeroinitializer, %x
602  %cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
603  %cond = select <2 x i1> %cmp, <2 x i32> %x, <2 x i32> %sub
604  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
605  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
606  %cond18 = select <2 x i1> %cmp1, <2 x i32> %sub16, <2 x i32> %cond
607  ret <2 x i32> %cond18
608}
609
610; nabs(nabs(x - y)) -> nabs(x - y)
611define <2 x i32> @nabs_nabs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
612; CHECK-LABEL: @nabs_nabs_x02_vec(
613; CHECK-NEXT:    [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
614; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[A]], i1 false)
615; CHECK-NEXT:    [[COND18:%.*]] = sub <2 x i32> zeroinitializer, [[TMP1]]
616; CHECK-NEXT:    ret <2 x i32> [[COND18]]
617;
618  %a = sub nsw <2 x i32> %x, %y
619  %b = sub nsw <2 x i32> %y, %x
620  %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
621  %cond = select <2 x i1> %cmp, <2 x i32> %b, <2 x i32> %a
622  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
623  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
624  %cond18 = select <2 x i1> %cmp1, <2 x i32> %sub16, <2 x i32> %cond
625  ret <2 x i32> %cond18
626}
627
628define i32 @abs_nabs_x01(i32 %x) {
629; CHECK-LABEL: @abs_nabs_x01(
630; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
631; CHECK-NEXT:    ret i32 [[TMP1]]
632;
633  %cmp = icmp sgt i32 %x, -1
634  %sub = sub nsw i32 0, %x
635  %cond = select i1 %cmp, i32 %sub, i32 %x
636  %cmp1 = icmp sgt i32 %cond, -1
637  %sub16 = sub nsw i32 0, %cond
638  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
639  ret i32 %cond18
640}
641
642define i32 @abs_nabs_x02(i32 %x) {
643; CHECK-LABEL: @abs_nabs_x02(
644; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
645; CHECK-NEXT:    ret i32 [[TMP1]]
646;
647  %cmp = icmp sgt i32 %x, 0
648  %sub = sub nsw i32 0, %x
649  %cond = select i1 %cmp, i32 %sub, i32 %x
650  %cmp1 = icmp sgt i32 %cond, -1
651  %sub16 = sub nsw i32 0, %cond
652  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
653  ret i32 %cond18
654}
655
656define i32 @abs_nabs_x03(i32 %x) {
657; CHECK-LABEL: @abs_nabs_x03(
658; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
659; CHECK-NEXT:    ret i32 [[TMP1]]
660;
661  %cmp = icmp slt i32 %x, 0
662  %sub = sub nsw i32 0, %x
663  %cond = select i1 %cmp, i32 %x, i32 %sub
664  %cmp1 = icmp sgt i32 %cond, -1
665  %sub16 = sub nsw i32 0, %cond
666  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
667  ret i32 %cond18
668}
669
670define i32 @abs_nabs_x04(i32 %x) {
671; CHECK-LABEL: @abs_nabs_x04(
672; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
673; CHECK-NEXT:    ret i32 [[TMP1]]
674;
675  %cmp = icmp slt i32 %x, 1
676  %sub = sub nsw i32 0, %x
677  %cond = select i1 %cmp, i32 %x, i32 %sub
678  %cmp1 = icmp sgt i32 %cond, -1
679  %sub16 = sub nsw i32 0, %cond
680  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
681  ret i32 %cond18
682}
683
684define i32 @abs_nabs_x05(i32 %x) {
685; CHECK-LABEL: @abs_nabs_x05(
686; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
687; CHECK-NEXT:    ret i32 [[TMP1]]
688;
689  %cmp = icmp sgt i32 %x, -1
690  %sub = sub nsw i32 0, %x
691  %cond = select i1 %cmp, i32 %sub, i32 %x
692  %cmp1 = icmp sgt i32 %cond, 0
693  %sub16 = sub nsw i32 0, %cond
694  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
695  ret i32 %cond18
696}
697
698define i32 @abs_nabs_x06(i32 %x) {
699; CHECK-LABEL: @abs_nabs_x06(
700; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
701; CHECK-NEXT:    ret i32 [[TMP1]]
702;
703  %cmp = icmp sgt i32 %x, 0
704  %sub = sub nsw i32 0, %x
705  %cond = select i1 %cmp, i32 %sub, i32 %x
706  %cmp1 = icmp sgt i32 %cond, 0
707  %sub16 = sub nsw i32 0, %cond
708  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
709  ret i32 %cond18
710}
711
712define i32 @abs_nabs_x07(i32 %x) {
713; CHECK-LABEL: @abs_nabs_x07(
714; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
715; CHECK-NEXT:    ret i32 [[TMP1]]
716;
717  %cmp = icmp slt i32 %x, 0
718  %sub = sub nsw i32 0, %x
719  %cond = select i1 %cmp, i32 %x, i32 %sub
720  %cmp1 = icmp sgt i32 %cond, 0
721  %sub16 = sub nsw i32 0, %cond
722  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
723  ret i32 %cond18
724}
725
726define i32 @abs_nabs_x08(i32 %x) {
727; CHECK-LABEL: @abs_nabs_x08(
728; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
729; CHECK-NEXT:    ret i32 [[TMP1]]
730;
731  %cmp = icmp slt i32 %x, 1
732  %sub = sub nsw i32 0, %x
733  %cond = select i1 %cmp, i32 %x, i32 %sub
734  %cmp1 = icmp sgt i32 %cond, 0
735  %sub16 = sub nsw i32 0, %cond
736  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
737  ret i32 %cond18
738}
739
740define i32 @abs_nabs_x09(i32 %x) {
741; CHECK-LABEL: @abs_nabs_x09(
742; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
743; CHECK-NEXT:    ret i32 [[TMP1]]
744;
745  %cmp = icmp sgt i32 %x, -1
746  %sub = sub nsw i32 0, %x
747  %cond = select i1 %cmp, i32 %sub, i32 %x
748  %cmp1 = icmp slt i32 %cond, 0
749  %sub9 = sub nsw i32 0, %cond
750  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
751  ret i32 %cond18
752}
753
754define i32 @abs_nabs_x10(i32 %x) {
755; CHECK-LABEL: @abs_nabs_x10(
756; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
757; CHECK-NEXT:    ret i32 [[TMP1]]
758;
759  %cmp = icmp sgt i32 %x, 0
760  %sub = sub nsw i32 0, %x
761  %cond = select i1 %cmp, i32 %sub, i32 %x
762  %cmp1 = icmp slt i32 %cond, 0
763  %sub9 = sub nsw i32 0, %cond
764  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
765  ret i32 %cond18
766}
767
768define i32 @abs_nabs_x11(i32 %x) {
769; CHECK-LABEL: @abs_nabs_x11(
770; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
771; CHECK-NEXT:    ret i32 [[TMP1]]
772;
773  %cmp = icmp slt i32 %x, 0
774  %sub = sub nsw i32 0, %x
775  %cond = select i1 %cmp, i32 %x, i32 %sub
776  %cmp1 = icmp slt i32 %cond, 0
777  %sub9 = sub nsw i32 0, %cond
778  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
779  ret i32 %cond18
780}
781
782define i32 @abs_nabs_x12(i32 %x) {
783; CHECK-LABEL: @abs_nabs_x12(
784; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
785; CHECK-NEXT:    ret i32 [[TMP1]]
786;
787  %cmp = icmp slt i32 %x, 1
788  %sub = sub nsw i32 0, %x
789  %cond = select i1 %cmp, i32 %x, i32 %sub
790  %cmp1 = icmp slt i32 %cond, 0
791  %sub9 = sub nsw i32 0, %cond
792  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
793  ret i32 %cond18
794}
795
796define i32 @abs_nabs_x13(i32 %x) {
797; CHECK-LABEL: @abs_nabs_x13(
798; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
799; CHECK-NEXT:    ret i32 [[TMP1]]
800;
801  %cmp = icmp sgt i32 %x, -1
802  %sub = sub nsw i32 0, %x
803  %cond = select i1 %cmp, i32 %sub, i32 %x
804  %cmp1 = icmp slt i32 %cond, 1
805  %sub9 = sub nsw i32 0, %cond
806  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
807  ret i32 %cond18
808}
809
810define i32 @abs_nabs_x14(i32 %x) {
811; CHECK-LABEL: @abs_nabs_x14(
812; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
813; CHECK-NEXT:    ret i32 [[TMP1]]
814;
815  %cmp = icmp sgt i32 %x, 0
816  %sub = sub nsw i32 0, %x
817  %cond = select i1 %cmp, i32 %sub, i32 %x
818  %cmp1 = icmp slt i32 %cond, 1
819  %sub9 = sub nsw i32 0, %cond
820  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
821  ret i32 %cond18
822}
823
824define i32 @abs_nabs_x15(i32 %x) {
825; CHECK-LABEL: @abs_nabs_x15(
826; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
827; CHECK-NEXT:    ret i32 [[TMP1]]
828;
829  %cmp = icmp slt i32 %x, 0
830  %sub = sub nsw i32 0, %x
831  %cond = select i1 %cmp, i32 %x, i32 %sub
832  %cmp1 = icmp slt i32 %cond, 1
833  %sub9 = sub nsw i32 0, %cond
834  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
835  ret i32 %cond18
836}
837
838define i32 @abs_nabs_x16(i32 %x) {
839; CHECK-LABEL: @abs_nabs_x16(
840; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
841; CHECK-NEXT:    ret i32 [[TMP1]]
842;
843  %cmp = icmp slt i32 %x, 1
844  %sub = sub nsw i32 0, %x
845  %cond = select i1 %cmp, i32 %x, i32 %sub
846  %cmp1 = icmp slt i32 %cond, 1
847  %sub9 = sub nsw i32 0, %cond
848  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
849  ret i32 %cond18
850}
851
852; abs(nabs(-x)) -> abs(-x) -> abs(x)
853define i32 @abs_nabs_x17(i32 %x) {
854; CHECK-LABEL: @abs_nabs_x17(
855; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
856; CHECK-NEXT:    ret i32 [[TMP1]]
857;
858  %sub = sub nsw i32 0, %x
859  %cmp = icmp sgt i32 %sub, -1
860  %cond = select i1 %cmp, i32 %x, i32 %sub
861  %cmp1 = icmp sgt i32 %cond, -1
862  %sub16 = sub nsw i32 0, %cond
863  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
864  ret i32 %cond18
865}
866
867; abs(nabs(x - y)) -> abs(x - y)
868define i32 @abs_nabs_x18(i32 %x, i32 %y) {
869; CHECK-LABEL: @abs_nabs_x18(
870; CHECK-NEXT:    [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
871; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false)
872; CHECK-NEXT:    ret i32 [[TMP1]]
873;
874  %a = sub nsw i32 %x, %y
875  %b = sub nsw i32 %y, %x
876  %cmp = icmp sgt i32 %a, -1
877  %cond = select i1 %cmp, i32 %b, i32 %a
878  %cmp1 = icmp sgt i32 %cond, -1
879  %sub16 = sub nsw i32 0, %cond
880  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
881  ret i32 %cond18
882}
883
884; abs(nabs(-x)) -> abs(-x) -> abs(x)
885define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) {
886; CHECK-LABEL: @abs_nabs_x01_vec(
887; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 false)
888; CHECK-NEXT:    ret <2 x i32> [[TMP1]]
889;
890  %sub = sub nsw <2 x i32> zeroinitializer, %x
891  %cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
892  %cond = select <2 x i1> %cmp, <2 x i32> %x, <2 x i32> %sub
893  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
894  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
895  %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
896  ret <2 x i32> %cond18
897}
898
899; abs(nabs(x - y)) -> abs(x - y)
900define <2 x i32> @abs_nabs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
901; CHECK-LABEL: @abs_nabs_x02_vec(
902; CHECK-NEXT:    [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
903; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[A]], i1 false)
904; CHECK-NEXT:    ret <2 x i32> [[TMP1]]
905;
906  %a = sub nsw <2 x i32> %x, %y
907  %b = sub nsw <2 x i32> %y, %x
908  %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
909  %cond = select <2 x i1> %cmp, <2 x i32> %b, <2 x i32> %a
910  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
911  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
912  %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
913  ret <2 x i32> %cond18
914}
915
916define i32 @nabs_abs_x01(i32 %x) {
917; CHECK-LABEL: @nabs_abs_x01(
918; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
919; CHECK-NEXT:    [[SUB9:%.*]] = sub nsw i32 0, [[COND]]
920; CHECK-NEXT:    ret i32 [[SUB9]]
921;
922  %cmp = icmp sgt i32 %x, -1
923  %sub = sub nsw i32 0, %x
924  %cond = select i1 %cmp, i32 %x, i32 %sub
925  %cmp1 = icmp sgt i32 %cond, -1
926  %sub9 = sub nsw i32 0, %cond
927  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
928  ret i32 %cond18
929}
930
931define i32 @nabs_abs_x02(i32 %x) {
932; CHECK-LABEL: @nabs_abs_x02(
933; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
934; CHECK-NEXT:    [[SUB9:%.*]] = sub nsw i32 0, [[COND]]
935; CHECK-NEXT:    ret i32 [[SUB9]]
936;
937  %cmp = icmp sgt i32 %x, 0
938  %sub = sub nsw i32 0, %x
939  %cond = select i1 %cmp, i32 %x, i32 %sub
940  %cmp1 = icmp sgt i32 %cond, -1
941  %sub9 = sub nsw i32 0, %cond
942  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
943  ret i32 %cond18
944}
945
946define i32 @nabs_abs_x03(i32 %x) {
947; CHECK-LABEL: @nabs_abs_x03(
948; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
949; CHECK-NEXT:    [[SUB9:%.*]] = sub nsw i32 0, [[COND]]
950; CHECK-NEXT:    ret i32 [[SUB9]]
951;
952  %cmp = icmp slt i32 %x, 0
953  %sub = sub nsw i32 0, %x
954  %cond = select i1 %cmp, i32 %sub, i32 %x
955  %cmp1 = icmp sgt i32 %cond, -1
956  %sub9 = sub nsw i32 0, %cond
957  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
958  ret i32 %cond18
959}
960
961define i32 @nabs_abs_x04(i32 %x) {
962; CHECK-LABEL: @nabs_abs_x04(
963; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
964; CHECK-NEXT:    [[SUB9:%.*]] = sub nsw i32 0, [[COND]]
965; CHECK-NEXT:    ret i32 [[SUB9]]
966;
967  %cmp = icmp slt i32 %x, 1
968  %sub = sub nsw i32 0, %x
969  %cond = select i1 %cmp, i32 %sub, i32 %x
970  %cmp1 = icmp sgt i32 %cond, -1
971  %sub9 = sub nsw i32 0, %cond
972  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
973  ret i32 %cond18
974}
975
976define i32 @nabs_abs_x05(i32 %x) {
977; CHECK-LABEL: @nabs_abs_x05(
978; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
979; CHECK-NEXT:    [[SUB9:%.*]] = sub nsw i32 0, [[COND]]
980; CHECK-NEXT:    ret i32 [[SUB9]]
981;
982  %cmp = icmp sgt i32 %x, -1
983  %sub = sub nsw i32 0, %x
984  %cond = select i1 %cmp, i32 %x, i32 %sub
985  %cmp1 = icmp sgt i32 %cond, 0
986  %sub9 = sub nsw i32 0, %cond
987  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
988  ret i32 %cond18
989}
990
991define i32 @nabs_abs_x06(i32 %x) {
992; CHECK-LABEL: @nabs_abs_x06(
993; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
994; CHECK-NEXT:    [[SUB9:%.*]] = sub nsw i32 0, [[COND]]
995; CHECK-NEXT:    ret i32 [[SUB9]]
996;
997  %cmp = icmp sgt i32 %x, 0
998  %sub = sub nsw i32 0, %x
999  %cond = select i1 %cmp, i32 %x, i32 %sub
1000  %cmp1 = icmp sgt i32 %cond, 0
1001  %sub9 = sub nsw i32 0, %cond
1002  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
1003  ret i32 %cond18
1004}
1005
1006define i32 @nabs_abs_x07(i32 %x) {
1007; CHECK-LABEL: @nabs_abs_x07(
1008; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
1009; CHECK-NEXT:    [[SUB9:%.*]] = sub nsw i32 0, [[COND]]
1010; CHECK-NEXT:    ret i32 [[SUB9]]
1011;
1012  %cmp = icmp slt i32 %x, 0
1013  %sub = sub nsw i32 0, %x
1014  %cond = select i1 %cmp, i32 %sub, i32 %x
1015  %cmp1 = icmp sgt i32 %cond, 0
1016  %sub9 = sub nsw i32 0, %cond
1017  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
1018  ret i32 %cond18
1019}
1020
1021define i32 @nabs_abs_x08(i32 %x) {
1022; CHECK-LABEL: @nabs_abs_x08(
1023; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
1024; CHECK-NEXT:    [[SUB9:%.*]] = sub nsw i32 0, [[COND]]
1025; CHECK-NEXT:    ret i32 [[SUB9]]
1026;
1027  %cmp = icmp slt i32 %x, 1
1028  %sub = sub nsw i32 0, %x
1029  %cond = select i1 %cmp, i32 %sub, i32 %x
1030  %cmp1 = icmp sgt i32 %cond, 0
1031  %sub9 = sub nsw i32 0, %cond
1032  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
1033  ret i32 %cond18
1034}
1035
1036define i32 @nabs_abs_x09(i32 %x) {
1037; CHECK-LABEL: @nabs_abs_x09(
1038; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
1039; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
1040; CHECK-NEXT:    ret i32 [[SUB16]]
1041;
1042  %cmp = icmp sgt i32 %x, -1
1043  %sub = sub nsw i32 0, %x
1044  %cond = select i1 %cmp, i32 %x, i32 %sub
1045  %cmp1 = icmp slt i32 %cond, 0
1046  %sub16 = sub nsw i32 0, %cond
1047  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
1048  ret i32 %cond18
1049}
1050
1051define i32 @nabs_abs_x10(i32 %x) {
1052; CHECK-LABEL: @nabs_abs_x10(
1053; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
1054; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
1055; CHECK-NEXT:    ret i32 [[SUB16]]
1056;
1057  %cmp = icmp sgt i32 %x, 0
1058  %sub = sub nsw i32 0, %x
1059  %cond = select i1 %cmp, i32 %x, i32 %sub
1060  %cmp1 = icmp slt i32 %cond, 0
1061  %sub16 = sub nsw i32 0, %cond
1062  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
1063  ret i32 %cond18
1064}
1065
1066define i32 @nabs_abs_x11(i32 %x) {
1067; CHECK-LABEL: @nabs_abs_x11(
1068; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
1069; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
1070; CHECK-NEXT:    ret i32 [[SUB16]]
1071;
1072  %cmp = icmp slt i32 %x, 0
1073  %sub = sub nsw i32 0, %x
1074  %cond = select i1 %cmp, i32 %sub, i32 %x
1075  %cmp1 = icmp slt i32 %cond, 0
1076  %sub16 = sub nsw i32 0, %cond
1077  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
1078  ret i32 %cond18
1079}
1080
1081define i32 @nabs_abs_x12(i32 %x) {
1082; CHECK-LABEL: @nabs_abs_x12(
1083; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
1084; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
1085; CHECK-NEXT:    ret i32 [[SUB16]]
1086;
1087  %cmp = icmp slt i32 %x, 1
1088  %sub = sub nsw i32 0, %x
1089  %cond = select i1 %cmp, i32 %sub, i32 %x
1090  %cmp1 = icmp slt i32 %cond, 0
1091  %sub16 = sub nsw i32 0, %cond
1092  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
1093  ret i32 %cond18
1094}
1095
1096define i32 @nabs_abs_x13(i32 %x) {
1097; CHECK-LABEL: @nabs_abs_x13(
1098; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
1099; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
1100; CHECK-NEXT:    ret i32 [[SUB16]]
1101;
1102  %cmp = icmp sgt i32 %x, -1
1103  %sub = sub nsw i32 0, %x
1104  %cond = select i1 %cmp, i32 %x, i32 %sub
1105  %cmp1 = icmp slt i32 %cond, 1
1106  %sub16 = sub nsw i32 0, %cond
1107  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
1108  ret i32 %cond18
1109}
1110
1111define i32 @nabs_abs_x14(i32 %x) {
1112; CHECK-LABEL: @nabs_abs_x14(
1113; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
1114; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
1115; CHECK-NEXT:    ret i32 [[SUB16]]
1116;
1117  %cmp = icmp sgt i32 %x, 0
1118  %sub = sub nsw i32 0, %x
1119  %cond = select i1 %cmp, i32 %x, i32 %sub
1120  %cmp1 = icmp slt i32 %cond, 1
1121  %sub16 = sub nsw i32 0, %cond
1122  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
1123  ret i32 %cond18
1124}
1125
1126define i32 @nabs_abs_x15(i32 %x) {
1127; CHECK-LABEL: @nabs_abs_x15(
1128; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
1129; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
1130; CHECK-NEXT:    ret i32 [[SUB16]]
1131;
1132  %cmp = icmp slt i32 %x, 0
1133  %sub = sub nsw i32 0, %x
1134  %cond = select i1 %cmp, i32 %sub, i32 %x
1135  %cmp1 = icmp slt i32 %cond, 1
1136  %sub16 = sub nsw i32 0, %cond
1137  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
1138  ret i32 %cond18
1139}
1140
1141define i32 @nabs_abs_x16(i32 %x) {
1142; CHECK-LABEL: @nabs_abs_x16(
1143; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
1144; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
1145; CHECK-NEXT:    ret i32 [[SUB16]]
1146;
1147  %cmp = icmp slt i32 %x, 1
1148  %sub = sub nsw i32 0, %x
1149  %cond = select i1 %cmp, i32 %sub, i32 %x
1150  %cmp1 = icmp slt i32 %cond, 1
1151  %sub16 = sub nsw i32 0, %cond
1152  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
1153  ret i32 %cond18
1154}
1155
1156; nabs(abs(-x)) -> nabs(-x) -> nabs(x)
1157define i32 @nabs_abs_x17(i32 %x) {
1158; CHECK-LABEL: @nabs_abs_x17(
1159; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
1160; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw i32 0, [[COND]]
1161; CHECK-NEXT:    ret i32 [[SUB16]]
1162;
1163  %sub = sub nsw i32 0, %x
1164  %cmp = icmp sgt i32 %sub, -1
1165  %cond = select i1 %cmp, i32 %sub, i32 %x
1166  %cmp1 = icmp sgt i32 %cond, -1
1167  %sub16 = sub nsw i32 0, %cond
1168  %cond18 = select i1 %cmp1, i32 %sub16, i32 %cond
1169  ret i32 %cond18
1170}
1171
1172; nabs(abs(x - y)) -> nabs(x - y)
1173define i32 @nabs_abs_x18(i32 %x, i32 %y) {
1174; CHECK-LABEL: @nabs_abs_x18(
1175; CHECK-NEXT:    [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
1176; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false)
1177; CHECK-NEXT:    [[COND18:%.*]] = sub i32 0, [[COND]]
1178; CHECK-NEXT:    ret i32 [[COND18]]
1179;
1180  %a = sub nsw i32 %x, %y
1181  %b = sub nsw i32 %y, %x
1182  %cmp = icmp sgt i32 %a, -1
1183  %cond = select i1 %cmp, i32 %a, i32 %b
1184  %cmp1 = icmp sgt i32 %cond, -1
1185  %sub16 = sub nsw i32 0, %cond
1186  %cond18 = select i1 %cmp1, i32 %sub16, i32 %cond
1187  ret i32 %cond18
1188}
1189
1190; nabs(abs(-x)) -> nabs(-x) -> nabs(x)
1191define <2 x i32> @nabs_abs_x01_vec(<2 x i32> %x) {
1192; CHECK-LABEL: @nabs_abs_x01_vec(
1193; CHECK-NEXT:    [[COND:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
1194; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
1195; CHECK-NEXT:    ret <2 x i32> [[SUB16]]
1196;
1197  %sub = sub nsw <2 x i32> zeroinitializer, %x
1198  %cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
1199  %cond = select <2 x i1> %cmp, <2 x i32> %sub, <2 x i32> %x
1200  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
1201  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
1202  %cond18 = select <2 x i1> %cmp1, <2 x i32> %sub16, <2 x i32> %cond
1203  ret <2 x i32> %cond18
1204}
1205
1206; nabs(abs(x - y)) -> nabs(x - y)
1207define <2 x i32> @nabs_abs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
1208; CHECK-LABEL: @nabs_abs_x02_vec(
1209; CHECK-NEXT:    [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
1210; CHECK-NEXT:    [[COND:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[A]], i1 false)
1211; CHECK-NEXT:    [[COND18:%.*]] = sub <2 x i32> zeroinitializer, [[COND]]
1212; CHECK-NEXT:    ret <2 x i32> [[COND18]]
1213;
1214  %a = sub nsw <2 x i32> %x, %y
1215  %b = sub nsw <2 x i32> %y, %x
1216  %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
1217  %cond = select <2 x i1> %cmp, <2 x i32> %a, <2 x i32> %b
1218  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
1219  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
1220  %cond18 = select <2 x i1> %cmp1, <2 x i32> %sub16, <2 x i32> %cond
1221  ret <2 x i32> %cond18
1222}
1223