1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | FileCheck %s 3 4declare <8 x i32> @llvm.x86.avx2.permd(<8 x i32>, <8 x i32>) 5 6define <8 x i32> @identity_test_permvar_si_256(<8 x i32> %a0) { 7; CHECK-LABEL: @identity_test_permvar_si_256( 8; CHECK-NEXT: ret <8 x i32> [[A0:%.*]] 9; 10 %1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>) 11 ret <8 x i32> %1 12} 13 14define <8 x i32> @identity_test_permvar_si_256_mask(<8 x i32> %a0, <8 x i32> %passthru, i8 %mask) { 15; CHECK-LABEL: @identity_test_permvar_si_256_mask( 16; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 17; CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i32> [[A0:%.*]], <8 x i32> [[PASSTHRU:%.*]] 18; CHECK-NEXT: ret <8 x i32> [[TMP2]] 19; 20 %1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>) 21 %2 = bitcast i8 %mask to <8 x i1> 22 %3 = select <8 x i1> %2, <8 x i32> %1, <8 x i32> %passthru 23 ret <8 x i32> %3 24} 25 26define <8 x i32> @zero_test_permvar_si_256(<8 x i32> %a0) { 27; CHECK-LABEL: @zero_test_permvar_si_256( 28; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> poison, <8 x i32> zeroinitializer 29; CHECK-NEXT: ret <8 x i32> [[TMP1]] 30; 31 %1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> zeroinitializer) 32 ret <8 x i32> %1 33} 34 35define <8 x i32> @zero_test_permvar_si_256_mask(<8 x i32> %a0, <8 x i32> %passthru, i8 %mask) { 36; CHECK-LABEL: @zero_test_permvar_si_256_mask( 37; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> poison, <8 x i32> zeroinitializer 38; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 39; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x i32> [[TMP1]], <8 x i32> [[PASSTHRU:%.*]] 40; CHECK-NEXT: ret <8 x i32> [[TMP3]] 41; 42 %1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> zeroinitializer) 43 %2 = bitcast i8 %mask to <8 x i1> 44 %3 = select <8 x i1> %2, <8 x i32> %1, <8 x i32> %passthru 45 ret <8 x i32> %3 46} 47 48define <8 x i32> @shuffle_test_permvar_si_256(<8 x i32> %a0) { 49; CHECK-LABEL: @shuffle_test_permvar_si_256( 50; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 51; CHECK-NEXT: ret <8 x i32> [[TMP1]] 52; 53 %1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 54 ret <8 x i32> %1 55} 56 57define <8 x i32> @shuffle_test_permvar_si_256_mask(<8 x i32> %a0, <8 x i32> %passthru, i8 %mask) { 58; CHECK-LABEL: @shuffle_test_permvar_si_256_mask( 59; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 60; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 61; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x i32> [[TMP1]], <8 x i32> [[PASSTHRU:%.*]] 62; CHECK-NEXT: ret <8 x i32> [[TMP3]] 63; 64 %1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 65 %2 = bitcast i8 %mask to <8 x i1> 66 %3 = select <8 x i1> %2, <8 x i32> %1, <8 x i32> %passthru 67 ret <8 x i32> %3 68} 69 70define <8 x i32> @undef_test_permvar_si_256(<8 x i32> %a0) { 71; CHECK-LABEL: @undef_test_permvar_si_256( 72; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 73; CHECK-NEXT: ret <8 x i32> [[TMP1]] 74; 75 %1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 76 ret <8 x i32> %1 77} 78 79define <8 x i32> @undef_test_permvar_si_256_mask(<8 x i32> %a0, <8 x i32> %passthru, i8 %mask) { 80; CHECK-LABEL: @undef_test_permvar_si_256_mask( 81; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[A0:%.*]], <8 x i32> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 82; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 83; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x i32> [[TMP1]], <8 x i32> [[PASSTHRU:%.*]] 84; CHECK-NEXT: ret <8 x i32> [[TMP3]] 85; 86 %1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 87 %2 = bitcast i8 %mask to <8 x i1> 88 %3 = select <8 x i1> %2, <8 x i32> %1, <8 x i32> %passthru 89 ret <8 x i32> %3 90} 91 92define <8 x i32> @demandedbit_test_permvar_si_256_mask(<8 x i32> %a0, <8 x i32> %a1) { 93; CHECK-LABEL: @demandedbit_test_permvar_si_256_mask( 94; CHECK-NEXT: [[S:%.*]] = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> [[A0:%.*]], <8 x i32> [[A1:%.*]]) 95; CHECK-NEXT: ret <8 x i32> [[S]] 96; 97 %m = or <8 x i32> %a1, <i32 0, i32 8, i32 -8, i32 16, i32 -16, i32 32, i32 -32, i32 64> 98 %s = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> %m) 99 ret <8 x i32> %s 100} 101 102declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x i32>) 103 104define <8 x float> @identity_test_permvar_sf_256(<8 x float> %a0) { 105; CHECK-LABEL: @identity_test_permvar_sf_256( 106; CHECK-NEXT: ret <8 x float> [[A0:%.*]] 107; 108 %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>) 109 ret <8 x float> %1 110} 111 112define <8 x float> @identity_test_permvar_sf_256_mask(<8 x float> %a0, <8 x float> %passthru, i8 %mask) { 113; CHECK-LABEL: @identity_test_permvar_sf_256_mask( 114; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 115; CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x float> [[A0:%.*]], <8 x float> [[PASSTHRU:%.*]] 116; CHECK-NEXT: ret <8 x float> [[TMP2]] 117; 118 %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>) 119 %2 = bitcast i8 %mask to <8 x i1> 120 %3 = select <8 x i1> %2, <8 x float> %1, <8 x float> %passthru 121 ret <8 x float> %3 122} 123 124define <8 x float> @zero_test_permvar_sf_256(<8 x float> %a0) { 125; CHECK-LABEL: @zero_test_permvar_sf_256( 126; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> zeroinitializer 127; CHECK-NEXT: ret <8 x float> [[TMP1]] 128; 129 %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> zeroinitializer) 130 ret <8 x float> %1 131} 132 133define <8 x float> @zero_test_permvar_sf_256_mask(<8 x float> %a0, <8 x float> %passthru, i8 %mask) { 134; CHECK-LABEL: @zero_test_permvar_sf_256_mask( 135; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> zeroinitializer 136; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 137; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x float> [[TMP1]], <8 x float> [[PASSTHRU:%.*]] 138; CHECK-NEXT: ret <8 x float> [[TMP3]] 139; 140 %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> zeroinitializer) 141 %2 = bitcast i8 %mask to <8 x i1> 142 %3 = select <8 x i1> %2, <8 x float> %1, <8 x float> %passthru 143 ret <8 x float> %3 144} 145 146define <8 x float> @shuffle_test_permvar_sf_256(<8 x float> %a0) { 147; CHECK-LABEL: @shuffle_test_permvar_sf_256( 148; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 149; CHECK-NEXT: ret <8 x float> [[TMP1]] 150; 151 %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 152 ret <8 x float> %1 153} 154 155define <8 x float> @shuffle_test_permvar_sf_256_mask(<8 x float> %a0, <8 x float> %passthru, i8 %mask) { 156; CHECK-LABEL: @shuffle_test_permvar_sf_256_mask( 157; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 158; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 159; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x float> [[TMP1]], <8 x float> [[PASSTHRU:%.*]] 160; CHECK-NEXT: ret <8 x float> [[TMP3]] 161; 162 %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 163 %2 = bitcast i8 %mask to <8 x i1> 164 %3 = select <8 x i1> %2, <8 x float> %1, <8 x float> %passthru 165 ret <8 x float> %3 166} 167 168define <8 x float> @undef_test_permvar_sf_256(<8 x float> %a0) { 169; CHECK-LABEL: @undef_test_permvar_sf_256( 170; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 171; CHECK-NEXT: ret <8 x float> [[TMP1]] 172; 173 %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 174 ret <8 x float> %1 175} 176 177define <8 x float> @undef_test_permvar_sf_256_mask(<8 x float> %a0, <8 x float> %passthru, i8 %mask) { 178; CHECK-LABEL: @undef_test_permvar_sf_256_mask( 179; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A0:%.*]], <8 x float> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 180; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 181; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x float> [[TMP1]], <8 x float> [[PASSTHRU:%.*]] 182; CHECK-NEXT: ret <8 x float> [[TMP3]] 183; 184 %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 undef, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 185 %2 = bitcast i8 %mask to <8 x i1> 186 %3 = select <8 x i1> %2, <8 x float> %1, <8 x float> %passthru 187 ret <8 x float> %3 188} 189 190define <8 x float> @demandedbit_test_permvar_sf_256_mask(<8 x float> %a0, <8 x i32> %a1) { 191; CHECK-LABEL: @demandedbit_test_permvar_sf_256_mask( 192; CHECK-NEXT: [[S:%.*]] = call <8 x float> @llvm.x86.avx2.permps(<8 x float> [[A0:%.*]], <8 x i32> [[A1:%.*]]) 193; CHECK-NEXT: ret <8 x float> [[S]] 194; 195 %m = or <8 x i32> %a1, <i32 0, i32 8, i32 -8, i32 16, i32 -16, i32 32, i32 -32, i32 64> 196 %s = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> %m) 197 ret <8 x float> %s 198} 199 200declare <4 x i64> @llvm.x86.avx512.permvar.di.256(<4 x i64>, <4 x i64>) 201 202define <4 x i64> @identity_test_permvar_di_256(<4 x i64> %a0) { 203; CHECK-LABEL: @identity_test_permvar_di_256( 204; CHECK-NEXT: ret <4 x i64> [[A0:%.*]] 205; 206 %1 = call <4 x i64> @llvm.x86.avx512.permvar.di.256(<4 x i64> %a0, <4 x i64> <i64 0, i64 1, i64 2, i64 3>) 207 ret <4 x i64> %1 208} 209 210define <4 x i64> @identity_test_permvar_di_256_mask(<4 x i64> %a0, <4 x i64> %passthru, i8 %mask) { 211; CHECK-LABEL: @identity_test_permvar_di_256_mask( 212; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 213; CHECK-NEXT: [[EXTRACT:%.*]] = shufflevector <8 x i1> [[TMP1]], <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 214; CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[EXTRACT]], <4 x i64> [[A0:%.*]], <4 x i64> [[PASSTHRU:%.*]] 215; CHECK-NEXT: ret <4 x i64> [[TMP2]] 216; 217 %1 = call <4 x i64> @llvm.x86.avx512.permvar.di.256(<4 x i64> %a0, <4 x i64> <i64 0, i64 1, i64 2, i64 3>) 218 %2 = bitcast i8 %mask to <8 x i1> 219 %extract = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 220 %3 = select <4 x i1> %extract, <4 x i64> %1, <4 x i64> %passthru 221 ret <4 x i64> %3 222} 223 224define <4 x i64> @zero_test_permvar_di_256(<4 x i64> %a0) { 225; CHECK-LABEL: @zero_test_permvar_di_256( 226; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i64> [[A0:%.*]], <4 x i64> poison, <4 x i32> zeroinitializer 227; CHECK-NEXT: ret <4 x i64> [[TMP1]] 228; 229 %1 = call <4 x i64> @llvm.x86.avx512.permvar.di.256(<4 x i64> %a0, <4 x i64> zeroinitializer) 230 ret <4 x i64> %1 231} 232 233define <4 x i64> @zero_test_permvar_di_256_mask(<4 x i64> %a0, <4 x i64> %passthru, i8 %mask) { 234; CHECK-LABEL: @zero_test_permvar_di_256_mask( 235; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i64> [[A0:%.*]], <4 x i64> poison, <4 x i32> zeroinitializer 236; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 237; CHECK-NEXT: [[EXTRACT:%.*]] = shufflevector <8 x i1> [[TMP2]], <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 238; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[EXTRACT]], <4 x i64> [[TMP1]], <4 x i64> [[PASSTHRU:%.*]] 239; CHECK-NEXT: ret <4 x i64> [[TMP3]] 240; 241 %1 = call <4 x i64> @llvm.x86.avx512.permvar.di.256(<4 x i64> %a0, <4 x i64> zeroinitializer) 242 %2 = bitcast i8 %mask to <8 x i1> 243 %extract = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 244 %3 = select <4 x i1> %extract, <4 x i64> %1, <4 x i64> %passthru 245 ret <4 x i64> %3 246} 247 248define <4 x i64> @shuffle_test_permvar_di_256(<4 x i64> %a0) { 249; CHECK-LABEL: @shuffle_test_permvar_di_256( 250; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i64> [[A0:%.*]], <4 x i64> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 251; CHECK-NEXT: ret <4 x i64> [[TMP1]] 252; 253 %1 = call <4 x i64> @llvm.x86.avx512.permvar.di.256(<4 x i64> %a0, <4 x i64> <i64 3, i64 2, i64 1, i64 0>) 254 ret <4 x i64> %1 255} 256 257define <4 x i64> @shuffle_test_permvar_di_256_mask(<4 x i64> %a0, <4 x i64> %passthru, i8 %mask) { 258; CHECK-LABEL: @shuffle_test_permvar_di_256_mask( 259; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i64> [[A0:%.*]], <4 x i64> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 260; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 261; CHECK-NEXT: [[EXTRACT:%.*]] = shufflevector <8 x i1> [[TMP2]], <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 262; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[EXTRACT]], <4 x i64> [[TMP1]], <4 x i64> [[PASSTHRU:%.*]] 263; CHECK-NEXT: ret <4 x i64> [[TMP3]] 264; 265 %1 = call <4 x i64> @llvm.x86.avx512.permvar.di.256(<4 x i64> %a0, <4 x i64> <i64 3, i64 2, i64 1, i64 0>) 266 %2 = bitcast i8 %mask to <8 x i1> 267 %extract = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 268 %3 = select <4 x i1> %extract, <4 x i64> %1, <4 x i64> %passthru 269 ret <4 x i64> %3 270} 271 272define <4 x i64> @undef_test_permvar_di_256(<4 x i64> %a0) { 273; CHECK-LABEL: @undef_test_permvar_di_256( 274; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i64> [[A0:%.*]], <4 x i64> poison, <4 x i32> <i32 poison, i32 2, i32 1, i32 0> 275; CHECK-NEXT: ret <4 x i64> [[TMP1]] 276; 277 %1 = call <4 x i64> @llvm.x86.avx512.permvar.di.256(<4 x i64> %a0, <4 x i64> <i64 undef, i64 2, i64 1, i64 0>) 278 ret <4 x i64> %1 279} 280 281define <4 x i64> @undef_test_permvar_di_256_mask(<4 x i64> %a0, <4 x i64> %passthru, i8 %mask) { 282; CHECK-LABEL: @undef_test_permvar_di_256_mask( 283; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i64> [[A0:%.*]], <4 x i64> poison, <4 x i32> <i32 poison, i32 2, i32 1, i32 0> 284; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 285; CHECK-NEXT: [[EXTRACT:%.*]] = shufflevector <8 x i1> [[TMP2]], <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 286; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[EXTRACT]], <4 x i64> [[TMP1]], <4 x i64> [[PASSTHRU:%.*]] 287; CHECK-NEXT: ret <4 x i64> [[TMP3]] 288; 289 %1 = call <4 x i64> @llvm.x86.avx512.permvar.di.256(<4 x i64> %a0, <4 x i64> <i64 undef, i64 2, i64 1, i64 0>) 290 %2 = bitcast i8 %mask to <8 x i1> 291 %extract = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 292 %3 = select <4 x i1> %extract, <4 x i64> %1, <4 x i64> %passthru 293 ret <4 x i64> %3 294} 295 296define <4 x i64> @demandedbits_test_permvar_di_256_mask(<4 x i64> %a0, <4 x i64> %a1) { 297; CHECK-LABEL: @demandedbits_test_permvar_di_256_mask( 298; CHECK-NEXT: [[S:%.*]] = call <4 x i64> @llvm.x86.avx512.permvar.di.256(<4 x i64> [[A0:%.*]], <4 x i64> [[A1:%.*]]) 299; CHECK-NEXT: ret <4 x i64> [[S]] 300; 301 %m = or <4 x i64> %a1, <i64 0, i64 4, i64 -4, i64 8> 302 %s = call <4 x i64> @llvm.x86.avx512.permvar.di.256(<4 x i64> %a0, <4 x i64> %m) 303 ret <4 x i64> %s 304} 305 306declare <4 x double> @llvm.x86.avx512.permvar.df.256(<4 x double>, <4 x i64>) 307 308define <4 x double> @identity_test_permvar_df_256(<4 x double> %a0) { 309; CHECK-LABEL: @identity_test_permvar_df_256( 310; CHECK-NEXT: ret <4 x double> [[A0:%.*]] 311; 312 %1 = call <4 x double> @llvm.x86.avx512.permvar.df.256(<4 x double> %a0, <4 x i64> <i64 0, i64 1, i64 2, i64 3>) 313 ret <4 x double> %1 314} 315 316define <4 x double> @identity_test_permvar_df_256_mask(<4 x double> %a0, <4 x double> %passthru, i8 %mask) { 317; CHECK-LABEL: @identity_test_permvar_df_256_mask( 318; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 319; CHECK-NEXT: [[EXTRACT:%.*]] = shufflevector <8 x i1> [[TMP1]], <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 320; CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[EXTRACT]], <4 x double> [[A0:%.*]], <4 x double> [[PASSTHRU:%.*]] 321; CHECK-NEXT: ret <4 x double> [[TMP2]] 322; 323 %1 = call <4 x double> @llvm.x86.avx512.permvar.df.256(<4 x double> %a0, <4 x i64> <i64 0, i64 1, i64 2, i64 3>) 324 %2 = bitcast i8 %mask to <8 x i1> 325 %extract = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 326 %3 = select <4 x i1> %extract, <4 x double> %1, <4 x double> %passthru 327 ret <4 x double> %3 328} 329 330define <4 x double> @zero_test_permvar_df_256(<4 x double> %a0) { 331; CHECK-LABEL: @zero_test_permvar_df_256( 332; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A0:%.*]], <4 x double> poison, <4 x i32> zeroinitializer 333; CHECK-NEXT: ret <4 x double> [[TMP1]] 334; 335 %1 = call <4 x double> @llvm.x86.avx512.permvar.df.256(<4 x double> %a0, <4 x i64> zeroinitializer) 336 ret <4 x double> %1 337} 338 339define <4 x double> @zero_test_permvar_df_256_mask(<4 x double> %a0, <4 x double> %passthru, i8 %mask) { 340; CHECK-LABEL: @zero_test_permvar_df_256_mask( 341; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A0:%.*]], <4 x double> poison, <4 x i32> zeroinitializer 342; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 343; CHECK-NEXT: [[EXTRACT:%.*]] = shufflevector <8 x i1> [[TMP2]], <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 344; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[EXTRACT]], <4 x double> [[TMP1]], <4 x double> [[PASSTHRU:%.*]] 345; CHECK-NEXT: ret <4 x double> [[TMP3]] 346; 347 %1 = call <4 x double> @llvm.x86.avx512.permvar.df.256(<4 x double> %a0, <4 x i64> zeroinitializer) 348 %2 = bitcast i8 %mask to <8 x i1> 349 %extract = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 350 %3 = select <4 x i1> %extract, <4 x double> %1, <4 x double> %passthru 351 ret <4 x double> %3 352} 353 354define <4 x double> @shuffle_test_permvar_df_256(<4 x double> %a0) { 355; CHECK-LABEL: @shuffle_test_permvar_df_256( 356; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A0:%.*]], <4 x double> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 357; CHECK-NEXT: ret <4 x double> [[TMP1]] 358; 359 %1 = call <4 x double> @llvm.x86.avx512.permvar.df.256(<4 x double> %a0, <4 x i64> <i64 3, i64 2, i64 1, i64 0>) 360 ret <4 x double> %1 361} 362 363define <4 x double> @shuffle_test_permvar_df_256_mask(<4 x double> %a0, <4 x double> %passthru, i8 %mask) { 364; CHECK-LABEL: @shuffle_test_permvar_df_256_mask( 365; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A0:%.*]], <4 x double> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 366; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 367; CHECK-NEXT: [[EXTRACT:%.*]] = shufflevector <8 x i1> [[TMP2]], <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 368; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[EXTRACT]], <4 x double> [[TMP1]], <4 x double> [[PASSTHRU:%.*]] 369; CHECK-NEXT: ret <4 x double> [[TMP3]] 370; 371 %1 = call <4 x double> @llvm.x86.avx512.permvar.df.256(<4 x double> %a0, <4 x i64> <i64 3, i64 2, i64 1, i64 0>) 372 %2 = bitcast i8 %mask to <8 x i1> 373 %extract = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 374 %3 = select <4 x i1> %extract, <4 x double> %1, <4 x double> %passthru 375 ret <4 x double> %3 376} 377 378define <4 x double> @undef_test_permvar_df_256(<4 x double> %a0) { 379; CHECK-LABEL: @undef_test_permvar_df_256( 380; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A0:%.*]], <4 x double> poison, <4 x i32> <i32 poison, i32 2, i32 1, i32 0> 381; CHECK-NEXT: ret <4 x double> [[TMP1]] 382; 383 %1 = call <4 x double> @llvm.x86.avx512.permvar.df.256(<4 x double> %a0, <4 x i64> <i64 undef, i64 2, i64 1, i64 0>) 384 ret <4 x double> %1 385} 386 387define <4 x double> @undef_test_permvar_df_256_mask(<4 x double> %a0, <4 x double> %passthru, i8 %mask) { 388; CHECK-LABEL: @undef_test_permvar_df_256_mask( 389; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A0:%.*]], <4 x double> poison, <4 x i32> <i32 poison, i32 2, i32 1, i32 0> 390; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 391; CHECK-NEXT: [[EXTRACT:%.*]] = shufflevector <8 x i1> [[TMP2]], <8 x i1> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 392; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[EXTRACT]], <4 x double> [[TMP1]], <4 x double> [[PASSTHRU:%.*]] 393; CHECK-NEXT: ret <4 x double> [[TMP3]] 394; 395 %1 = call <4 x double> @llvm.x86.avx512.permvar.df.256(<4 x double> %a0, <4 x i64> <i64 undef, i64 2, i64 1, i64 0>) 396 %2 = bitcast i8 %mask to <8 x i1> 397 %extract = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 398 %3 = select <4 x i1> %extract, <4 x double> %1, <4 x double> %passthru 399 ret <4 x double> %3 400} 401 402define <4 x double> @demandedbits_test_permvar_df_256_mask(<4 x double> %a0, <4 x i64> %a1) { 403; CHECK-LABEL: @demandedbits_test_permvar_df_256_mask( 404; CHECK-NEXT: [[S:%.*]] = call <4 x double> @llvm.x86.avx512.permvar.df.256(<4 x double> [[A0:%.*]], <4 x i64> [[A1:%.*]]) 405; CHECK-NEXT: ret <4 x double> [[S]] 406; 407 %m = or <4 x i64> %a1, <i64 0, i64 4, i64 -4, i64 8> 408 %s = call <4 x double> @llvm.x86.avx512.permvar.df.256(<4 x double> %a0, <4 x i64> %m) 409 ret <4 x double> %s 410} 411 412declare <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32>, <16 x i32>) 413 414define <16 x i32> @identity_test_permvar_si_512(<16 x i32> %a0) { 415; CHECK-LABEL: @identity_test_permvar_si_512( 416; CHECK-NEXT: ret <16 x i32> [[A0:%.*]] 417; 418 %1 = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> %a0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>) 419 ret <16 x i32> %1 420} 421 422define <16 x i32> @identity_test_permvar_si_512_mask(<16 x i32> %a0, <16 x i32> %passthru, i16 %mask) { 423; CHECK-LABEL: @identity_test_permvar_si_512_mask( 424; CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 425; CHECK-NEXT: [[TMP2:%.*]] = select <16 x i1> [[TMP1]], <16 x i32> [[A0:%.*]], <16 x i32> [[PASSTHRU:%.*]] 426; CHECK-NEXT: ret <16 x i32> [[TMP2]] 427; 428 %1 = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> %a0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>) 429 %2 = bitcast i16 %mask to <16 x i1> 430 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %passthru 431 ret <16 x i32> %3 432} 433 434define <16 x i32> @zero_test_permvar_si_512(<16 x i32> %a0) { 435; CHECK-LABEL: @zero_test_permvar_si_512( 436; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i32> [[A0:%.*]], <16 x i32> poison, <16 x i32> zeroinitializer 437; CHECK-NEXT: ret <16 x i32> [[TMP1]] 438; 439 %1 = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> %a0, <16 x i32> zeroinitializer) 440 ret <16 x i32> %1 441} 442 443define <16 x i32> @zero_test_permvar_si_512_mask(<16 x i32> %a0, <16 x i32> %passthru, i16 %mask) { 444; CHECK-LABEL: @zero_test_permvar_si_512_mask( 445; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i32> [[A0:%.*]], <16 x i32> poison, <16 x i32> zeroinitializer 446; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 447; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP2]], <16 x i32> [[TMP1]], <16 x i32> [[PASSTHRU:%.*]] 448; CHECK-NEXT: ret <16 x i32> [[TMP3]] 449; 450 %1 = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> %a0, <16 x i32> zeroinitializer) 451 %2 = bitcast i16 %mask to <16 x i1> 452 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %passthru 453 ret <16 x i32> %3 454} 455 456define <16 x i32> @shuffle_test_permvar_si_512(<16 x i32> %a0) { 457; CHECK-LABEL: @shuffle_test_permvar_si_512( 458; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i32> [[A0:%.*]], <16 x i32> poison, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 459; CHECK-NEXT: ret <16 x i32> [[TMP1]] 460; 461 %1 = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> %a0, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 462 ret <16 x i32> %1 463} 464 465define <16 x i32> @shuffle_test_permvar_si_512_mask(<16 x i32> %a0, <16 x i32> %passthru, i16 %mask) { 466; CHECK-LABEL: @shuffle_test_permvar_si_512_mask( 467; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i32> [[A0:%.*]], <16 x i32> poison, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 468; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 469; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP2]], <16 x i32> [[TMP1]], <16 x i32> [[PASSTHRU:%.*]] 470; CHECK-NEXT: ret <16 x i32> [[TMP3]] 471; 472 %1 = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> %a0, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 473 %2 = bitcast i16 %mask to <16 x i1> 474 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %passthru 475 ret <16 x i32> %3 476} 477 478define <16 x i32> @undef_test_permvar_si_512(<16 x i32> %a0) { 479; CHECK-LABEL: @undef_test_permvar_si_512( 480; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i32> [[A0:%.*]], <16 x i32> poison, <16 x i32> <i32 poison, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 481; CHECK-NEXT: ret <16 x i32> [[TMP1]] 482; 483 %1 = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> %a0, <16 x i32> <i32 undef, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 484 ret <16 x i32> %1 485} 486 487define <16 x i32> @undef_test_permvar_si_512_mask(<16 x i32> %a0, <16 x i32> %passthru, i16 %mask) { 488; CHECK-LABEL: @undef_test_permvar_si_512_mask( 489; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i32> [[A0:%.*]], <16 x i32> poison, <16 x i32> <i32 poison, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 490; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 491; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP2]], <16 x i32> [[TMP1]], <16 x i32> [[PASSTHRU:%.*]] 492; CHECK-NEXT: ret <16 x i32> [[TMP3]] 493; 494 %1 = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> %a0, <16 x i32> <i32 undef, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 495 %2 = bitcast i16 %mask to <16 x i1> 496 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %passthru 497 ret <16 x i32> %3 498} 499 500define <16 x i32> @demandedbit_test_permvar_si_512_mask(<16 x i32> %a0, <16 x i32> %a1) { 501; CHECK-LABEL: @demandedbit_test_permvar_si_512_mask( 502; CHECK-NEXT: [[S:%.*]] = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> [[A0:%.*]], <16 x i32> [[A1:%.*]]) 503; CHECK-NEXT: ret <16 x i32> [[S]] 504; 505 %m = or <16 x i32> %a1, <i32 0, i32 16, i32 -16, i32 32, i32 -32, i32 64, i32 -64, i32 128, i32 -128, i32 256, i32 -256, i32 512, i32 -512, i32 1024, i32 -1024, i32 2048> 506 %s = call <16 x i32> @llvm.x86.avx512.permvar.si.512(<16 x i32> %a0, <16 x i32> %m) 507 ret <16 x i32> %s 508} 509 510declare <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float>, <16 x i32>) 511 512define <16 x float> @identity_test_permvar_sf_512(<16 x float> %a0) { 513; CHECK-LABEL: @identity_test_permvar_sf_512( 514; CHECK-NEXT: ret <16 x float> [[A0:%.*]] 515; 516 %1 = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> %a0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>) 517 ret <16 x float> %1 518} 519 520define <16 x float> @identity_test_permvar_sf_512_mask(<16 x float> %a0, <16 x float> %passthru, i16 %mask) { 521; CHECK-LABEL: @identity_test_permvar_sf_512_mask( 522; CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 523; CHECK-NEXT: [[TMP2:%.*]] = select <16 x i1> [[TMP1]], <16 x float> [[A0:%.*]], <16 x float> [[PASSTHRU:%.*]] 524; CHECK-NEXT: ret <16 x float> [[TMP2]] 525; 526 %1 = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> %a0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>) 527 %2 = bitcast i16 %mask to <16 x i1> 528 %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %passthru 529 ret <16 x float> %3 530} 531 532define <16 x float> @zero_test_permvar_sf_512(<16 x float> %a0) { 533; CHECK-LABEL: @zero_test_permvar_sf_512( 534; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[A0:%.*]], <16 x float> poison, <16 x i32> zeroinitializer 535; CHECK-NEXT: ret <16 x float> [[TMP1]] 536; 537 %1 = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> %a0, <16 x i32> zeroinitializer) 538 ret <16 x float> %1 539} 540 541define <16 x float> @zero_test_permvar_sf_512_mask(<16 x float> %a0, <16 x float> %passthru, i16 %mask) { 542; CHECK-LABEL: @zero_test_permvar_sf_512_mask( 543; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[A0:%.*]], <16 x float> poison, <16 x i32> zeroinitializer 544; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 545; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP2]], <16 x float> [[TMP1]], <16 x float> [[PASSTHRU:%.*]] 546; CHECK-NEXT: ret <16 x float> [[TMP3]] 547; 548 %1 = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> %a0, <16 x i32> zeroinitializer) 549 %2 = bitcast i16 %mask to <16 x i1> 550 %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %passthru 551 ret <16 x float> %3 552} 553 554define <16 x float> @shuffle_test_permvar_sf_512(<16 x float> %a0) { 555; CHECK-LABEL: @shuffle_test_permvar_sf_512( 556; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[A0:%.*]], <16 x float> poison, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 557; CHECK-NEXT: ret <16 x float> [[TMP1]] 558; 559 %1 = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> %a0, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 560 ret <16 x float> %1 561} 562 563define <16 x float> @shuffle_test_permvar_sf_512_mask(<16 x float> %a0, <16 x float> %passthru, i16 %mask) { 564; CHECK-LABEL: @shuffle_test_permvar_sf_512_mask( 565; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[A0:%.*]], <16 x float> poison, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 566; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 567; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP2]], <16 x float> [[TMP1]], <16 x float> [[PASSTHRU:%.*]] 568; CHECK-NEXT: ret <16 x float> [[TMP3]] 569; 570 %1 = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> %a0, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 571 %2 = bitcast i16 %mask to <16 x i1> 572 %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %passthru 573 ret <16 x float> %3 574} 575 576define <16 x float> @undef_test_permvar_sf_512(<16 x float> %a0) { 577; CHECK-LABEL: @undef_test_permvar_sf_512( 578; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[A0:%.*]], <16 x float> poison, <16 x i32> <i32 poison, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 579; CHECK-NEXT: ret <16 x float> [[TMP1]] 580; 581 %1 = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> %a0, <16 x i32> <i32 undef, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 582 ret <16 x float> %1 583} 584 585define <16 x float> @undef_test_permvar_sf_512_mask(<16 x float> %a0, <16 x float> %passthru, i16 %mask) { 586; CHECK-LABEL: @undef_test_permvar_sf_512_mask( 587; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x float> [[A0:%.*]], <16 x float> poison, <16 x i32> <i32 poison, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 588; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 589; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP2]], <16 x float> [[TMP1]], <16 x float> [[PASSTHRU:%.*]] 590; CHECK-NEXT: ret <16 x float> [[TMP3]] 591; 592 %1 = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> %a0, <16 x i32> <i32 undef, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>) 593 %2 = bitcast i16 %mask to <16 x i1> 594 %3 = select <16 x i1> %2, <16 x float> %1, <16 x float> %passthru 595 ret <16 x float> %3 596} 597 598define <16 x float> @demandedbit_test_permvar_sf_512_mask(<16 x float> %a0, <16 x i32> %a1) { 599; CHECK-LABEL: @demandedbit_test_permvar_sf_512_mask( 600; CHECK-NEXT: [[S:%.*]] = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> [[A0:%.*]], <16 x i32> [[A1:%.*]]) 601; CHECK-NEXT: ret <16 x float> [[S]] 602; 603 %m = or <16 x i32> %a1, <i32 0, i32 16, i32 -16, i32 32, i32 -32, i32 64, i32 -64, i32 128, i32 -128, i32 256, i32 -256, i32 512, i32 -512, i32 1024, i32 -1024, i32 2048> 604 %s = call <16 x float> @llvm.x86.avx512.permvar.sf.512(<16 x float> %a0, <16 x i32> %m) 605 ret <16 x float> %s 606} 607 608declare <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64>, <8 x i64>) 609 610define <8 x i64> @identity_test_permvar_di_512(<8 x i64> %a0) { 611; CHECK-LABEL: @identity_test_permvar_di_512( 612; CHECK-NEXT: ret <8 x i64> [[A0:%.*]] 613; 614 %1 = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> %a0, <8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>) 615 ret <8 x i64> %1 616} 617 618define <8 x i64> @identity_test_permvar_di_512_mask(<8 x i64> %a0, <8 x i64> %passthru, i8 %mask) { 619; CHECK-LABEL: @identity_test_permvar_di_512_mask( 620; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 621; CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i64> [[A0:%.*]], <8 x i64> [[PASSTHRU:%.*]] 622; CHECK-NEXT: ret <8 x i64> [[TMP2]] 623; 624 %1 = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> %a0, <8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>) 625 %2 = bitcast i8 %mask to <8 x i1> 626 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %passthru 627 ret <8 x i64> %3 628} 629 630define <8 x i64> @zero_test_permvar_di_512(<8 x i64> %a0) { 631; CHECK-LABEL: @zero_test_permvar_di_512( 632; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i64> [[A0:%.*]], <8 x i64> poison, <8 x i32> zeroinitializer 633; CHECK-NEXT: ret <8 x i64> [[TMP1]] 634; 635 %1 = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> %a0, <8 x i64> zeroinitializer) 636 ret <8 x i64> %1 637} 638 639define <8 x i64> @zero_test_permvar_di_512_mask(<8 x i64> %a0, <8 x i64> %passthru, i8 %mask) { 640; CHECK-LABEL: @zero_test_permvar_di_512_mask( 641; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i64> [[A0:%.*]], <8 x i64> poison, <8 x i32> zeroinitializer 642; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 643; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x i64> [[TMP1]], <8 x i64> [[PASSTHRU:%.*]] 644; CHECK-NEXT: ret <8 x i64> [[TMP3]] 645; 646 %1 = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> %a0, <8 x i64> zeroinitializer) 647 %2 = bitcast i8 %mask to <8 x i1> 648 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %passthru 649 ret <8 x i64> %3 650} 651 652define <8 x i64> @shuffle_test_permvar_di_512(<8 x i64> %a0) { 653; CHECK-LABEL: @shuffle_test_permvar_di_512( 654; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i64> [[A0:%.*]], <8 x i64> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 655; CHECK-NEXT: ret <8 x i64> [[TMP1]] 656; 657 %1 = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> %a0, <8 x i64> <i64 7, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>) 658 ret <8 x i64> %1 659} 660 661define <8 x i64> @shuffle_test_permvar_di_512_mask(<8 x i64> %a0, <8 x i64> %passthru, i8 %mask) { 662; CHECK-LABEL: @shuffle_test_permvar_di_512_mask( 663; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i64> [[A0:%.*]], <8 x i64> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 664; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 665; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x i64> [[TMP1]], <8 x i64> [[PASSTHRU:%.*]] 666; CHECK-NEXT: ret <8 x i64> [[TMP3]] 667; 668 %1 = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> %a0, <8 x i64> <i64 7, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>) 669 %2 = bitcast i8 %mask to <8 x i1> 670 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %passthru 671 ret <8 x i64> %3 672} 673 674define <8 x i64> @undef_test_permvar_di_512(<8 x i64> %a0) { 675; CHECK-LABEL: @undef_test_permvar_di_512( 676; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i64> [[A0:%.*]], <8 x i64> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 677; CHECK-NEXT: ret <8 x i64> [[TMP1]] 678; 679 %1 = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> %a0, <8 x i64> <i64 undef, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>) 680 ret <8 x i64> %1 681} 682 683define <8 x i64> @undef_test_permvar_di_512_mask(<8 x i64> %a0, <8 x i64> %passthru, i8 %mask) { 684; CHECK-LABEL: @undef_test_permvar_di_512_mask( 685; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i64> [[A0:%.*]], <8 x i64> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 686; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 687; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x i64> [[TMP1]], <8 x i64> [[PASSTHRU:%.*]] 688; CHECK-NEXT: ret <8 x i64> [[TMP3]] 689; 690 %1 = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> %a0, <8 x i64> <i64 undef, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>) 691 %2 = bitcast i8 %mask to <8 x i1> 692 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %passthru 693 ret <8 x i64> %3 694} 695 696define <8 x i64> @demandedbit_test_permvar_di_512_mask(<8 x i64> %a0, <8 x i64> %a1) { 697; CHECK-LABEL: @demandedbit_test_permvar_di_512_mask( 698; CHECK-NEXT: [[S:%.*]] = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> [[A0:%.*]], <8 x i64> [[A1:%.*]]) 699; CHECK-NEXT: ret <8 x i64> [[S]] 700; 701 %m = or <8 x i64> %a1, <i64 0, i64 8, i64 -8, i64 16, i64 -16, i64 32, i64 -32, i64 64> 702 %s = call <8 x i64> @llvm.x86.avx512.permvar.di.512(<8 x i64> %a0, <8 x i64> %m) 703 ret <8 x i64> %s 704} 705 706declare <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double>, <8 x i64>) 707 708define <8 x double> @identity_test_permvar_df_512(<8 x double> %a0) { 709; CHECK-LABEL: @identity_test_permvar_df_512( 710; CHECK-NEXT: ret <8 x double> [[A0:%.*]] 711; 712 %1 = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> %a0, <8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>) 713 ret <8 x double> %1 714} 715 716define <8 x double> @identity_test_permvar_df_512_mask(<8 x double> %a0, <8 x double> %passthru, i8 %mask) { 717; CHECK-LABEL: @identity_test_permvar_df_512_mask( 718; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 719; CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x double> [[A0:%.*]], <8 x double> [[PASSTHRU:%.*]] 720; CHECK-NEXT: ret <8 x double> [[TMP2]] 721; 722 %1 = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> %a0, <8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>) 723 %2 = bitcast i8 %mask to <8 x i1> 724 %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> %passthru 725 ret <8 x double> %3 726} 727 728define <8 x double> @zero_test_permvar_df_512(<8 x double> %a0) { 729; CHECK-LABEL: @zero_test_permvar_df_512( 730; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[A0:%.*]], <8 x double> poison, <8 x i32> zeroinitializer 731; CHECK-NEXT: ret <8 x double> [[TMP1]] 732; 733 %1 = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> %a0, <8 x i64> zeroinitializer) 734 ret <8 x double> %1 735} 736 737define <8 x double> @zero_test_permvar_df_512_mask(<8 x double> %a0, <8 x double> %passthru, i8 %mask) { 738; CHECK-LABEL: @zero_test_permvar_df_512_mask( 739; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[A0:%.*]], <8 x double> poison, <8 x i32> zeroinitializer 740; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 741; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x double> [[TMP1]], <8 x double> [[PASSTHRU:%.*]] 742; CHECK-NEXT: ret <8 x double> [[TMP3]] 743; 744 %1 = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> %a0, <8 x i64> zeroinitializer) 745 %2 = bitcast i8 %mask to <8 x i1> 746 %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> %passthru 747 ret <8 x double> %3 748} 749 750define <8 x double> @shuffle_test_permvar_df_512(<8 x double> %a0) { 751; CHECK-LABEL: @shuffle_test_permvar_df_512( 752; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[A0:%.*]], <8 x double> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 753; CHECK-NEXT: ret <8 x double> [[TMP1]] 754; 755 %1 = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> %a0, <8 x i64> <i64 7, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>) 756 ret <8 x double> %1 757} 758 759define <8 x double> @shuffle_test_permvar_df_512_mask(<8 x double> %a0, <8 x double> %passthru, i8 %mask) { 760; CHECK-LABEL: @shuffle_test_permvar_df_512_mask( 761; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[A0:%.*]], <8 x double> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 762; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 763; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x double> [[TMP1]], <8 x double> [[PASSTHRU:%.*]] 764; CHECK-NEXT: ret <8 x double> [[TMP3]] 765; 766 %1 = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> %a0, <8 x i64> <i64 7, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>) 767 %2 = bitcast i8 %mask to <8 x i1> 768 %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> %passthru 769 ret <8 x double> %3 770} 771 772define <8 x double> @undef_test_permvar_df_512(<8 x double> %a0) { 773; CHECK-LABEL: @undef_test_permvar_df_512( 774; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[A0:%.*]], <8 x double> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 775; CHECK-NEXT: ret <8 x double> [[TMP1]] 776; 777 %1 = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> %a0, <8 x i64> <i64 undef, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>) 778 ret <8 x double> %1 779} 780 781define <8 x double> @undef_test_permvar_df_512_mask(<8 x double> %a0, <8 x double> %passthru, i8 %mask) { 782; CHECK-LABEL: @undef_test_permvar_df_512_mask( 783; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x double> [[A0:%.*]], <8 x double> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 784; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 785; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x double> [[TMP1]], <8 x double> [[PASSTHRU:%.*]] 786; CHECK-NEXT: ret <8 x double> [[TMP3]] 787; 788 %1 = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> %a0, <8 x i64> <i64 undef, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>) 789 %2 = bitcast i8 %mask to <8 x i1> 790 %3 = select <8 x i1> %2, <8 x double> %1, <8 x double> %passthru 791 ret <8 x double> %3 792} 793 794define <8 x double> @demandedbit_test_permvar_df_512_mask(<8 x double> %a0, <8 x i64> %a1) { 795; CHECK-LABEL: @demandedbit_test_permvar_df_512_mask( 796; CHECK-NEXT: [[S:%.*]] = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> [[A0:%.*]], <8 x i64> [[A1:%.*]]) 797; CHECK-NEXT: ret <8 x double> [[S]] 798; 799 %m = or <8 x i64> %a1, <i64 0, i64 8, i64 -8, i64 16, i64 -16, i64 32, i64 -32, i64 64> 800 %s = call <8 x double> @llvm.x86.avx512.permvar.df.512(<8 x double> %a0, <8 x i64> %m) 801 ret <8 x double> %s 802} 803 804declare <8 x i16> @llvm.x86.avx512.permvar.hi.128(<8 x i16>, <8 x i16>) 805 806define <8 x i16> @identity_test_permvar_hi_128(<8 x i16> %a0) { 807; CHECK-LABEL: @identity_test_permvar_hi_128( 808; CHECK-NEXT: ret <8 x i16> [[A0:%.*]] 809; 810 %1 = call <8 x i16> @llvm.x86.avx512.permvar.hi.128(<8 x i16> %a0, <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>) 811 ret <8 x i16> %1 812} 813 814define <8 x i16> @identity_test_permvar_hi_128_mask(<8 x i16> %a0, <8 x i16> %passthru, i8 %mask) { 815; CHECK-LABEL: @identity_test_permvar_hi_128_mask( 816; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 817; CHECK-NEXT: [[TMP2:%.*]] = select <8 x i1> [[TMP1]], <8 x i16> [[A0:%.*]], <8 x i16> [[PASSTHRU:%.*]] 818; CHECK-NEXT: ret <8 x i16> [[TMP2]] 819; 820 %1 = call <8 x i16> @llvm.x86.avx512.permvar.hi.128(<8 x i16> %a0, <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>) 821 %2 = bitcast i8 %mask to <8 x i1> 822 %3 = select <8 x i1> %2, <8 x i16> %1, <8 x i16> %passthru 823 ret <8 x i16> %3 824} 825 826define <8 x i16> @zero_test_permvar_hi_128(<8 x i16> %a0) { 827; CHECK-LABEL: @zero_test_permvar_hi_128( 828; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i16> [[A0:%.*]], <8 x i16> poison, <8 x i32> zeroinitializer 829; CHECK-NEXT: ret <8 x i16> [[TMP1]] 830; 831 %1 = call <8 x i16> @llvm.x86.avx512.permvar.hi.128(<8 x i16> %a0, <8 x i16> zeroinitializer) 832 ret <8 x i16> %1 833} 834 835define <8 x i16> @zero_test_permvar_hi_128_mask(<8 x i16> %a0, <8 x i16> %passthru, i8 %mask) { 836; CHECK-LABEL: @zero_test_permvar_hi_128_mask( 837; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i16> [[A0:%.*]], <8 x i16> poison, <8 x i32> zeroinitializer 838; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 839; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x i16> [[TMP1]], <8 x i16> [[PASSTHRU:%.*]] 840; CHECK-NEXT: ret <8 x i16> [[TMP3]] 841; 842 %1 = call <8 x i16> @llvm.x86.avx512.permvar.hi.128(<8 x i16> %a0, <8 x i16> zeroinitializer) 843 %2 = bitcast i8 %mask to <8 x i1> 844 %3 = select <8 x i1> %2, <8 x i16> %1, <8 x i16> %passthru 845 ret <8 x i16> %3 846} 847 848define <8 x i16> @shuffle_test_permvar_hi_128(<8 x i16> %a0) { 849; CHECK-LABEL: @shuffle_test_permvar_hi_128( 850; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i16> [[A0:%.*]], <8 x i16> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 851; CHECK-NEXT: ret <8 x i16> [[TMP1]] 852; 853 %1 = call <8 x i16> @llvm.x86.avx512.permvar.hi.128(<8 x i16> %a0, <8 x i16> <i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>) 854 ret <8 x i16> %1 855} 856 857define <8 x i16> @shuffle_test_permvar_hi_128_mask(<8 x i16> %a0, <8 x i16> %passthru, i8 %mask) { 858; CHECK-LABEL: @shuffle_test_permvar_hi_128_mask( 859; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i16> [[A0:%.*]], <8 x i16> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 860; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 861; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x i16> [[TMP1]], <8 x i16> [[PASSTHRU:%.*]] 862; CHECK-NEXT: ret <8 x i16> [[TMP3]] 863; 864 %1 = call <8 x i16> @llvm.x86.avx512.permvar.hi.128(<8 x i16> %a0, <8 x i16> <i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>) 865 %2 = bitcast i8 %mask to <8 x i1> 866 %3 = select <8 x i1> %2, <8 x i16> %1, <8 x i16> %passthru 867 ret <8 x i16> %3 868} 869 870define <8 x i16> @undef_test_permvar_hi_128(<8 x i16> %a0) { 871; CHECK-LABEL: @undef_test_permvar_hi_128( 872; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i16> [[A0:%.*]], <8 x i16> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 873; CHECK-NEXT: ret <8 x i16> [[TMP1]] 874; 875 %1 = call <8 x i16> @llvm.x86.avx512.permvar.hi.128(<8 x i16> %a0, <8 x i16> <i16 undef, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>) 876 ret <8 x i16> %1 877} 878 879define <8 x i16> @undef_test_permvar_hi_128_mask(<8 x i16> %a0, <8 x i16> %passthru, i8 %mask) { 880; CHECK-LABEL: @undef_test_permvar_hi_128_mask( 881; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i16> [[A0:%.*]], <8 x i16> poison, <8 x i32> <i32 poison, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 882; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8 [[MASK:%.*]] to <8 x i1> 883; CHECK-NEXT: [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x i16> [[TMP1]], <8 x i16> [[PASSTHRU:%.*]] 884; CHECK-NEXT: ret <8 x i16> [[TMP3]] 885; 886 %1 = call <8 x i16> @llvm.x86.avx512.permvar.hi.128(<8 x i16> %a0, <8 x i16> <i16 undef, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>) 887 %2 = bitcast i8 %mask to <8 x i1> 888 %3 = select <8 x i1> %2, <8 x i16> %1, <8 x i16> %passthru 889 ret <8 x i16> %3 890} 891 892define <8 x i16> @demandedbit_test_permvar_hi_128_mask(<8 x i16> %a0, <8 x i16> %a1) { 893; CHECK-LABEL: @demandedbit_test_permvar_hi_128_mask( 894; CHECK-NEXT: [[S:%.*]] = call <8 x i16> @llvm.x86.avx512.permvar.hi.128(<8 x i16> [[A0:%.*]], <8 x i16> [[A1:%.*]]) 895; CHECK-NEXT: ret <8 x i16> [[S]] 896; 897 %m = or <8 x i16> %a1, <i16 0, i16 8, i16 -8, i16 16, i16 -16, i16 32, i16 -32, i16 64> 898 %s = call <8 x i16> @llvm.x86.avx512.permvar.hi.128(<8 x i16> %a0, <8 x i16> %m) 899 ret <8 x i16> %s 900} 901 902declare <16 x i16> @llvm.x86.avx512.permvar.hi.256(<16 x i16>, <16 x i16>) 903 904define <16 x i16> @identity_test_permvar_hi_256(<16 x i16> %a0) { 905; CHECK-LABEL: @identity_test_permvar_hi_256( 906; CHECK-NEXT: ret <16 x i16> [[A0:%.*]] 907; 908 %1 = call <16 x i16> @llvm.x86.avx512.permvar.hi.256(<16 x i16> %a0, <16 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>) 909 ret <16 x i16> %1 910} 911 912define <16 x i16> @identity_test_permvar_hi_256_mask(<16 x i16> %a0, <16 x i16> %passthru, i16 %mask) { 913; CHECK-LABEL: @identity_test_permvar_hi_256_mask( 914; CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 915; CHECK-NEXT: [[TMP2:%.*]] = select <16 x i1> [[TMP1]], <16 x i16> [[A0:%.*]], <16 x i16> [[PASSTHRU:%.*]] 916; CHECK-NEXT: ret <16 x i16> [[TMP2]] 917; 918 %1 = call <16 x i16> @llvm.x86.avx512.permvar.hi.256(<16 x i16> %a0, <16 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>) 919 %2 = bitcast i16 %mask to <16 x i1> 920 %3 = select <16 x i1> %2, <16 x i16> %1, <16 x i16> %passthru 921 ret <16 x i16> %3 922} 923 924define <16 x i16> @zero_test_permvar_hi_256(<16 x i16> %a0) { 925; CHECK-LABEL: @zero_test_permvar_hi_256( 926; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i16> [[A0:%.*]], <16 x i16> poison, <16 x i32> zeroinitializer 927; CHECK-NEXT: ret <16 x i16> [[TMP1]] 928; 929 %1 = call <16 x i16> @llvm.x86.avx512.permvar.hi.256(<16 x i16> %a0, <16 x i16> zeroinitializer) 930 ret <16 x i16> %1 931} 932 933define <16 x i16> @zero_test_permvar_hi_256_mask(<16 x i16> %a0, <16 x i16> %passthru, i16 %mask) { 934; CHECK-LABEL: @zero_test_permvar_hi_256_mask( 935; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i16> [[A0:%.*]], <16 x i16> poison, <16 x i32> zeroinitializer 936; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 937; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP2]], <16 x i16> [[TMP1]], <16 x i16> [[PASSTHRU:%.*]] 938; CHECK-NEXT: ret <16 x i16> [[TMP3]] 939; 940 %1 = call <16 x i16> @llvm.x86.avx512.permvar.hi.256(<16 x i16> %a0, <16 x i16> zeroinitializer) 941 %2 = bitcast i16 %mask to <16 x i1> 942 %3 = select <16 x i1> %2, <16 x i16> %1, <16 x i16> %passthru 943 ret <16 x i16> %3 944} 945 946define <16 x i16> @shuffle_test_permvar_hi_256(<16 x i16> %a0) { 947; CHECK-LABEL: @shuffle_test_permvar_hi_256( 948; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i16> [[A0:%.*]], <16 x i16> poison, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 949; CHECK-NEXT: ret <16 x i16> [[TMP1]] 950; 951 %1 = call <16 x i16> @llvm.x86.avx512.permvar.hi.256(<16 x i16> %a0, <16 x i16> <i16 15, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>) 952 ret <16 x i16> %1 953} 954 955define <16 x i16> @shuffle_test_permvar_hi_256_mask(<16 x i16> %a0, <16 x i16> %passthru, i16 %mask) { 956; CHECK-LABEL: @shuffle_test_permvar_hi_256_mask( 957; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i16> [[A0:%.*]], <16 x i16> poison, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 958; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 959; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP2]], <16 x i16> [[TMP1]], <16 x i16> [[PASSTHRU:%.*]] 960; CHECK-NEXT: ret <16 x i16> [[TMP3]] 961; 962 %1 = call <16 x i16> @llvm.x86.avx512.permvar.hi.256(<16 x i16> %a0, <16 x i16> <i16 15, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>) 963 %2 = bitcast i16 %mask to <16 x i1> 964 %3 = select <16 x i1> %2, <16 x i16> %1, <16 x i16> %passthru 965 ret <16 x i16> %3 966} 967 968define <16 x i16> @undef_test_permvar_hi_256(<16 x i16> %a0) { 969; CHECK-LABEL: @undef_test_permvar_hi_256( 970; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i16> [[A0:%.*]], <16 x i16> poison, <16 x i32> <i32 poison, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 971; CHECK-NEXT: ret <16 x i16> [[TMP1]] 972; 973 %1 = call <16 x i16> @llvm.x86.avx512.permvar.hi.256(<16 x i16> %a0, <16 x i16> <i16 undef, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>) 974 ret <16 x i16> %1 975} 976 977define <16 x i16> @undef_test_permvar_hi_256_mask(<16 x i16> %a0, <16 x i16> %passthru, i16 %mask) { 978; CHECK-LABEL: @undef_test_permvar_hi_256_mask( 979; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i16> [[A0:%.*]], <16 x i16> poison, <16 x i32> <i32 poison, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 980; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 981; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP2]], <16 x i16> [[TMP1]], <16 x i16> [[PASSTHRU:%.*]] 982; CHECK-NEXT: ret <16 x i16> [[TMP3]] 983; 984 %1 = call <16 x i16> @llvm.x86.avx512.permvar.hi.256(<16 x i16> %a0, <16 x i16> <i16 undef, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>) 985 %2 = bitcast i16 %mask to <16 x i1> 986 %3 = select <16 x i1> %2, <16 x i16> %1, <16 x i16> %passthru 987 ret <16 x i16> %3 988} 989 990define <16 x i16> @demandedbit_test_permvar_hi_256_mask(<16 x i16> %a0, <16 x i16> %a1) { 991; CHECK-LABEL: @demandedbit_test_permvar_hi_256_mask( 992; CHECK-NEXT: [[S:%.*]] = call <16 x i16> @llvm.x86.avx512.permvar.hi.256(<16 x i16> [[A0:%.*]], <16 x i16> [[A1:%.*]]) 993; CHECK-NEXT: ret <16 x i16> [[S]] 994; 995 %m = or <16 x i16> %a1, <i16 0, i16 16, i16 -16, i16 32, i16 -32, i16 64, i16 -64, i16 128, i16 -128, i16 256, i16 -256, i16 512, i16 -512, i16 1024, i16 -1024, i16 2048> 996 %s = call <16 x i16> @llvm.x86.avx512.permvar.hi.256(<16 x i16> %a0, <16 x i16> %m) 997 ret <16 x i16> %s 998} 999 1000declare <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16>, <32 x i16>) 1001 1002define <32 x i16> @identity_test_permvar_hi_512(<32 x i16> %a0) { 1003; CHECK-LABEL: @identity_test_permvar_hi_512( 1004; CHECK-NEXT: ret <32 x i16> [[A0:%.*]] 1005; 1006 %1 = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> %a0, <32 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 16, i16 17, i16 18, i16 19, i16 20, i16 21, i16 22, i16 23, i16 24, i16 25, i16 26, i16 27, i16 28, i16 29, i16 30, i16 31>) 1007 ret <32 x i16> %1 1008} 1009 1010define <32 x i16> @identity_test_permvar_hi_512_mask(<32 x i16> %a0, <32 x i16> %passthru, i32 %mask) { 1011; CHECK-LABEL: @identity_test_permvar_hi_512_mask( 1012; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1> 1013; CHECK-NEXT: [[TMP2:%.*]] = select <32 x i1> [[TMP1]], <32 x i16> [[A0:%.*]], <32 x i16> [[PASSTHRU:%.*]] 1014; CHECK-NEXT: ret <32 x i16> [[TMP2]] 1015; 1016 %1 = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> %a0, <32 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 16, i16 17, i16 18, i16 19, i16 20, i16 21, i16 22, i16 23, i16 24, i16 25, i16 26, i16 27, i16 28, i16 29, i16 30, i16 31>) 1017 %2 = bitcast i32 %mask to <32 x i1> 1018 %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %passthru 1019 ret <32 x i16> %3 1020} 1021 1022define <32 x i16> @zero_test_permvar_hi_512(<32 x i16> %a0) { 1023; CHECK-LABEL: @zero_test_permvar_hi_512( 1024; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i16> [[A0:%.*]], <32 x i16> poison, <32 x i32> zeroinitializer 1025; CHECK-NEXT: ret <32 x i16> [[TMP1]] 1026; 1027 %1 = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> %a0, <32 x i16> zeroinitializer) 1028 ret <32 x i16> %1 1029} 1030 1031define <32 x i16> @zero_test_permvar_hi_512_mask(<32 x i16> %a0, <32 x i16> %passthru, i32 %mask) { 1032; CHECK-LABEL: @zero_test_permvar_hi_512_mask( 1033; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i16> [[A0:%.*]], <32 x i16> poison, <32 x i32> zeroinitializer 1034; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1> 1035; CHECK-NEXT: [[TMP3:%.*]] = select <32 x i1> [[TMP2]], <32 x i16> [[TMP1]], <32 x i16> [[PASSTHRU:%.*]] 1036; CHECK-NEXT: ret <32 x i16> [[TMP3]] 1037; 1038 %1 = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> %a0, <32 x i16> zeroinitializer) 1039 %2 = bitcast i32 %mask to <32 x i1> 1040 %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %passthru 1041 ret <32 x i16> %3 1042} 1043 1044define <32 x i16> @shuffle_test_permvar_hi_512(<32 x i16> %a0) { 1045; CHECK-LABEL: @shuffle_test_permvar_hi_512( 1046; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i16> [[A0:%.*]], <32 x i16> poison, <32 x i32> <i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1047; CHECK-NEXT: ret <32 x i16> [[TMP1]] 1048; 1049 %1 = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> %a0, <32 x i16> <i16 31, i16 30, i16 29, i16 28, i16 27, i16 26, i16 25, i16 24, i16 23, i16 22, i16 21, i16 20, i16 19, i16 18, i16 17, i16 16, i16 15, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>) 1050 ret <32 x i16> %1 1051} 1052 1053define <32 x i16> @shuffle_test_permvar_hi_512_mask(<32 x i16> %a0, <32 x i16> %passthru, i32 %mask) { 1054; CHECK-LABEL: @shuffle_test_permvar_hi_512_mask( 1055; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i16> [[A0:%.*]], <32 x i16> poison, <32 x i32> <i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1056; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1> 1057; CHECK-NEXT: [[TMP3:%.*]] = select <32 x i1> [[TMP2]], <32 x i16> [[TMP1]], <32 x i16> [[PASSTHRU:%.*]] 1058; CHECK-NEXT: ret <32 x i16> [[TMP3]] 1059; 1060 %1 = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> %a0, <32 x i16> <i16 31, i16 30, i16 29, i16 28, i16 27, i16 26, i16 25, i16 24, i16 23, i16 22, i16 21, i16 20, i16 19, i16 18, i16 17, i16 16, i16 15, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>) 1061 %2 = bitcast i32 %mask to <32 x i1> 1062 %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %passthru 1063 ret <32 x i16> %3 1064} 1065 1066define <32 x i16> @undef_test_permvar_hi_512(<32 x i16> %a0) { 1067; CHECK-LABEL: @undef_test_permvar_hi_512( 1068; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i16> [[A0:%.*]], <32 x i16> poison, <32 x i32> <i32 poison, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1069; CHECK-NEXT: ret <32 x i16> [[TMP1]] 1070; 1071 %1 = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> %a0, <32 x i16> <i16 undef, i16 30, i16 29, i16 28, i16 27, i16 26, i16 25, i16 24, i16 23, i16 22, i16 21, i16 20, i16 19, i16 18, i16 17, i16 16, i16 15, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>) 1072 ret <32 x i16> %1 1073} 1074 1075define <32 x i16> @undef_test_permvar_hi_512_mask(<32 x i16> %a0, <32 x i16> %passthru, i32 %mask) { 1076; CHECK-LABEL: @undef_test_permvar_hi_512_mask( 1077; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i16> [[A0:%.*]], <32 x i16> poison, <32 x i32> <i32 poison, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1078; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1> 1079; CHECK-NEXT: [[TMP3:%.*]] = select <32 x i1> [[TMP2]], <32 x i16> [[TMP1]], <32 x i16> [[PASSTHRU:%.*]] 1080; CHECK-NEXT: ret <32 x i16> [[TMP3]] 1081; 1082 %1 = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> %a0, <32 x i16> <i16 undef, i16 30, i16 29, i16 28, i16 27, i16 26, i16 25, i16 24, i16 23, i16 22, i16 21, i16 20, i16 19, i16 18, i16 17, i16 16, i16 15, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>) 1083 %2 = bitcast i32 %mask to <32 x i1> 1084 %3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %passthru 1085 ret <32 x i16> %3 1086} 1087 1088define <32 x i16> @demandedbit_test_permvar_hi_512_mask(<32 x i16> %a0, <32 x i16> %a1) { 1089; CHECK-LABEL: @demandedbit_test_permvar_hi_512_mask( 1090; CHECK-NEXT: [[S:%.*]] = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> [[A0:%.*]], <32 x i16> [[A1:%.*]]) 1091; CHECK-NEXT: ret <32 x i16> [[S]] 1092; 1093 %m = or <32 x i16> %a1, <i16 0, i16 32, i16 -32, i16 64, i16 -64, i16 128, i16 -128, i16 256, i16 -256, i16 512, i16 -512, i16 1024, i16 -1024, i16 2048, i16 -2048, i16 4096, i16 0, i16 32, i16 -32, i16 64, i16 -64, i16 128, i16 -128, i16 256, i16 -256, i16 512, i16 -512, i16 1024, i16 -1024, i16 2048, i16 -2048, i16 4096> 1094 %s = call <32 x i16> @llvm.x86.avx512.permvar.hi.512(<32 x i16> %a0, <32 x i16> %m) 1095 ret <32 x i16> %s 1096} 1097 1098declare <16 x i8> @llvm.x86.avx512.permvar.qi.128(<16 x i8>, <16 x i8>) 1099 1100define <16 x i8> @identity_test_permvar_qi_128(<16 x i8> %a0) { 1101; CHECK-LABEL: @identity_test_permvar_qi_128( 1102; CHECK-NEXT: ret <16 x i8> [[A0:%.*]] 1103; 1104 %1 = call <16 x i8> @llvm.x86.avx512.permvar.qi.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>) 1105 ret <16 x i8> %1 1106} 1107 1108define <16 x i8> @identity_test_permvar_qi_128_mask(<16 x i8> %a0, <16 x i8> %passthru, i16 %mask) { 1109; CHECK-LABEL: @identity_test_permvar_qi_128_mask( 1110; CHECK-NEXT: [[TMP1:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 1111; CHECK-NEXT: [[TMP2:%.*]] = select <16 x i1> [[TMP1]], <16 x i8> [[A0:%.*]], <16 x i8> [[PASSTHRU:%.*]] 1112; CHECK-NEXT: ret <16 x i8> [[TMP2]] 1113; 1114 %1 = call <16 x i8> @llvm.x86.avx512.permvar.qi.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>) 1115 %2 = bitcast i16 %mask to <16 x i1> 1116 %3 = select <16 x i1> %2, <16 x i8> %1, <16 x i8> %passthru 1117 ret <16 x i8> %3 1118} 1119 1120define <16 x i8> @zero_test_permvar_qi_128(<16 x i8> %a0) { 1121; CHECK-LABEL: @zero_test_permvar_qi_128( 1122; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[A0:%.*]], <16 x i8> poison, <16 x i32> zeroinitializer 1123; CHECK-NEXT: ret <16 x i8> [[TMP1]] 1124; 1125 %1 = call <16 x i8> @llvm.x86.avx512.permvar.qi.128(<16 x i8> %a0, <16 x i8> zeroinitializer) 1126 ret <16 x i8> %1 1127} 1128 1129define <16 x i8> @zero_test_permvar_qi_128_mask(<16 x i8> %a0, <16 x i8> %passthru, i16 %mask) { 1130; CHECK-LABEL: @zero_test_permvar_qi_128_mask( 1131; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[A0:%.*]], <16 x i8> poison, <16 x i32> zeroinitializer 1132; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 1133; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP2]], <16 x i8> [[TMP1]], <16 x i8> [[PASSTHRU:%.*]] 1134; CHECK-NEXT: ret <16 x i8> [[TMP3]] 1135; 1136 %1 = call <16 x i8> @llvm.x86.avx512.permvar.qi.128(<16 x i8> %a0, <16 x i8> zeroinitializer) 1137 %2 = bitcast i16 %mask to <16 x i1> 1138 %3 = select <16 x i1> %2, <16 x i8> %1, <16 x i8> %passthru 1139 ret <16 x i8> %3 1140} 1141 1142define <16 x i8> @shuffle_test_permvar_qi_128(<16 x i8> %a0) { 1143; CHECK-LABEL: @shuffle_test_permvar_qi_128( 1144; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[A0:%.*]], <16 x i8> poison, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1145; CHECK-NEXT: ret <16 x i8> [[TMP1]] 1146; 1147 %1 = call <16 x i8> @llvm.x86.avx512.permvar.qi.128(<16 x i8> %a0, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 1148 ret <16 x i8> %1 1149} 1150 1151define <16 x i8> @shuffle_test_permvar_qi_128_mask(<16 x i8> %a0, <16 x i8> %passthru, i16 %mask) { 1152; CHECK-LABEL: @shuffle_test_permvar_qi_128_mask( 1153; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[A0:%.*]], <16 x i8> poison, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1154; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 1155; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP2]], <16 x i8> [[TMP1]], <16 x i8> [[PASSTHRU:%.*]] 1156; CHECK-NEXT: ret <16 x i8> [[TMP3]] 1157; 1158 %1 = call <16 x i8> @llvm.x86.avx512.permvar.qi.128(<16 x i8> %a0, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 1159 %2 = bitcast i16 %mask to <16 x i1> 1160 %3 = select <16 x i1> %2, <16 x i8> %1, <16 x i8> %passthru 1161 ret <16 x i8> %3 1162} 1163 1164define <16 x i8> @undef_test_permvar_qi_128(<16 x i8> %a0) { 1165; CHECK-LABEL: @undef_test_permvar_qi_128( 1166; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[A0:%.*]], <16 x i8> poison, <16 x i32> <i32 poison, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1167; CHECK-NEXT: ret <16 x i8> [[TMP1]] 1168; 1169 %1 = call <16 x i8> @llvm.x86.avx512.permvar.qi.128(<16 x i8> %a0, <16 x i8> <i8 undef, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 1170 ret <16 x i8> %1 1171} 1172 1173define <16 x i8> @undef_test_permvar_qi_128_mask(<16 x i8> %a0, <16 x i8> %passthru, i16 %mask) { 1174; CHECK-LABEL: @undef_test_permvar_qi_128_mask( 1175; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[A0:%.*]], <16 x i8> poison, <16 x i32> <i32 poison, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1176; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16 [[MASK:%.*]] to <16 x i1> 1177; CHECK-NEXT: [[TMP3:%.*]] = select <16 x i1> [[TMP2]], <16 x i8> [[TMP1]], <16 x i8> [[PASSTHRU:%.*]] 1178; CHECK-NEXT: ret <16 x i8> [[TMP3]] 1179; 1180 %1 = call <16 x i8> @llvm.x86.avx512.permvar.qi.128(<16 x i8> %a0, <16 x i8> <i8 undef, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 1181 %2 = bitcast i16 %mask to <16 x i1> 1182 %3 = select <16 x i1> %2, <16 x i8> %1, <16 x i8> %passthru 1183 ret <16 x i8> %3 1184} 1185 1186define <16 x i8> @demandedbit_test_permvar_qi_129_mask(<16 x i8> %a0, <16 x i8> %a1) { 1187; CHECK-LABEL: @demandedbit_test_permvar_qi_129_mask( 1188; CHECK-NEXT: [[S:%.*]] = call <16 x i8> @llvm.x86.avx512.permvar.qi.128(<16 x i8> [[A0:%.*]], <16 x i8> [[A1:%.*]]) 1189; CHECK-NEXT: ret <16 x i8> [[S]] 1190; 1191 %m = or <16 x i8> %a1, <i8 0, i8 16, i8 -16, i8 32, i8 -32, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 16, i8 -16, i8 32, i8 -32, i8 64, i8 -64> 1192 %s = call <16 x i8> @llvm.x86.avx512.permvar.qi.128(<16 x i8> %a0, <16 x i8> %m) 1193 ret <16 x i8> %s 1194} 1195 1196declare <32 x i8> @llvm.x86.avx512.permvar.qi.256(<32 x i8>, <32 x i8>) 1197 1198define <32 x i8> @identity_test_permvar_qi_256(<32 x i8> %a0) { 1199; CHECK-LABEL: @identity_test_permvar_qi_256( 1200; CHECK-NEXT: ret <32 x i8> [[A0:%.*]] 1201; 1202 %1 = call <32 x i8> @llvm.x86.avx512.permvar.qi.256(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>) 1203 ret <32 x i8> %1 1204} 1205 1206define <32 x i8> @identity_test_permvar_qi_256_mask(<32 x i8> %a0, <32 x i8> %passthru, i32 %mask) { 1207; CHECK-LABEL: @identity_test_permvar_qi_256_mask( 1208; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1> 1209; CHECK-NEXT: [[TMP2:%.*]] = select <32 x i1> [[TMP1]], <32 x i8> [[A0:%.*]], <32 x i8> [[PASSTHRU:%.*]] 1210; CHECK-NEXT: ret <32 x i8> [[TMP2]] 1211; 1212 %1 = call <32 x i8> @llvm.x86.avx512.permvar.qi.256(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>) 1213 %2 = bitcast i32 %mask to <32 x i1> 1214 %3 = select <32 x i1> %2, <32 x i8> %1, <32 x i8> %passthru 1215 ret <32 x i8> %3 1216} 1217 1218define <32 x i8> @zero_test_permvar_qi_256(<32 x i8> %a0) { 1219; CHECK-LABEL: @zero_test_permvar_qi_256( 1220; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[A0:%.*]], <32 x i8> poison, <32 x i32> zeroinitializer 1221; CHECK-NEXT: ret <32 x i8> [[TMP1]] 1222; 1223 %1 = call <32 x i8> @llvm.x86.avx512.permvar.qi.256(<32 x i8> %a0, <32 x i8> zeroinitializer) 1224 ret <32 x i8> %1 1225} 1226 1227define <32 x i8> @zero_test_permvar_qi_256_mask(<32 x i8> %a0, <32 x i8> %passthru, i32 %mask) { 1228; CHECK-LABEL: @zero_test_permvar_qi_256_mask( 1229; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[A0:%.*]], <32 x i8> poison, <32 x i32> zeroinitializer 1230; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1> 1231; CHECK-NEXT: [[TMP3:%.*]] = select <32 x i1> [[TMP2]], <32 x i8> [[TMP1]], <32 x i8> [[PASSTHRU:%.*]] 1232; CHECK-NEXT: ret <32 x i8> [[TMP3]] 1233; 1234 %1 = call <32 x i8> @llvm.x86.avx512.permvar.qi.256(<32 x i8> %a0, <32 x i8> zeroinitializer) 1235 %2 = bitcast i32 %mask to <32 x i1> 1236 %3 = select <32 x i1> %2, <32 x i8> %1, <32 x i8> %passthru 1237 ret <32 x i8> %3 1238} 1239 1240define <32 x i8> @shuffle_test_permvar_qi_256(<32 x i8> %a0) { 1241; CHECK-LABEL: @shuffle_test_permvar_qi_256( 1242; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[A0:%.*]], <32 x i8> poison, <32 x i32> <i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1243; CHECK-NEXT: ret <32 x i8> [[TMP1]] 1244; 1245 %1 = call <32 x i8> @llvm.x86.avx512.permvar.qi.256(<32 x i8> %a0, <32 x i8> <i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 1246 ret <32 x i8> %1 1247} 1248 1249define <32 x i8> @shuffle_test_permvar_qi_256_mask(<32 x i8> %a0, <32 x i8> %passthru, i32 %mask) { 1250; CHECK-LABEL: @shuffle_test_permvar_qi_256_mask( 1251; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[A0:%.*]], <32 x i8> poison, <32 x i32> <i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1252; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1> 1253; CHECK-NEXT: [[TMP3:%.*]] = select <32 x i1> [[TMP2]], <32 x i8> [[TMP1]], <32 x i8> [[PASSTHRU:%.*]] 1254; CHECK-NEXT: ret <32 x i8> [[TMP3]] 1255; 1256 %1 = call <32 x i8> @llvm.x86.avx512.permvar.qi.256(<32 x i8> %a0, <32 x i8> <i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 1257 %2 = bitcast i32 %mask to <32 x i1> 1258 %3 = select <32 x i1> %2, <32 x i8> %1, <32 x i8> %passthru 1259 ret <32 x i8> %3 1260} 1261 1262define <32 x i8> @undef_test_permvar_qi_256(<32 x i8> %a0) { 1263; CHECK-LABEL: @undef_test_permvar_qi_256( 1264; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[A0:%.*]], <32 x i8> poison, <32 x i32> <i32 poison, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1265; CHECK-NEXT: ret <32 x i8> [[TMP1]] 1266; 1267 %1 = call <32 x i8> @llvm.x86.avx512.permvar.qi.256(<32 x i8> %a0, <32 x i8> <i8 undef, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 1268 ret <32 x i8> %1 1269} 1270 1271define <32 x i8> @undef_test_permvar_qi_256_mask(<32 x i8> %a0, <32 x i8> %passthru, i32 %mask) { 1272; CHECK-LABEL: @undef_test_permvar_qi_256_mask( 1273; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[A0:%.*]], <32 x i8> poison, <32 x i32> <i32 poison, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1274; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[MASK:%.*]] to <32 x i1> 1275; CHECK-NEXT: [[TMP3:%.*]] = select <32 x i1> [[TMP2]], <32 x i8> [[TMP1]], <32 x i8> [[PASSTHRU:%.*]] 1276; CHECK-NEXT: ret <32 x i8> [[TMP3]] 1277; 1278 %1 = call <32 x i8> @llvm.x86.avx512.permvar.qi.256(<32 x i8> %a0, <32 x i8> <i8 undef, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 1279 %2 = bitcast i32 %mask to <32 x i1> 1280 %3 = select <32 x i1> %2, <32 x i8> %1, <32 x i8> %passthru 1281 ret <32 x i8> %3 1282} 1283 1284define <32 x i8> @demandedbit_test_permvar_qi_256_mask(<32 x i8> %a0, <32 x i8> %a1) { 1285; CHECK-LABEL: @demandedbit_test_permvar_qi_256_mask( 1286; CHECK-NEXT: [[S:%.*]] = call <32 x i8> @llvm.x86.avx512.permvar.qi.256(<32 x i8> [[A0:%.*]], <32 x i8> [[A1:%.*]]) 1287; CHECK-NEXT: ret <32 x i8> [[S]] 1288; 1289 %m = or <32 x i8> %a1, <i8 0, i8 32, i8 -32, i8 64, i8 -64, i8 128, i8 -128, i8 256, i8 -256, i8 512, i8 -512, i8 1024, i8 -1024, i8 2048, i8 -2048, i8 4096, i8 0, i8 32, i8 -32, i8 64, i8 -64, i8 128, i8 -128, i8 256, i8 -256, i8 512, i8 -512, i8 1024, i8 -1024, i8 2048, i8 -2048, i8 4096> 1290 %s = call <32 x i8> @llvm.x86.avx512.permvar.qi.256(<32 x i8> %a0, <32 x i8> %m) 1291 ret <32 x i8> %s 1292} 1293 1294declare <64 x i8> @llvm.x86.avx512.permvar.qi.512(<64 x i8>, <64 x i8>) 1295 1296define <64 x i8> @identity_test_permvar_qi_512(<64 x i8> %a0) { 1297; CHECK-LABEL: @identity_test_permvar_qi_512( 1298; CHECK-NEXT: ret <64 x i8> [[A0:%.*]] 1299; 1300 %1 = call <64 x i8> @llvm.x86.avx512.permvar.qi.512(<64 x i8> %a0, <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31, i8 32, i8 33, i8 34, i8 35, i8 36, i8 37, i8 38, i8 39, i8 40, i8 41, i8 42, i8 43, i8 44, i8 45, i8 46, i8 47, i8 48, i8 49, i8 50, i8 51, i8 52, i8 53, i8 54, i8 55, i8 56, i8 57, i8 58, i8 59, i8 60, i8 61, i8 62, i8 63>) 1301 ret <64 x i8> %1 1302} 1303 1304define <64 x i8> @identity_test_permvar_qi_512_mask(<64 x i8> %a0, <64 x i8> %passthru, i64 %mask) { 1305; CHECK-LABEL: @identity_test_permvar_qi_512_mask( 1306; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1> 1307; CHECK-NEXT: [[TMP2:%.*]] = select <64 x i1> [[TMP1]], <64 x i8> [[A0:%.*]], <64 x i8> [[PASSTHRU:%.*]] 1308; CHECK-NEXT: ret <64 x i8> [[TMP2]] 1309; 1310 %1 = call <64 x i8> @llvm.x86.avx512.permvar.qi.512(<64 x i8> %a0, <64 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31, i8 32, i8 33, i8 34, i8 35, i8 36, i8 37, i8 38, i8 39, i8 40, i8 41, i8 42, i8 43, i8 44, i8 45, i8 46, i8 47, i8 48, i8 49, i8 50, i8 51, i8 52, i8 53, i8 54, i8 55, i8 56, i8 57, i8 58, i8 59, i8 60, i8 61, i8 62, i8 63>) 1311 %2 = bitcast i64 %mask to <64 x i1> 1312 %3 = select <64 x i1> %2, <64 x i8> %1, <64 x i8> %passthru 1313 ret <64 x i8> %3 1314} 1315 1316define <64 x i8> @zero_test_permvar_qi_512(<64 x i8> %a0) { 1317; CHECK-LABEL: @zero_test_permvar_qi_512( 1318; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[A0:%.*]], <64 x i8> poison, <64 x i32> zeroinitializer 1319; CHECK-NEXT: ret <64 x i8> [[TMP1]] 1320; 1321 %1 = call <64 x i8> @llvm.x86.avx512.permvar.qi.512(<64 x i8> %a0, <64 x i8> zeroinitializer) 1322 ret <64 x i8> %1 1323} 1324 1325define <64 x i8> @zero_test_permvar_qi_512_mask(<64 x i8> %a0, <64 x i8> %passthru, i64 %mask) { 1326; CHECK-LABEL: @zero_test_permvar_qi_512_mask( 1327; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[A0:%.*]], <64 x i8> poison, <64 x i32> zeroinitializer 1328; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1> 1329; CHECK-NEXT: [[TMP3:%.*]] = select <64 x i1> [[TMP2]], <64 x i8> [[TMP1]], <64 x i8> [[PASSTHRU:%.*]] 1330; CHECK-NEXT: ret <64 x i8> [[TMP3]] 1331; 1332 %1 = call <64 x i8> @llvm.x86.avx512.permvar.qi.512(<64 x i8> %a0, <64 x i8> zeroinitializer) 1333 %2 = bitcast i64 %mask to <64 x i1> 1334 %3 = select <64 x i1> %2, <64 x i8> %1, <64 x i8> %passthru 1335 ret <64 x i8> %3 1336} 1337 1338define <64 x i8> @shuffle_test_permvar_qi_512(<64 x i8> %a0) { 1339; CHECK-LABEL: @shuffle_test_permvar_qi_512( 1340; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[A0:%.*]], <64 x i8> poison, <64 x i32> <i32 63, i32 62, i32 61, i32 60, i32 59, i32 58, i32 57, i32 56, i32 55, i32 54, i32 53, i32 52, i32 51, i32 50, i32 49, i32 48, i32 47, i32 46, i32 45, i32 44, i32 43, i32 42, i32 41, i32 40, i32 39, i32 38, i32 37, i32 36, i32 35, i32 34, i32 33, i32 32, i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1341; CHECK-NEXT: ret <64 x i8> [[TMP1]] 1342; 1343 %1 = call <64 x i8> @llvm.x86.avx512.permvar.qi.512(<64 x i8> %a0, <64 x i8> <i8 63, i8 62, i8 61, i8 60, i8 59, i8 58, i8 57, i8 56, i8 55, i8 54, i8 53, i8 52, i8 51, i8 50, i8 49, i8 48, i8 47, i8 46, i8 45, i8 44, i8 43, i8 42, i8 41, i8 40, i8 39, i8 38, i8 37, i8 36, i8 35, i8 34, i8 33, i8 32, i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 1344 ret <64 x i8> %1 1345} 1346 1347define <64 x i8> @shuffle_test_permvar_qi_512_mask(<64 x i8> %a0, <64 x i8> %passthru, i64 %mask) { 1348; CHECK-LABEL: @shuffle_test_permvar_qi_512_mask( 1349; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[A0:%.*]], <64 x i8> poison, <64 x i32> <i32 63, i32 62, i32 61, i32 60, i32 59, i32 58, i32 57, i32 56, i32 55, i32 54, i32 53, i32 52, i32 51, i32 50, i32 49, i32 48, i32 47, i32 46, i32 45, i32 44, i32 43, i32 42, i32 41, i32 40, i32 39, i32 38, i32 37, i32 36, i32 35, i32 34, i32 33, i32 32, i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1350; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1> 1351; CHECK-NEXT: [[TMP3:%.*]] = select <64 x i1> [[TMP2]], <64 x i8> [[TMP1]], <64 x i8> [[PASSTHRU:%.*]] 1352; CHECK-NEXT: ret <64 x i8> [[TMP3]] 1353; 1354 %1 = call <64 x i8> @llvm.x86.avx512.permvar.qi.512(<64 x i8> %a0, <64 x i8> <i8 63, i8 62, i8 61, i8 60, i8 59, i8 58, i8 57, i8 56, i8 55, i8 54, i8 53, i8 52, i8 51, i8 50, i8 49, i8 48, i8 47, i8 46, i8 45, i8 44, i8 43, i8 42, i8 41, i8 40, i8 39, i8 38, i8 37, i8 36, i8 35, i8 34, i8 33, i8 32, i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 1355 %2 = bitcast i64 %mask to <64 x i1> 1356 %3 = select <64 x i1> %2, <64 x i8> %1, <64 x i8> %passthru 1357 ret <64 x i8> %3 1358} 1359 1360define <64 x i8> @undef_test_permvar_qi_512(<64 x i8> %a0) { 1361; CHECK-LABEL: @undef_test_permvar_qi_512( 1362; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[A0:%.*]], <64 x i8> poison, <64 x i32> <i32 poison, i32 62, i32 61, i32 60, i32 59, i32 58, i32 57, i32 56, i32 55, i32 54, i32 53, i32 52, i32 51, i32 50, i32 49, i32 48, i32 47, i32 46, i32 45, i32 44, i32 43, i32 42, i32 41, i32 40, i32 39, i32 38, i32 37, i32 36, i32 35, i32 34, i32 33, i32 32, i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1363; CHECK-NEXT: ret <64 x i8> [[TMP1]] 1364; 1365 %1 = call <64 x i8> @llvm.x86.avx512.permvar.qi.512(<64 x i8> %a0, <64 x i8> <i8 undef, i8 62, i8 61, i8 60, i8 59, i8 58, i8 57, i8 56, i8 55, i8 54, i8 53, i8 52, i8 51, i8 50, i8 49, i8 48, i8 47, i8 46, i8 45, i8 44, i8 43, i8 42, i8 41, i8 40, i8 39, i8 38, i8 37, i8 36, i8 35, i8 34, i8 33, i8 32, i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 1366 ret <64 x i8> %1 1367} 1368 1369define <64 x i8> @undef_test_permvar_qi_512_mask(<64 x i8> %a0, <64 x i8> %passthru, i64 %mask) { 1370; CHECK-LABEL: @undef_test_permvar_qi_512_mask( 1371; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> [[A0:%.*]], <64 x i8> poison, <64 x i32> <i32 poison, i32 62, i32 61, i32 60, i32 59, i32 58, i32 57, i32 56, i32 55, i32 54, i32 53, i32 52, i32 51, i32 50, i32 49, i32 48, i32 47, i32 46, i32 45, i32 44, i32 43, i32 42, i32 41, i32 40, i32 39, i32 38, i32 37, i32 36, i32 35, i32 34, i32 33, i32 32, i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 1372; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64 [[MASK:%.*]] to <64 x i1> 1373; CHECK-NEXT: [[TMP3:%.*]] = select <64 x i1> [[TMP2]], <64 x i8> [[TMP1]], <64 x i8> [[PASSTHRU:%.*]] 1374; CHECK-NEXT: ret <64 x i8> [[TMP3]] 1375; 1376 %1 = call <64 x i8> @llvm.x86.avx512.permvar.qi.512(<64 x i8> %a0, <64 x i8> <i8 undef, i8 62, i8 61, i8 60, i8 59, i8 58, i8 57, i8 56, i8 55, i8 54, i8 53, i8 52, i8 51, i8 50, i8 49, i8 48, i8 47, i8 46, i8 45, i8 44, i8 43, i8 42, i8 41, i8 40, i8 39, i8 38, i8 37, i8 36, i8 35, i8 34, i8 33, i8 32, i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>) 1377 %2 = bitcast i64 %mask to <64 x i1> 1378 %3 = select <64 x i1> %2, <64 x i8> %1, <64 x i8> %passthru 1379 ret <64 x i8> %3 1380} 1381 1382define <64 x i8> @demandedbit_test_permvar_qi_512_mask(<64 x i8> %a0, <64 x i8> %a1) { 1383; CHECK-LABEL: @demandedbit_test_permvar_qi_512_mask( 1384; CHECK-NEXT: [[S:%.*]] = call <64 x i8> @llvm.x86.avx512.permvar.qi.512(<64 x i8> [[A0:%.*]], <64 x i8> [[A1:%.*]]) 1385; CHECK-NEXT: ret <64 x i8> [[S]] 1386; 1387 %m = or <64 x i8> %a1, <i8 0, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 64, i8 -64, i8 128, i8 -128, i8 0, i8 64, i8 -64, i8 128> 1388 %s = call <64 x i8> @llvm.x86.avx512.permvar.qi.512(<64 x i8> %a0, <64 x i8> %m) 1389 ret <64 x i8> %s 1390} 1391