xref: /llvm-project/llvm/test/Transforms/InstCombine/X86/x86-pmulhrs.ll (revision 38fffa630ee80163dc65e759392ad29798905679) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | FileCheck %s
3
4;
5; UNDEF Elts
6;
7
8define <8 x i16> @undef_pmulh_128(<8 x i16> %a0) {
9; CHECK-LABEL: @undef_pmulh_128(
10; CHECK-NEXT:    ret <8 x i16> zeroinitializer
11;
12  %1 = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> %a0, <8 x i16> undef)
13  ret <8 x i16> %1
14}
15
16define <8 x i16> @undef_pmulh_128_commute(<8 x i16> %a0) {
17; CHECK-LABEL: @undef_pmulh_128_commute(
18; CHECK-NEXT:    ret <8 x i16> zeroinitializer
19;
20  %1 = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> undef, <8 x i16> %a0)
21  ret <8 x i16> %1
22}
23
24define <16 x i16> @undef_pmulh_256(<16 x i16> %a0) {
25; CHECK-LABEL: @undef_pmulh_256(
26; CHECK-NEXT:    ret <16 x i16> zeroinitializer
27;
28  %1 = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> %a0, <16 x i16> undef)
29  ret <16 x i16> %1
30}
31
32define <16 x i16> @undef_pmulh_256_commute(<16 x i16> %a0) {
33; CHECK-LABEL: @undef_pmulh_256_commute(
34; CHECK-NEXT:    ret <16 x i16> zeroinitializer
35;
36  %1 = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> undef, <16 x i16> %a0)
37  ret <16 x i16> %1
38}
39
40define <32 x i16> @undef_pmulh_512(<32 x i16> %a0) {
41; CHECK-LABEL: @undef_pmulh_512(
42; CHECK-NEXT:    ret <32 x i16> zeroinitializer
43;
44  %1 = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> %a0, <32 x i16> undef)
45  ret <32 x i16> %1
46}
47
48define <32 x i16> @undef_pmulh_512_commute(<32 x i16> %a0) {
49; CHECK-LABEL: @undef_pmulh_512_commute(
50; CHECK-NEXT:    ret <32 x i16> zeroinitializer
51;
52  %1 = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> undef, <32 x i16> %a0)
53  ret <32 x i16> %1
54}
55
56;
57; Zero Elts
58;
59
60define <8 x i16> @zero_pmulh_128(<8 x i16> %a0) {
61; CHECK-LABEL: @zero_pmulh_128(
62; CHECK-NEXT:    ret <8 x i16> zeroinitializer
63;
64  %1 = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> %a0, <8 x i16> zeroinitializer)
65  ret <8 x i16> %1
66}
67
68define <8 x i16> @zero_pmulh_128_commute(<8 x i16> %a0) {
69; CHECK-LABEL: @zero_pmulh_128_commute(
70; CHECK-NEXT:    ret <8 x i16> zeroinitializer
71;
72  %1 = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> zeroinitializer, <8 x i16> %a0)
73  ret <8 x i16> %1
74}
75
76define <16 x i16> @zero_pmulh_256(<16 x i16> %a0) {
77; CHECK-LABEL: @zero_pmulh_256(
78; CHECK-NEXT:    ret <16 x i16> zeroinitializer
79;
80  %1 = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> %a0, <16 x i16> zeroinitializer)
81  ret <16 x i16> %1
82}
83
84define <16 x i16> @zero_pmulh_256_commute(<16 x i16> %a0) {
85; CHECK-LABEL: @zero_pmulh_256_commute(
86; CHECK-NEXT:    ret <16 x i16> zeroinitializer
87;
88  %1 = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> zeroinitializer, <16 x i16> %a0)
89  ret <16 x i16> %1
90}
91
92define <32 x i16> @zero_pmulh_512(<32 x i16> %a0) {
93; CHECK-LABEL: @zero_pmulh_512(
94; CHECK-NEXT:    ret <32 x i16> zeroinitializer
95;
96  %1 = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> %a0, <32 x i16> zeroinitializer)
97  ret <32 x i16> %1
98}
99
100define <32 x i16> @zero_pmulh_512_commute(<32 x i16> %a0) {
101; CHECK-LABEL: @zero_pmulh_512_commute(
102; CHECK-NEXT:    ret <32 x i16> zeroinitializer
103;
104  %1 = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> zeroinitializer, <32 x i16> %a0)
105  ret <32 x i16> %1
106}
107
108;
109; Multiply by One
110;
111
112define <8 x i16> @one_pmulh_128(<8 x i16> %a0) {
113; CHECK-LABEL: @one_pmulh_128(
114; CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> [[A0:%.*]], <8 x i16> splat (i16 1))
115; CHECK-NEXT:    ret <8 x i16> [[TMP1]]
116;
117  %1 = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> %a0, <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>)
118  ret <8 x i16> %1
119}
120
121define <8 x i16> @one_pmulh_128_commute(<8 x i16> %a0) {
122; CHECK-LABEL: @one_pmulh_128_commute(
123; CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> splat (i16 1), <8 x i16> [[A0:%.*]])
124; CHECK-NEXT:    ret <8 x i16> [[TMP1]]
125;
126  %1 = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, <8 x i16> %a0)
127  ret <8 x i16> %1
128}
129
130define <16 x i16> @one_pmulh_256(<16 x i16> %a0) {
131; CHECK-LABEL: @one_pmulh_256(
132; CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> [[A0:%.*]], <16 x i16> splat (i16 1))
133; CHECK-NEXT:    ret <16 x i16> [[TMP1]]
134;
135  %1 = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> %a0, <16 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>)
136  ret <16 x i16> %1
137}
138
139define <16 x i16> @one_pmulh_256_commute(<16 x i16> %a0) {
140; CHECK-LABEL: @one_pmulh_256_commute(
141; CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> splat (i16 1), <16 x i16> [[A0:%.*]])
142; CHECK-NEXT:    ret <16 x i16> [[TMP1]]
143;
144  %1 = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, <16 x i16> %a0)
145  ret <16 x i16> %1
146}
147
148define <32 x i16> @one_pmulh_512(<32 x i16> %a0) {
149; CHECK-LABEL: @one_pmulh_512(
150; CHECK-NEXT:    [[TMP1:%.*]] = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> [[A0:%.*]], <32 x i16> splat (i16 1))
151; CHECK-NEXT:    ret <32 x i16> [[TMP1]]
152;
153  %1 = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> %a0, <32 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>)
154  ret <32 x i16> %1
155}
156
157define <32 x i16> @one_pmulh_512_commute(<32 x i16> %a0) {
158; CHECK-LABEL: @one_pmulh_512_commute(
159; CHECK-NEXT:    [[TMP1:%.*]] = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> splat (i16 1), <32 x i16> [[A0:%.*]])
160; CHECK-NEXT:    ret <32 x i16> [[TMP1]]
161;
162  %1 = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, <32 x i16> %a0)
163  ret <32 x i16> %1
164}
165
166;
167; Constant Folding
168;
169
170define <8 x i16> @fold_pmulh_128() {
171; CHECK-LABEL: @fold_pmulh_128(
172; CHECK-NEXT:    ret <8 x i16> <i16 0, i16 0, i16 -3, i16 -4, i16 0, i16 0, i16 -7, i16 -8>
173;
174  %1 = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> <i16 -1, i16 2, i16 3, i16 -4, i16 -5, i16 6, i16 7, i16 -8>, <8 x i16> <i16 -5, i16 7, i16 -32768, i16 32765, i16 -9, i16 -11, i16 -32763, i16 32761>)
175  ret <8 x i16> %1
176}
177
178define <16 x i16> @fold_pmulh_256() {
179; CHECK-LABEL: @fold_pmulh_256(
180; CHECK-NEXT:    ret <16 x i16> <i16 0, i16 0, i16 -2, i16 3, i16 0, i16 0, i16 -6, i16 7, i16 0, i16 0, i16 10, i16 11, i16 0, i16 0, i16 14, i16 -15>
181;
182  %1 = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> <i16 0, i16 -1, i16 2, i16 3, i16 -4, i16 -5, i16 6, i16 7, i16 -8, i16 9, i16 -10, i16 11, i16 -12, i16 13, i16 -14, i16 -15>, <16 x i16> <i16 -5, i16 7, i16 -32768, i16 32766, i16 -9, i16 -11, i16 -32764, i16 32762, i16 13, i16 -15, i16 -32760, i16 32758, i16 17, i16 -19, i16 -32756, i16 32756>)
183  ret <16 x i16> %1
184}
185
186define <32 x i16> @fold_pmulh_512() {
187; CHECK-LABEL: @fold_pmulh_512(
188; CHECK-NEXT:    ret <32 x i16> <i16 0, i16 0, i16 -2, i16 3, i16 0, i16 0, i16 -6, i16 7, i16 0, i16 0, i16 10, i16 11, i16 0, i16 0, i16 14, i16 -15, i16 0, i16 0, i16 -2, i16 3, i16 0, i16 0, i16 -6, i16 7, i16 0, i16 0, i16 10, i16 11, i16 0, i16 0, i16 14, i16 -15>
189;
190  %1 = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> <i16 0, i16 -1, i16 2, i16 3, i16 -4, i16 -5, i16 6, i16 7, i16 -8, i16 9, i16 -10, i16 11, i16 -12, i16 13, i16 -14, i16 -15, i16 -5, i16 7, i16 -32768, i16 32766, i16 -9, i16 -11, i16 -32764, i16 32762, i16 13, i16 -15, i16 -32760, i16 32758, i16 17, i16 -19, i16 -32756, i16 32756>, <32 x i16> <i16 -5, i16 7, i16 -32768, i16 32766, i16 -9, i16 -11, i16 -32764, i16 32762, i16 13, i16 -15, i16 -32760, i16 32758, i16 17, i16 -19, i16 -32756, i16 32756, i16 0, i16 -1, i16 2, i16 3, i16 -4, i16 -5, i16 6, i16 7, i16 -8, i16 9, i16 -10, i16 11, i16 -12, i16 13, i16 -14, i16 -15>)
191  ret <32 x i16> %1
192}
193
194;
195; Demanded Elts
196;
197
198define <8 x i16> @elts_pmulh_128(<8 x i16> %a0, <8 x i16> %a1) {
199; CHECK-LABEL: @elts_pmulh_128(
200; CHECK-NEXT:    [[TMP1:%.*]] = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> [[A0:%.*]], <8 x i16> [[A1:%.*]])
201; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> poison, <8 x i32> zeroinitializer
202; CHECK-NEXT:    ret <8 x i16> [[TMP2]]
203;
204  %1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2>
205  %2 = shufflevector <8 x i16> %a1, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
206  %3 = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> %1, <8 x i16> %2)
207  %4 = shufflevector <8 x i16> %3, <8 x i16> poison, <8 x i32> zeroinitializer
208  ret <8 x i16> %4
209}
210
211define <16 x i16> @elts_pmulh_256(<16 x i16> %a0, <16 x i16> %a1) {
212; CHECK-LABEL: @elts_pmulh_256(
213; CHECK-NEXT:    [[TMP1:%.*]] = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> [[A0:%.*]], <16 x i16> [[A1:%.*]])
214; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <16 x i16> [[TMP1]], <16 x i16> poison, <16 x i32> zeroinitializer
215; CHECK-NEXT:    ret <16 x i16> [[TMP2]]
216;
217  %1 = shufflevector <16 x i16> %a0, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
218  %2 = shufflevector <16 x i16> %a1, <16 x i16> undef, <16 x i32> <i32 0, i32 1, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
219  %3 = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> %1, <16 x i16> %2)
220  %4 = shufflevector <16 x i16> %3, <16 x i16> poison, <16 x i32> zeroinitializer
221  ret <16 x i16> %4
222}
223
224define <32 x i16> @elts_pmulh_512(<32 x i16> %a0, <32 x i16> %a1) {
225; CHECK-LABEL: @elts_pmulh_512(
226; CHECK-NEXT:    [[TMP1:%.*]] = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> [[A0:%.*]], <32 x i16> [[A1:%.*]])
227; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <32 x i16> [[TMP1]], <32 x i16> poison, <32 x i32> zeroinitializer
228; CHECK-NEXT:    ret <32 x i16> [[TMP2]]
229;
230  %1 = shufflevector <32 x i16> %a0, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
231  %2 = shufflevector <32 x i16> %a1, <32 x i16> undef, <32 x i32> <i32 0, i32 1, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
232  %3 = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> %1, <32 x i16> %2)
233  %4 = shufflevector <32 x i16> %3, <32 x i16> poison, <32 x i32> zeroinitializer
234  ret <32 x i16> %4
235}
236