1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=instcombine -S | FileCheck %s 3 4declare i32 @llvm.riscv.vsetvlimax.i32(i32, i32) 5declare i64 @llvm.riscv.vsetvlimax.i64(i64, i64) 6 7define i32 @vsetvlimax_i32() nounwind #0 { 8; CHECK-LABEL: @vsetvlimax_i32( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.vsetvlimax.i32(i32 1, i32 1) 11; CHECK-NEXT: ret i32 [[TMP0]] 12; 13entry: 14 %0 = call i32 @llvm.riscv.vsetvlimax.i32(i32 1, i32 1) 15 %1 = and i32 %0, 2147483647 16 ret i32 %1 17} 18 19define i64 @vsetvlimax_sext_i64() nounwind #0 { 20; CHECK-LABEL: @vsetvlimax_sext_i64( 21; CHECK-NEXT: entry: 22; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1) 23; CHECK-NEXT: ret i64 [[TMP0]] 24; 25entry: 26 %0 = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1) 27 %1 = trunc i64 %0 to i32 28 %2 = sext i32 %1 to i64 29 ret i64 %2 30} 31 32define i64 @vsetvlimax_zext_i64() nounwind #0 { 33; CHECK-LABEL: @vsetvlimax_zext_i64( 34; CHECK-NEXT: entry: 35; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1) 36; CHECK-NEXT: ret i64 [[TMP0]] 37; 38entry: 39 %0 = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1) 40 %1 = trunc i64 %0 to i32 41 %2 = zext i32 %1 to i64 42 ret i64 %2 43} 44 45define signext i32 @vsetvlmax_sext() nounwind #0 { 46; CHECK-LABEL: @vsetvlmax_sext( 47; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1) 48; CHECK-NEXT: [[B:%.*]] = trunc nuw nsw i64 [[A]] to i32 49; CHECK-NEXT: ret i32 [[B]] 50; 51 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 1) 52 %b = trunc i64 %a to i32 53 ret i32 %b 54} 55 56define zeroext i32 @vsetvlmax_zext() nounwind #0 { 57; CHECK-LABEL: @vsetvlmax_zext( 58; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1) 59; CHECK-NEXT: [[B:%.*]] = trunc nuw nsw i64 [[A]] to i32 60; CHECK-NEXT: ret i32 [[B]] 61; 62 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 1) 63 %b = trunc i64 %a to i32 64 ret i32 %b 65} 66 67define i32 @vsetvlimax_and17_i32() nounwind #0 { 68; CHECK-LABEL: @vsetvlimax_and17_i32( 69; CHECK-NEXT: entry: 70; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.riscv.vsetvlimax.i32(i32 1, i32 1) 71; CHECK-NEXT: ret i32 [[TMP0]] 72; 73entry: 74 %0 = call i32 @llvm.riscv.vsetvlimax.i32(i32 1, i32 1) 75 %1 = and i32 %0, 131071 76 ret i32 %1 77} 78 79define i64 @vsetvlimax_and17_i64() nounwind #0 { 80; CHECK-LABEL: @vsetvlimax_and17_i64( 81; CHECK-NEXT: entry: 82; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1) 83; CHECK-NEXT: ret i64 [[TMP0]] 84; 85entry: 86 %0 = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1) 87 %1 = and i64 %0, 131071 88 ret i64 %1 89} 90 91define i64 @vsetvlmax_e8m1_and14bits() nounwind #0 { 92; CHECK-LABEL: @vsetvlmax_e8m1_and14bits( 93; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 0) 94; CHECK-NEXT: ret i64 [[A]] 95; 96 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 0) 97 %b = and i64 %a, 16383 98 ret i64 %b 99} 100 101define i64 @vsetvlmax_e8m1_and13bits() nounwind #0 { 102; CHECK-LABEL: @vsetvlmax_e8m1_and13bits( 103; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 0) 104; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 8191 105; CHECK-NEXT: ret i64 [[B]] 106; 107 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 0) 108 %b = and i64 %a, 8191 109 ret i64 %b 110} 111 112define i64 @vsetvlmax_e8m2_and15bits() nounwind #0 { 113; CHECK-LABEL: @vsetvlmax_e8m2_and15bits( 114; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 1) 115; CHECK-NEXT: ret i64 [[A]] 116; 117 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 1) 118 %b = and i64 %a, 32767 119 ret i64 %b 120} 121 122define i64 @vsetvlmax_e8m2_and14bits() nounwind #0 { 123; CHECK-LABEL: @vsetvlmax_e8m2_and14bits( 124; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 1) 125; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 16383 126; CHECK-NEXT: ret i64 [[B]] 127; 128 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 1) 129 %b = and i64 %a, 16383 130 ret i64 %b 131} 132 133define i64 @vsetvlmax_e8m4_and16bits() nounwind #0 { 134; CHECK-LABEL: @vsetvlmax_e8m4_and16bits( 135; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 2) 136; CHECK-NEXT: ret i64 [[A]] 137; 138 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 2) 139 %b = and i64 %a, 65535 140 ret i64 %b 141} 142 143define i64 @vsetvlmax_e8m4_and15bits() nounwind #0 { 144; CHECK-LABEL: @vsetvlmax_e8m4_and15bits( 145; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 2) 146; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 32767 147; CHECK-NEXT: ret i64 [[B]] 148; 149 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 2) 150 %b = and i64 %a, 32767 151 ret i64 %b 152} 153 154define i64 @vsetvlmax_e8m8_and17bits() nounwind #0 { 155; CHECK-LABEL: @vsetvlmax_e8m8_and17bits( 156; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 3) 157; CHECK-NEXT: ret i64 [[A]] 158; 159 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 3) 160 %b = and i64 %a, 131071 161 ret i64 %b 162} 163 164define i64 @vsetvlmax_e8m8_and16bits() nounwind #0 { 165; CHECK-LABEL: @vsetvlmax_e8m8_and16bits( 166; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 3) 167; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 65535 168; CHECK-NEXT: ret i64 [[B]] 169; 170 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 3) 171 %b = and i64 %a, 65535 172 ret i64 %b 173} 174 175define i64 @vsetvlmax_e8mf2_and11bits() nounwind #0 { 176; CHECK-LABEL: @vsetvlmax_e8mf2_and11bits( 177; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 5) 178; CHECK-NEXT: ret i64 [[A]] 179; 180 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 5) 181 %b = and i64 %a, 2047 182 ret i64 %b 183} 184 185define i64 @vsetvlmax_e8mf2_and10bits() nounwind #0 { 186; CHECK-LABEL: @vsetvlmax_e8mf2_and10bits( 187; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 5) 188; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 1023 189; CHECK-NEXT: ret i64 [[B]] 190; 191 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 5) 192 %b = and i64 %a, 1023 193 ret i64 %b 194} 195 196define i64 @vsetvlmax_e8mf4_and12bits() nounwind #0 { 197; CHECK-LABEL: @vsetvlmax_e8mf4_and12bits( 198; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 6) 199; CHECK-NEXT: ret i64 [[A]] 200; 201 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 6) 202 %b = and i64 %a, 4095 203 ret i64 %b 204} 205 206define i64 @vsetvlmax_e8mf4_and11bits() nounwind #0 { 207; CHECK-LABEL: @vsetvlmax_e8mf4_and11bits( 208; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 6) 209; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 2047 210; CHECK-NEXT: ret i64 [[B]] 211; 212 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 6) 213 %b = and i64 %a, 2047 214 ret i64 %b 215} 216 217define i64 @vsetvlmax_e8mf8_and13bits() nounwind #0 { 218; CHECK-LABEL: @vsetvlmax_e8mf8_and13bits( 219; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 7) 220; CHECK-NEXT: ret i64 [[A]] 221; 222 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 7) 223 %b = and i64 %a, 8191 224 ret i64 %b 225} 226 227define i64 @vsetvlmax_e8mf8_and12bits() nounwind #0 { 228; CHECK-LABEL: @vsetvlmax_e8mf8_and12bits( 229; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 0, i64 7) 230; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 4095 231; CHECK-NEXT: ret i64 [[B]] 232; 233 %a = call i64 @llvm.riscv.vsetvlimax(i64 0, i64 7) 234 %b = and i64 %a, 4095 235 ret i64 %b 236} 237 238define i64 @vsetvlmax_e16m1_and13bits() nounwind #0 { 239; CHECK-LABEL: @vsetvlmax_e16m1_and13bits( 240; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 0) 241; CHECK-NEXT: ret i64 [[A]] 242; 243 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 0) 244 %b = and i64 %a, 8191 245 ret i64 %b 246} 247 248define i64 @vsetvlmax_e16m1_and12bits() nounwind #0 { 249; CHECK-LABEL: @vsetvlmax_e16m1_and12bits( 250; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 0) 251; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 4095 252; CHECK-NEXT: ret i64 [[B]] 253; 254 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 0) 255 %b = and i64 %a, 4095 256 ret i64 %b 257} 258 259define i64 @vsetvlmax_e16m2_and14bits() nounwind #0 { 260; CHECK-LABEL: @vsetvlmax_e16m2_and14bits( 261; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1) 262; CHECK-NEXT: ret i64 [[A]] 263; 264 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 1) 265 %b = and i64 %a, 16383 266 ret i64 %b 267} 268 269define i64 @vsetvlmax_e16m2_and13bits() nounwind #0 { 270; CHECK-LABEL: @vsetvlmax_e16m2_and13bits( 271; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 1) 272; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 8191 273; CHECK-NEXT: ret i64 [[B]] 274; 275 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 1) 276 %b = and i64 %a, 8191 277 ret i64 %b 278} 279 280define i64 @vsetvlmax_e16m4_and15bits() nounwind #0 { 281; CHECK-LABEL: @vsetvlmax_e16m4_and15bits( 282; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 2) 283; CHECK-NEXT: ret i64 [[A]] 284; 285 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 2) 286 %b = and i64 %a, 32767 287 ret i64 %b 288} 289 290define i64 @vsetvlmax_e16m4_and14bits() nounwind #0 { 291; CHECK-LABEL: @vsetvlmax_e16m4_and14bits( 292; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 2) 293; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 16383 294; CHECK-NEXT: ret i64 [[B]] 295; 296 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 2) 297 %b = and i64 %a, 16383 298 ret i64 %b 299} 300 301define i64 @vsetvlmax_e16m8_and16bits() nounwind #0 { 302; CHECK-LABEL: @vsetvlmax_e16m8_and16bits( 303; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 3) 304; CHECK-NEXT: ret i64 [[A]] 305; 306 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 3) 307 %b = and i64 %a, 65535 308 ret i64 %b 309} 310 311define i64 @vsetvlmax_e16m8_and15bits() nounwind #0 { 312; CHECK-LABEL: @vsetvlmax_e16m8_and15bits( 313; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 3) 314; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 32767 315; CHECK-NEXT: ret i64 [[B]] 316; 317 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 3) 318 %b = and i64 %a, 32767 319 ret i64 %b 320} 321 322define i64 @vsetvlmax_e16mf2_and10bits() nounwind #0 { 323; CHECK-LABEL: @vsetvlmax_e16mf2_and10bits( 324; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 5) 325; CHECK-NEXT: ret i64 [[A]] 326; 327 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 5) 328 %b = and i64 %a, 1023 329 ret i64 %b 330} 331 332define i64 @vsetvlmax_e16mf2_and9bits() nounwind #0 { 333; CHECK-LABEL: @vsetvlmax_e16mf2_and9bits( 334; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 5) 335; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 511 336; CHECK-NEXT: ret i64 [[B]] 337; 338 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 5) 339 %b = and i64 %a, 511 340 ret i64 %b 341} 342 343define i64 @vsetvlmax_e16mf4_and11bits() nounwind #0 { 344; CHECK-LABEL: @vsetvlmax_e16mf4_and11bits( 345; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 6) 346; CHECK-NEXT: ret i64 [[A]] 347; 348 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 6) 349 %b = and i64 %a, 2047 350 ret i64 %b 351} 352 353define i64 @vsetvlmax_e16mf4_and10bits() nounwind #0 { 354; CHECK-LABEL: @vsetvlmax_e16mf4_and10bits( 355; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 6) 356; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 1023 357; CHECK-NEXT: ret i64 [[B]] 358; 359 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 6) 360 %b = and i64 %a, 1023 361 ret i64 %b 362} 363 364define i64 @vsetvlmax_e16mf8_and12bits() nounwind #0 { 365; CHECK-LABEL: @vsetvlmax_e16mf8_and12bits( 366; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 7) 367; CHECK-NEXT: ret i64 [[A]] 368; 369 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 7) 370 %b = and i64 %a, 4095 371 ret i64 %b 372} 373 374define i64 @vsetvlmax_e16mf8_and11bits() nounwind #0 { 375; CHECK-LABEL: @vsetvlmax_e16mf8_and11bits( 376; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 1, i64 7) 377; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 2047 378; CHECK-NEXT: ret i64 [[B]] 379; 380 %a = call i64 @llvm.riscv.vsetvlimax(i64 1, i64 7) 381 %b = and i64 %a, 2047 382 ret i64 %b 383} 384 385define i64 @vsetvlmax_e32m1_and12bits() nounwind #0 { 386; CHECK-LABEL: @vsetvlmax_e32m1_and12bits( 387; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 0) 388; CHECK-NEXT: ret i64 [[A]] 389; 390 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 0) 391 %b = and i64 %a, 4095 392 ret i64 %b 393} 394 395define i64 @vsetvlmax_e32m1_and11bits() nounwind #0 { 396; CHECK-LABEL: @vsetvlmax_e32m1_and11bits( 397; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 0) 398; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 2047 399; CHECK-NEXT: ret i64 [[B]] 400; 401 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 0) 402 %b = and i64 %a, 2047 403 ret i64 %b 404} 405 406define i64 @vsetvlmax_e32m2_and13bits() nounwind #0 { 407; CHECK-LABEL: @vsetvlmax_e32m2_and13bits( 408; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 1) 409; CHECK-NEXT: ret i64 [[A]] 410; 411 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 1) 412 %b = and i64 %a, 8191 413 ret i64 %b 414} 415 416define i64 @vsetvlmax_e32m2_and12bits() nounwind #0 { 417; CHECK-LABEL: @vsetvlmax_e32m2_and12bits( 418; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 1) 419; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 4095 420; CHECK-NEXT: ret i64 [[B]] 421; 422 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 1) 423 %b = and i64 %a, 4095 424 ret i64 %b 425} 426 427define i64 @vsetvlmax_e32m4_and14bits() nounwind #0 { 428; CHECK-LABEL: @vsetvlmax_e32m4_and14bits( 429; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 2) 430; CHECK-NEXT: ret i64 [[A]] 431; 432 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 2) 433 %b = and i64 %a, 16383 434 ret i64 %b 435} 436 437define i64 @vsetvlmax_e32m4_and13bits() nounwind #0 { 438; CHECK-LABEL: @vsetvlmax_e32m4_and13bits( 439; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 2) 440; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 8191 441; CHECK-NEXT: ret i64 [[B]] 442; 443 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 2) 444 %b = and i64 %a, 8191 445 ret i64 %b 446} 447 448define i64 @vsetvlmax_e32m8_and15bits() nounwind #0 { 449; CHECK-LABEL: @vsetvlmax_e32m8_and15bits( 450; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 3) 451; CHECK-NEXT: ret i64 [[A]] 452; 453 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 3) 454 %b = and i64 %a, 32767 455 ret i64 %b 456} 457 458define i64 @vsetvlmax_e32m8_and14bits() nounwind #0 { 459; CHECK-LABEL: @vsetvlmax_e32m8_and14bits( 460; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 3) 461; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 16383 462; CHECK-NEXT: ret i64 [[B]] 463; 464 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 3) 465 %b = and i64 %a, 16383 466 ret i64 %b 467} 468 469define i64 @vsetvlmax_e32mf2_and9bits() nounwind #0 { 470; CHECK-LABEL: @vsetvlmax_e32mf2_and9bits( 471; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 5) 472; CHECK-NEXT: ret i64 [[A]] 473; 474 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 5) 475 %b = and i64 %a, 511 476 ret i64 %b 477} 478 479define i64 @vsetvlmax_e32mf2_and8bits() nounwind #0 { 480; CHECK-LABEL: @vsetvlmax_e32mf2_and8bits( 481; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 5) 482; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 255 483; CHECK-NEXT: ret i64 [[B]] 484; 485 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 5) 486 %b = and i64 %a, 255 487 ret i64 %b 488} 489 490define i64 @vsetvlmax_e32mf4_and10bits() nounwind #0 { 491; CHECK-LABEL: @vsetvlmax_e32mf4_and10bits( 492; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 6) 493; CHECK-NEXT: ret i64 [[A]] 494; 495 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 6) 496 %b = and i64 %a, 1023 497 ret i64 %b 498} 499 500define i64 @vsetvlmax_e32mf4_and9bits() nounwind #0 { 501; CHECK-LABEL: @vsetvlmax_e32mf4_and9bits( 502; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 6) 503; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 511 504; CHECK-NEXT: ret i64 [[B]] 505; 506 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 6) 507 %b = and i64 %a, 511 508 ret i64 %b 509} 510 511define i64 @vsetvlmax_e32mf8_and11bits() nounwind #0 { 512; CHECK-LABEL: @vsetvlmax_e32mf8_and11bits( 513; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 7) 514; CHECK-NEXT: ret i64 [[A]] 515; 516 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 7) 517 %b = and i64 %a, 2047 518 ret i64 %b 519} 520 521define i64 @vsetvlmax_e32mf8_and10bits() nounwind #0 { 522; CHECK-LABEL: @vsetvlmax_e32mf8_and10bits( 523; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 2, i64 7) 524; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 1023 525; CHECK-NEXT: ret i64 [[B]] 526; 527 %a = call i64 @llvm.riscv.vsetvlimax(i64 2, i64 7) 528 %b = and i64 %a, 1023 529 ret i64 %b 530} 531 532define i64 @vsetvlmax_e64m1_and11bits() nounwind #0 { 533; CHECK-LABEL: @vsetvlmax_e64m1_and11bits( 534; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 0) 535; CHECK-NEXT: ret i64 [[A]] 536; 537 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 0) 538 %b = and i64 %a, 2047 539 ret i64 %b 540} 541 542define i64 @vsetvlmax_e64m1_and10bits() nounwind #0 { 543; CHECK-LABEL: @vsetvlmax_e64m1_and10bits( 544; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 0) 545; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 1023 546; CHECK-NEXT: ret i64 [[B]] 547; 548 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 0) 549 %b = and i64 %a, 1023 550 ret i64 %b 551} 552 553define i64 @vsetvlmax_e64m2_and12bits() nounwind #0 { 554; CHECK-LABEL: @vsetvlmax_e64m2_and12bits( 555; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 1) 556; CHECK-NEXT: ret i64 [[A]] 557; 558 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 1) 559 %b = and i64 %a, 4095 560 ret i64 %b 561} 562 563define i64 @vsetvlmax_e64m2_and11bits() nounwind #0 { 564; CHECK-LABEL: @vsetvlmax_e64m2_and11bits( 565; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 1) 566; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 2047 567; CHECK-NEXT: ret i64 [[B]] 568; 569 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 1) 570 %b = and i64 %a, 2047 571 ret i64 %b 572} 573 574define i64 @vsetvlmax_e64m4_and13bits() nounwind #0 { 575; CHECK-LABEL: @vsetvlmax_e64m4_and13bits( 576; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 2) 577; CHECK-NEXT: ret i64 [[A]] 578; 579 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 2) 580 %b = and i64 %a, 8191 581 ret i64 %b 582} 583 584define i64 @vsetvlmax_e64m4_and12bits() nounwind #0 { 585; CHECK-LABEL: @vsetvlmax_e64m4_and12bits( 586; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 2) 587; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 4095 588; CHECK-NEXT: ret i64 [[B]] 589; 590 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 2) 591 %b = and i64 %a, 4095 592 ret i64 %b 593} 594 595define i64 @vsetvlmax_e64m8_and14bits() nounwind #0 { 596; CHECK-LABEL: @vsetvlmax_e64m8_and14bits( 597; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 3) 598; CHECK-NEXT: ret i64 [[A]] 599; 600 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 3) 601 %b = and i64 %a, 16383 602 ret i64 %b 603} 604 605define i64 @vsetvlmax_e64m8_and13bits() nounwind #0 { 606; CHECK-LABEL: @vsetvlmax_e64m8_and13bits( 607; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 3) 608; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 8191 609; CHECK-NEXT: ret i64 [[B]] 610; 611 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 3) 612 %b = and i64 %a, 8191 613 ret i64 %b 614} 615 616define i64 @vsetvlmax_e64mf2_and8bits() nounwind #0 { 617; CHECK-LABEL: @vsetvlmax_e64mf2_and8bits( 618; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 5) 619; CHECK-NEXT: ret i64 [[A]] 620; 621 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 5) 622 %b = and i64 %a, 255 623 ret i64 %b 624} 625 626define i64 @vsetvlmax_e64mf2_and7bits() nounwind #0 { 627; CHECK-LABEL: @vsetvlmax_e64mf2_and7bits( 628; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 5) 629; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 127 630; CHECK-NEXT: ret i64 [[B]] 631; 632 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 5) 633 %b = and i64 %a, 127 634 ret i64 %b 635} 636 637define i64 @vsetvlmax_e64mf4_and9bits() nounwind #0 { 638; CHECK-LABEL: @vsetvlmax_e64mf4_and9bits( 639; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 6) 640; CHECK-NEXT: ret i64 [[A]] 641; 642 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 6) 643 %b = and i64 %a, 511 644 ret i64 %b 645} 646 647define i64 @vsetvlmax_e64mf4_and8bits() nounwind #0 { 648; CHECK-LABEL: @vsetvlmax_e64mf4_and8bits( 649; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 6) 650; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 255 651; CHECK-NEXT: ret i64 [[B]] 652; 653 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 6) 654 %b = and i64 %a, 255 655 ret i64 %b 656} 657 658define i64 @vsetvlmax_e64mf8_and10bits() nounwind #0 { 659; CHECK-LABEL: @vsetvlmax_e64mf8_and10bits( 660; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 7) 661; CHECK-NEXT: ret i64 [[A]] 662; 663 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 7) 664 %b = and i64 %a, 1023 665 ret i64 %b 666} 667 668define i64 @vsetvlmax_e64mf8_and9bits() nounwind #0 { 669; CHECK-LABEL: @vsetvlmax_e64mf8_and9bits( 670; CHECK-NEXT: [[A:%.*]] = call i64 @llvm.riscv.vsetvlimax.i64(i64 3, i64 7) 671; CHECK-NEXT: [[B:%.*]] = and i64 [[A]], 511 672; CHECK-NEXT: ret i64 [[B]] 673; 674 %a = call i64 @llvm.riscv.vsetvlimax(i64 3, i64 7) 675 %b = and i64 %a, 511 676 ret i64 %b 677} 678 679attributes #0 = { vscale_range(2,1024) } 680