xref: /llvm-project/llvm/test/Transforms/InstCombine/PowerPC/aligned-altivec.ll (revision fcfc31fffb9a83416453e60bd0dff2df93c2ee20) 
1; RUN: opt -S -passes=instcombine < %s | FileCheck %s
2target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
3target triple = "powerpc64-unknown-linux-gnu"
4
5declare <4 x i32> @llvm.ppc.altivec.lvx(ptr) #1
6
7define <4 x i32> @test1(ptr %h) #0 {
8entry:
9  %h1 = getelementptr <4 x i32>, ptr %h, i64 1
10  %vl = call <4 x i32> @llvm.ppc.altivec.lvx(ptr %h1)
11
12; CHECK-LABEL: @test1
13; CHECK: @llvm.ppc.altivec.lvx
14; CHECK: ret <4 x i32>
15
16  %v0 = load <4 x i32>, ptr %h, align 8
17  %a = add <4 x i32> %v0, %vl
18  ret <4 x i32> %a
19}
20
21define <4 x i32> @test1a(ptr align 16 %h) #0 {
22entry:
23  %h1 = getelementptr <4 x i32>, ptr %h, i64 1
24  %vl = call <4 x i32> @llvm.ppc.altivec.lvx(ptr %h1)
25
26; CHECK-LABEL: @test1a
27; CHECK-NOT: @llvm.ppc.altivec.lvx
28; CHECK: ret <4 x i32>
29
30  %v0 = load <4 x i32>, ptr %h, align 8
31  %a = add <4 x i32> %v0, %vl
32  ret <4 x i32> %a
33}
34
35declare void @llvm.ppc.altivec.stvx(<4 x i32>, ptr) #0
36
37define <4 x i32> @test2(ptr %h, <4 x i32> %d) #0 {
38entry:
39  %h1 = getelementptr <4 x i32>, ptr %h, i64 1
40  call void @llvm.ppc.altivec.stvx(<4 x i32> %d, ptr %h1)
41
42  %v0 = load <4 x i32>, ptr %h, align 8
43  ret <4 x i32> %v0
44
45; CHECK-LABEL: @test2
46; CHECK: @llvm.ppc.altivec.stvx
47; CHECK: ret <4 x i32>
48}
49
50define <4 x i32> @test2a(ptr align 16 %h, <4 x i32> %d) #0 {
51entry:
52  %h1 = getelementptr <4 x i32>, ptr %h, i64 1
53  call void @llvm.ppc.altivec.stvx(<4 x i32> %d, ptr %h1)
54
55  %v0 = load <4 x i32>, ptr %h, align 8
56  ret <4 x i32> %v0
57
58; CHECK-LABEL: @test2
59; CHECK-NOT: @llvm.ppc.altivec.stvx
60; CHECK: ret <4 x i32>
61}
62
63declare <4 x i32> @llvm.ppc.altivec.lvxl(ptr) #1
64
65define <4 x i32> @test1l(ptr %h) #0 {
66entry:
67  %h1 = getelementptr <4 x i32>, ptr %h, i64 1
68  %vl = call <4 x i32> @llvm.ppc.altivec.lvxl(ptr %h1)
69
70; CHECK-LABEL: @test1l
71; CHECK: @llvm.ppc.altivec.lvxl
72; CHECK: ret <4 x i32>
73
74  %v0 = load <4 x i32>, ptr %h, align 8
75  %a = add <4 x i32> %v0, %vl
76  ret <4 x i32> %a
77}
78
79define <4 x i32> @test1la(ptr align 16 %h) #0 {
80entry:
81  %h1 = getelementptr <4 x i32>, ptr %h, i64 1
82  %vl = call <4 x i32> @llvm.ppc.altivec.lvxl(ptr %h1)
83
84; CHECK-LABEL: @test1la
85; CHECK-NOT: @llvm.ppc.altivec.lvxl
86; CHECK: ret <4 x i32>
87
88  %v0 = load <4 x i32>, ptr %h, align 8
89  %a = add <4 x i32> %v0, %vl
90  ret <4 x i32> %a
91}
92
93declare void @llvm.ppc.altivec.stvxl(<4 x i32>, ptr) #0
94
95define <4 x i32> @test2l(ptr %h, <4 x i32> %d) #0 {
96entry:
97  %h1 = getelementptr <4 x i32>, ptr %h, i64 1
98  call void @llvm.ppc.altivec.stvxl(<4 x i32> %d, ptr %h1)
99
100  %v0 = load <4 x i32>, ptr %h, align 8
101  ret <4 x i32> %v0
102
103; CHECK-LABEL: @test2l
104; CHECK: @llvm.ppc.altivec.stvxl
105; CHECK: ret <4 x i32>
106}
107
108define <4 x i32> @test2la(ptr align 16 %h, <4 x i32> %d) #0 {
109entry:
110  %h1 = getelementptr <4 x i32>, ptr %h, i64 1
111  call void @llvm.ppc.altivec.stvxl(<4 x i32> %d, ptr %h1)
112
113  %v0 = load <4 x i32>, ptr %h, align 8
114  ret <4 x i32> %v0
115
116; CHECK-LABEL: @test2l
117; CHECK-NOT: @llvm.ppc.altivec.stvxl
118; CHECK: ret <4 x i32>
119}
120
121attributes #0 = { nounwind }
122attributes #1 = { nounwind readonly }
123
124